Search

The fabrication of a silicon solar cell on 6 in. pseudo‐square p‐type Czochralski grown silicon wafers featuring poly‐Si‐based passivating contacts for electrons at the cell rear side and screen‐printed aluminum fingers at the front side is demonstrated. The undiffused front surface is passivated with an Al2O3/SiNx stack, and the rear surface is covered with a thin oxide/n+‐poly‐Si/Al2O3/SiNx layer system, contacted by screen‐printed silver fingers. A loss analysis shows that the recombination losses at the metal contacts on both cell sides dominate the total energy losses. A voltage of 700 mV as the highest open‐circuit voltage from a batch of seven cells is achieved, and the best cell efficiency is 22.3%, independently confirmed. [ABSTRACT FROM AUTHOR]

Herein, the various measures to improve the efficiency of large‐area screen‐printed double‐side contacted polycrystalline Si on oxide (POLO)‐cells are experimentally demonstrated. The short‐circuit current density Jsc increases by 0.6 mA cm−2 upon reducing the thickness of poly‐Si from 25 to 10 nm due to the reduction of the parasitic absorption in the poly‐Si layer at the textured front side of the cell. Additionally, it is shown for the first time that the minority carriers generated by light absorbed in the poly‐Si layer can at least partially be transferred into the crystalline Si base. Remarkably high implied open‐circuit voltage Voc,impl values are achieved with n‐type cell precursors by introducing an hydrogenation step by AlxOy after reducing the poly‐Si thickness, and by an additional annealing step after sputtering of transparent conductive oxides (TCOs). All cell precursors show Voc,impl values of up to 740 mV independent of the poly‐Si thickness. A reduction in the open‐circuit voltage Voc is observed during back‐end processing to 728 mV as measured on the final cells. A certified cell energy conversion efficiency of 22.3% is reported. [ABSTRACT FROM AUTHOR]

We investigate the passivation quality of hole-collecting junctions consisting of thermally or wet-chemically grown interfacial oxides, sandwiched between a monocrystalline-Si substrate and a p-type polycrystalline-silicon (Si) layer. The three different approaches for polycrystalline-Si preparation are compared: the plasma-enhanced chemical vapor deposition (PECVD) of in situ p+-type boron-doped amorphous Si layers, the low pressure chemical vapor deposition (LPCVD) of in situ p+-type B-doped polycrystalline Si layers, and the LPCVD of intrinsic amorphous Si, subsequently ion-implanted with boron. We observe the lowest J0e values of 3.8 fA cm−2 on thermally grown interfacial oxide on planar surfaces for the case of intrinsic amorphous Si deposited by LPCVD and subsequently implanted with boron. Also, we obtain a similar high passivation of p+-type poly-Si junctions on wet-chemically grown oxides as well as for all the investigated polycrystalline-Si deposition approaches. Conversely, on alkaline-textured surfaces, J0e is at least 4 times higher compared to planar surfaces. This finding holds for all the junction preparation methods investigated. We show that the higher J0e on textured surfaces can be attributed to a poorer passivation of the p+ poly/c-Si stacks on (111) when compared to (100) surfaces. [ABSTRACT FROM AUTHOR]

We investigate the optical properties of n- and p-type polycrystalline silicon (poly-Si) layers. We determine the optical constants n and k of the complex refractive index of polycrystalline silicon by using variable-angle spectroscopic ellipsometry. Moreover, we investigate the effect of different doping levels in the poly-Si on free carrier absorption (FCA). Thereby, we demonstrate that the FCA in poly-Si can be described by a model developed for crystalline silicon ( c -Si) at a first approximation. The optical properties of hydrogenated amorphous silicon layers ( a -Si:H) are also investigated as a reference. With ray tracing simulations the absorption losses of poly-Si and of the a -Si:H layers are quantified with respect to the film thickness. Based on this approach we find that the short-circuit current density losses due to parasitic absorption of poly-Si layers are significantly lower when compared to a -Si:H layers of the same thickness. For example the short-circuit current density loss due to a 20 nm thick p-type poly-Si layer is around 1.1 mA/cm 2 , whereas a 20 nm thick p-type a -Si:H layer leads to a loss of around 3.5 mA/cm 2 . [ABSTRACT FROM AUTHOR]