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Reducing power consumption of chip-scale atomic clocks (CSACs) is a common goal for researchers. An effective but challenging issue for this goal is the reduction of power dissipation of the physics package. Here, we analyze the power consumption through thermal conduction, radiation and convection of a microelectromechanical systems (MEMS) cell physics package for CSACs. The physics package consisting of small coefficient of thermal conductivity and emissivity materials is proposed, which is vacuum sealed by gold-tin eutectic bonding. The helium leak rate is measured to be 4 × 10–11 Pa·m3/s. Thus, the physics package could keep high vacuum for about 3 years. The total power consumption of the proposed physics package is measured to be less than 20 mW. And the vacuum packaging also improves the frequency stability performance of CSACs, due to the increased insensitivity to ambient temperature change. The frequency performance of the prototype CSAC is improved from 8.8 × 10–12 @1000 s to 5.38 × 10–12@1000 s. The results show that the gold-tin eutectic bonding can be used as vacuum packaging for MEMS devices. [ABSTRACT FROM AUTHOR]

Chip-scale atomic clocks (CSACs) have been extensively investigated and many prototypes or products have been realized as time sensors. Researchers focus on improving the frequency stability performance, reducing the volume and the power consumption of CSACs. To the best of our knowledge, the physics packages reported until now are all assembled from discrete components. This traditional assembly method has a very low efficiency and causes variations among different physics packages. In this article, we propose a wafer-level assembled physics package for CSACs based on three dimensional (3-D) wafer-level packaging (WLP) and microelectromechanical system (MEMS) technologies. The components of the physics package are all fabricated on wafers. These wafers are integrated together vertically and then diced into separate physics packages. The proposed method has the advantages of high uniformity among different physics packages and high efficiency. And it improves the utilization rate of wafers by reducing the unused area. Thus, the production cost is reduced considerably. The volume of the proposed functional physics package is less than 8 mm3. The prototype chip-scale atomic clock incorporating the proposed physics package reveals the coherent population trapping (CPT) linewidth of 1.8 kHz and the total power consumption of about 20mW. The frequency stability is about $6.1 \times 10^{-12}$ @1000s. The observed results demonstrate promising performance of the wafer-level assembled physics package. The approach described in this article reveals a viable method for batch production for its low cost, high efficiency and high product uniformity. [ABSTRACT FROM AUTHOR]