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The investigation of two-dimensional (2D) materials has advanced into practical device applications, such as cascaded logic stages. However, incompatible electrical properties and inappropriate logic levels remain enormous challenges. In this work, a doping-free strategy is investigated by top gated (TG) MoS2 field-effect transistors (FETs) using various metal gates (Au, Cu, Ag, and Al). These metals with different work functions provide a convenient tuning knob for controlling threshold voltage (Vth) for MoS2 FETs. For instance, the Al electrode can create an extra electron doping (n-doping) behavior in the MoS2 TG-FETs due to a dipole effect at the gate-dielectric interface. In this work, by achieving matched electrical properties for the load transistor and the driver transistor in an inverter circuit, we successfully demonstrate wafer-scale MoS2 inverter arrays with an optimized inverter switching threshold voltage (VM) of 1.5 V and a DC voltage gain of 27 at a supply voltage (VDD) of 3 V. This work offers a novel scheme for the fabrication of fully integrated multistage logic circuits based on wafer-scale MoS2 film.

In this work, we report high-performance amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) with atomic layer deposited Al₂O₃ dielectric processed at a minimal temperature of 189.6 °C via microwave annealing (MWA). The a-IGZO TFT with MWA exhibits an improvement of 57% in subthreshold swing (SS) compared with the unannealed device; meanwhile, it retains high field-effect mobility of up to 29.2 cm²/(V · s) and large switching ratio of >10⁸. Moreover, the SS of the device was further reduced through a two-step MWA treatment. It is believed that MWA treatment effectively reduces the density of trap states associated with oxygen vacancies, promotes the formation of lattice oxygen, and thus improves the quality of IGZO film. MWA with low thermal budget shows great potential in applications of the back-end of line (BEOL)-compatible oxide devices.

In the next-generation computing framework, synaptic devices modulated using analogue weight storage are expected with capability of performing neuromorphic computing tasks. Recently, 2D transition metal dichalcogenides (TMDCs) based solid-state devices have demonstrated excellent electrical performance showing great potential in nanoscale synaptic electronics. In this letter, artificial synaptic transistors are proposed and fabricated on the atomic layer deposited 2D MoS2 thin film with an integrated high-k dielectric gate stack. The synapse cells can simulate fundamental synaptic functions similar to those of biological synapses, such as long-term potentiation and depression. Moreover, the ultralow power consumption shows that the proposed synapse is more efficient than most three-terminal synaptic transistors. We also emulate a multi-synapse network to demonstrate intrinsic heterogeneity in biological brain. The experimental results have validated the feasibility of synaptic devices based on 2D TMDCs and have contributed a promising approach to the development of the next-generation brain-like neuromorphic systems.

Pristine monolayer molybdenum disulfide (MoS2) demonstrates predominant and persistent n-type semiconducting polarity due to the natural sulfur vacancy, which hinders its electronic and optoelectronic applications in the rich bipolarity area of semiconductors. Current doping strategies in single-layer MoS2 are either too mild to reverse the heavily n-doped polarity or too volatile to create a robust electronic device meeting the requirements of both a long lifetime and compatibility for mass production. Herein, we demonstrate that MoS2 can be transferred onto polytetrafluoroethylene (PTFE), one of the most electronegative substrates. After transfer, the MoS2 photoluminescence exhibits an obvious blueshift from 1.83 to 1.89 eV and a prolonged lifetime, from 0.13 to 3.19 ns. The Fermi level of MoS2 experiences a remarkable 510 meV decrease, transforming its electronic structure into that of a hole-rich p-type semiconductor. Our work reveals a strong p-doping effect and charge transfer between MoS2 and PTFE, shedding light on a new nonvolatile strategy to fabricate p-type MoS2 devices.

Low-frequency noise has become one of the critical factors in ultra-scaled MOSFET devices, and is also effective as an evaluating tool in characterizing device structure and reliability. Here, the low-frequency noise in 14 nm-FinFET is studied, and its dependence on trap defects of high-k dielectric and interface is further experimentally investigated. By using NH3/N2 thermal processing in high-k/metal gate (HKMG) module, the $1/{f}$ noise characteristics have been greatly improved. The dominating mechanism is quantitatively analyzed focusing on the defect trap density in bulk HfO2 and SiO2 interface based on the carrier number fluctuation model. Moreover, the carrier mobility and the bias temperature instability property of the FinFET devices are also enhanced which further confirms the improvement in low-frequency noise upon optimized thermal processing.

Contact engineering is of critical importance for two-dimensional (2D) transition metal dichalcogenide (TMD)-based devices. However, there are only a few solutions to overcome this obstacle because of the complexity of the TMD-contact interface. In this work, we propose a novel method using a soft plasma treatment followed by the seamless deposition of a metal electrode to reduce the contact resistance of MoS2 field effect transistors (FETs). The treated FETs exhibit three times higher mobility than the control FETs without plasma treatment. The soft plasma treatment can remove the facial sulfur atoms and expose the middle Mo atoms so that they come into direct contact with the metal electrode, thus greatly improving the contact behavior. First-principles calculation is also performed to support the experimental results. Our potentially scalable strategy can be extended to the whole family of TMD based FETs to provide a possible route of device processsing technology for 2D device application.

In the continuous transistor feature size scaling down, the scaling of the supply voltage is stagnant because of the subthreshold swing (SS) limit. A transistor with a new mechanism is needed to break through the thermionic limit of SS and hold the large drive current at the same time. Here, by adopting the recently proposed Dirac-source field-effect transistor (DSFET) technology, we experimentally demonstrate a MoS2/graphene (1.8 nm/0.3 nm) DSFET for the first time, and a steep SS of 37.9 mV/dec at room temperature with nearly free hysteresis is observed. Besides, by bringing in the structure of gate-all-around (GAA), the MoS2/graphene DSFET exhibits a steeper SS of 33.5 mV/dec and a 40% increased normalized drive current up to 52.7 μA·μm/μm (VDS = 1 V) with a current on/off ratio of 108, which shows potential for low-power and high-performance electronics applications.

The superior optical and electronic properties of the two-dimensional (2D) rhenium disulfide (ReS2) makes it suitable for nanoelectronic and optoelectronic applications. However, the internal defects coupled with with the low mobility and light-absorbing capability of ReS2 impede its utilization in high-performance photodetectors. Fabrication of mixed-dimensional heterojunctions is an alternative method for designing high-performance hybrid photodetectors. This study proposes a mixed-dimensional van der Waals (vdW) heterojunction photodetector, containing high-performance one-dimensional (1D) p-type tellurium (Te) and 2D n-type ReS2, developed by depositing Te nanowires on ReS2 nanoflake using the dry transfer method. It can improve the injection and separation efficiency of photoexcited electron-hole pairs due to the type II p-n heterojunction formed at the ReS2 and Te interface. The proposed heterojunction device is sensitive to visible-light sensitivity (632 nm) with an ultrafast photoresponse (5 ms), high responsivity (180 A/W), and specific detectivity (109), which is superior to the pristine Te and ReS2 photodetectors. As compared to the ReS2 device, the responsivity and response speed is better by an order of magnitude. These results demonstrate the fabrication and application potential of Te/ReS2 mixed-dimensional heterojunction for high-performance optoelectronic devices and sensors.

This letter presents for the first time a new type of indirect time-of-flight (ToF) detection unit based on avalanche photodiode (APD) which is simple in structure and easy to integrate. Leveraging the advantages afforded by the direct ToF and indirect ToF technology, it has been verified by simulation that it has good time resolution, and the measurement results show a standard deviation of 3.17 mm at 4 m and less than 35 cm for distances up to 7.5 m. At the same time, this work proposes a new lateral APD model with a high responsivity reaching up to 4.37 A/W and low breakdown voltage of ~9.4 V.

A high optoelectronic performance ReS2/ReSe2 van der Waals (vdW) heterojunction phototransistor utilizing thin hafnium oxide (HfO2) as a local-back-gate dielectric layer was prepared and studied. The heterojunction-based phototransistor exhibits a superior electrical performance with a large rectification ratio of ∼103. Furthermore, unlike diode-like heterojunction devices, the innovative introduction of a local-back-gate in this phototransistor provides an outstanding gate-tunable capability with an ultra-low off-state current of 433 fA and a high on/off current ratio of over 106. And under optical excitation of a wide spectrum from 400 to 633 nm, an excellent photodetection responsivity at the 104 A W−1 level and the maximum normalized detectivity of 1.8 × 1015 Jones @ 633 nm have been demonstrated. Such high performances are attributed to the band alignment of the type-II heterojunction and the suppression of dark current by the local-back-gate. This work provides a promising reference for two-dimensional (2D) Re-based heterojunction optoelectronic devices.

Synaptic devices that merge memory and processing functions into one unit have broad application potentials in neuromorphic computing, soft robots, and human-machine interfaces. However, most previously reported synaptic devices exhibit fixed performance once been fabricated, which limits their application in diverse scenarios. Here, we report floating-gate photosensitive synaptic transistors with charge-trapping perovskite quantum dots (PQDs) and atomic layer deposited (ALD) Al2O3 tunneling layers, which exhibit typical synaptic behaviors including excitatory postsynaptic current (EPSC), pair-pulse facilitation and dynamic filtering characteristics under both electrical or optical signal stimulation. Further, the combination of the high-quality Al2O3 tuning layer and highly photosensitive PQDs charge-trapping layer provides the devices with extensively tunable synaptic performance under optical and electrical co-modulation. Applying light during electrical modulation can significantly improve both the synaptic weight changes and the non-linearity of weight updates, while the memory effect under light modulation can be obviously adjusted by the gate voltage. The pattern learning and forgetting processes for “0” and “1” with different synaptic weights and memory times are further demonstrated in the device array. Overall, this work provides synaptic devices with tunable functions for building complex and robust artificial neural networks.

Molybdenum disulfide (MoS2) has substantial application prospects in the field of electronic devices. The fabrication of devices of excellent quality based on MoS2 films is an important research direction. In this study, based on the atomic layer deposition technique, large-area MoS2 films were grown, and top-gate MoS2-based field-effect transistor arrays were fabricated on four substrates (AlN, GaN, sapphire, and SiO2). It was found that the interface defects that were introduced by lattice mismatch and roughness of the growth substrate could cause an exponential (102) drop in mobility. Because of the small lattice mismatch and excellent surface quality, transistors on the AlN substrate have shown an enhanced mobility (10.45 cm2 V-1 s-1) compared to transistors on the other substrates. This study proves that the AlN substrate is a superior substrate for large-area and high-performance MoS2 film synthesis. This result can also be applied in higher-level microelectronic systems, such as in digital logic circuit design.

The dynamically active synaptic elements are the fundamental building blocks in neuromorphic systems towards artificial intelligence with computing and sensing capabilities. Here, a two-dimensional (2D) MoS2 synaptic transistor is fabricated by using poly(ethylene oxide) (PEO) and lithium perchlorate (LiClO4) as a laterally coupled ion-conducting electrolyte. Due to the strong electric double layer (EDL) effect, a low operating voltage of 1 V and a high current on/off ratio of 105 have been obtained. In addition, short-term and long-term plasticity of typical synaptic behaviors have been successfully simulated, such as excitatory postsynaptic current, paired pulse facilitation long-term potentiation, long-term depression, and dynamic filtering. These results can provide new opportunities and strategies in building hybrid and low-dimensional neuromorphic systems for future artificial intelligence applications.

In this article, the steady and transient characteristics of the light-stimulated synaptic transistor based on amorphous indium–gallium–zinc oxide thin film are investigated. An optoelectronic trap charge model with steady and transient methods is employed to simulate the properties of such a neuromorphic device. The device simulation results agree well with the experimental data detected from the fabricated transistors. These numerical simulations can efficiently mimic the synaptic behaviors, such as excitatory postsynaptic current, paired-pulse facilitation, and even high-pass filtering characteristic as well. Furthermore, these results provide a prospective physical understanding of the photosensitive synaptic device for neuromorphic systems and brain-like chips.

Interfacial ‘dead’ layers between metals and ferroelectric thin films generally induce detrimental effects in nanocapacitors, yet their peculiar properties can prove advantageous in other electronic devices. Here, we show that dead layers with low Li concentration located at the surface of LiNbO3 ferroelectric materials can function as unipolar selectors. LiNbO3 mesa cells were etched from a single-crystal LiNbO3 substrate, and Pt metal contacts were deposited on their sides. Poling induced non-volatile switching of ferroelectric domains in the cell, and volatile switching in the domains in the interfacial (dead) layers, with the domain walls created within the substrate being electrically conductive. These features were also confirmed using single-crystal LiNbO3 thin films bonded to SiO2/Si wafers. The fabricated nanoscale mesa-structured memory cell with an embedded interfacial-layer selector shows a high on-to-off ratio (>106) and high switching endurance (~1010 cycles), showing potential for the fabrication of crossbar arrays of ferroelectric domain wall memories. An integrated one selector–one resistor device is realized using the volatile and non-volatile switching properties of ferroelectric domains created, respectively, at the interface and in the bulk of mesa-like LiNbO3 domain wall memory cells.

The resistive switching behavior in resistive random access memories (RRAMs) using atomic-layer-deposited Ga2O3/ZnO composite film as the dielectric was investigated. By alternatively atomic-layer-depositing Ga2O3 and ZnO with different thickness, we can accurately control the oxygen vacancy concentration. When regulating ZnO to ∼31%, the RRAMs exhibit a forming-free property as well as outstanding performance, including the ratio of a high resistance state to the low resistance state of 1000, retention time of more than 1 × 104 s, and the endurance of 100. By preparing RRAMs of different Zn concentration, we carried out a comparative study and explored the physical origin for the forming-free property as well as good performance. Finally, a unified model is proposed to account for the resistive switching and the current conduction mechanism, providing meaningful insights in the development of high-quality and forming-free RRAMs for future memory and neuromorphic applications.

Future data-intensive applications will have integrated circuit architectures combining energy-efficient transistors, high-density data storage and electro-optic sensing arrays in a single chip to perform in situ processing of captured data. The costly dense wire connections in 3D integrated circuits and in conventional packaging and chip-stacking solutions could affect data communication bandwidths, data storage densities, and optical transmission efficiency. Here we investigated all-ferroelectric nonvolatile LiNbO3 transistors to function through redirection of conducting domain walls between the drain, gate and source electrodes. The transistor operates as a single-pole, double-throw digital switch with complementary on/off source and gate currents controlled using either the gate or source voltages. The conceived device exhibits high wall current density and abrupt off-and-on state switching without subthreshold swing, enabling nonvolatile memory-and-sensor-in-logic and logic-in-memory-and-sensor capabilities with superior energy efficiency, ultrafast operation/communication speeds, and high logic/storage densities., There is growing interest in non-traditional materials for logic applications. Here, the authors demonstrate a domain device architecture based on ferroelectric LiNbO3 crystals with gate voltage controlled transistor without subthreshold swing and source voltage controlled nonvolatile transistor.

Development of high-performance ammonia (NH3) sensor is imperative for monitoring NH3 in the living environment. In this work, to obtain a high performance NH3 gas sensor, structurally well-defined WO3@SnO2 core shell nanosheets with a controllable thickness of SnO2 shell layer have been employed as sensing materials. The prepared core shell nanosheets were used to obtain a miniaturized gas sensor based on micro-electro-mechanical system (MEMS). By tuning the thickness of SnO2 layer via atomic layer deposition, a series of WO3@SnO2 core-shell nanosheets with tunable sensing properties were realized. Particularly, the sensor base on the fabricated WO3@SnO2 nanosheets with 20-nm SnO2 shell layer demonstrated superior gas sensing performance with the highest response (1.55) and selectivity toward 15 ppm NH3 at 200 °C. This remarkable enhancement of NH3 sensing ability could be ascribed to the formation of unique WO3-SnO2 core-shell heterojunction structure. The detailed mechanism was elucidated by the heterojunction-depletion model with the help of specific band alignment.

Atomic layer deposition (ALD) can be used for wafer-scale synthesis of 2D materials. In this paper, a novel, reliable, secure, low-cost, and high-efficiency process for the fabrication of MoS2 is introduced and investigated. The resulting 2D materials show high carrier-mobility as well as excellent electrical uniformity. Using molybdenum pentachloride (MoCl5) and hexamethyldisilathiane (HMDST) as ALD precursors, thickness-controlled MoS2 films are uniformly deposited on a 50 mm sapphire and a 100 mm silica substrate. This is done with a high growth-rate (up to 0.90 A/cycle). Large-scale top-gated FET arrays are fabricated using the films, with a room-temperature mobility of 0.56 cm2/(V·s) and a high on/off current ratio of 106. Excellent electrical uniformity is observed in the whole sapphire wafer. Additionally, logical circuits, including inverters, NAND, AND, NOR, and OR gates, are realized successfully with a high-k HfO2 dielectric layer. Our inverters exhibit a fast response frequency of 50 Hz and a DC-voltage gain of 4 at VDD = 4 V. These results indicate that the new method has the potential to synthesize high quality MoS2 films on a large-scale, with hypo-toxicity and enhanced efficiency, which can facilitate a broader range of applications in the future.

Black phosphorus (BP) shows great potential in electronic and optoelectronic applications; however, maintaining the stable performance of BP devices over temperature is still challenging. Here, a novel BP field-effect transistor (FET) fabricated on the atomic layer deposited AlN/SiO2/Si substrate is demonstrated. Electrical measurement results show that BP FETs on the AlN substrate possess superior electrical performance compared with those fabricated on the conventional SiO2/Si substrate. It exhibits a large on-off current ratio of 5 × 108, a low subthreshold swing of 2 V−1 s−1 in the temperature range from 77 to 400 K. However, these stable electrical performances are not found in the BP FETs on SiO2/Si substrate when the temperature increases up to 400 K; instead, the electrical performance of BP FETs on the SiO2/Si substrate degrades drastically. Furthermore, to gain a physical understanding on the stable performance of BP FETs on the AlN substrate, low-frequency noise analysis was performed, and it revealed that the AlN film plays a significant role in suppressing the lattice scattering and charge trapping effects at high temperatures.

Defects originated from the stress-induced fin dislocation in FinFET have become critical in taller and narrower fin structures at advanced technology nodes that can easily form a leakage path between the source and the drain, leading to direct short failure. In this work, the correlation between the stress-induced defect and device leakage current has been studied using 14-nm FinFET devices with different fin structures. A novel method to detect and quantify the fin dislocation defect has been developed by characterizing the leakage performance, which can be used to evaluate the process effects. The asymmetric stress from shallow trench isolation (STI) oxide film and fin damage by ion implantation are verified as the primary causes through statistical analysis, which have been further co-optimized to achieve a higher yield.

The quantum efficiency of GaN-based micro-light-emitting diodes (micro-LEDs) is of great significance for their luminescence and detection applications. Optimized passivation process can alleviate the trapping of carriers by sidewall defects, such as dangling bonds, and is regarded as an effective way to improve the quantum efficiency of micro-LEDs. In this work, an AlN passivation layer was prepared by atomic layer deposition to improve the electro-optical and photoelectric conversion efficiency in GaN-based micro-LEDs. Compared to conventional Al2O3 passivation, the AlN passivation process has a stronger ability to eliminate the sidewall defects of micro-LEDs due to the homogeneous passivation interface. Our experiments show that the AlN-passivated device exhibits two orders of magnitude lower forward leakage and a smaller ideality factor, which leads to significantly enhanced external quantum efficiency (EQE). For 25*25 μm2 micro-LEDs, the EQE of the AlN-passivated device was 18.3% and 57.7% higher than that of the Al2O3-passivated device in luminescence application and detection application, respectively.

Through silicon via (TSV) offers a promising solution for the vertical connection of chip I/O, which enables smaller and thinner package sizes and cost-effective products by using wafer-level packaging instead of a chip-level process. However, TSV leakage has become a critical concern in the BEOL process. In this paper, a Cu-fulfilled via-middle TSV with 100 µm depth embedded in 0.18 µm CMOS process for sensor application is presented, focusing on the analysis and optimization of TSV leakage. By using etch process, substrate defect, and thermal processing co-optimization, TSV leakage failure can be successfully avoided, which can be very instructive for the improvement in TSV wafer-level package yield as well as device performance in advanced semiconductor technology.

Skin-like electronics that can provide comprehensively tactile sensing is required for applications such as soft robotics, health monitoring, medical treatment, and human-machine interfaces. In particular, the capacity to monitor the contact parameters such as the magnitude, direction, and contact location of external forces is crucial for skin-like tactile sensing devices. Herein, a flexible electronic skin which can measure and discriminate the contact parameters in real time is designed. It is fabricated by integrating the three-dimensional (3D) hollow MXene spheres/Ag NW hybrid nanocomposite-based embedded stretchable electrodes and T-ZnOw/PDMS film-based capacitive pressure sensors. To the best of our knowledge, it is the first stretchable electrode to utilize the 3D hollow MXene spheres with the essential characteristic, which can effectively avoid the drawbacks of stress concentration and shedding of the conductive layer. The strain-resistance module and the pressure-capacitance module show the excellent sensing performance in stability and response time, respectively. Moreover, a 6 × 6 sensor array is used as a demonstration to prove that it can realize the multiplex detection of random external force stimuli without mutual interference, illustrating its potential applications in biomimetic soft wearable devices, object recognition, and robotic manipulation.

Substantial progress has been made in the experimental synthesis of large-area two-dimensional transition metal dichalcogenide (TMD) thin films in recent years. This has provided a solid basis to b...

For the first time, we report the successful fabrication of well-behaved field-effect transistors based on Nb-doped β-Ga2O3 nanobelts mechanically exfoliated from bulk single crystals. The exfoliated β-Ga2O3 nanobelts were transferred onto a purified surface of the 110 nm SiO2/Si substrate. These Nb-doped devices showed excellent electrical performance such as an ultrasmall cutoff current of ∼10 fA, a high current on/off ratio of >108, and a quite steep subthreshold swing (SS, ∼120 mV/decade). Furthermore, we investigated the temperature dependence down to 200 K, providing insightful information for its operation in a harsh environment. This work lays a foundation for wider application of Nb-doped β-Ga2O3 in nano-electronics.

Thin-film transistors (TFTs) based on amorphous In–Ga–Zn–O (a-IGZO) channels present high mobility, large-area uniformity, mechanical flexibility and photosensitivity, and thus have extensive applicability in photodetectors, wearable devices, etc. However, pure a-IGZO based photosensors only exhibit a UV light response with limited sensitivity performance. By utilizing in situ interfacial hydrogen doping, it is demonstrated that the a-IGZO TFTs with the Al2O3 dielectric deposited by plasma-enhanced atomic layer deposition at room temperature (RT) have excellent photosensing performance, such as a photoresponsivity of over 6 × 105 A W−1 and a light to dark current ratio up to 107. This is attributed to spontaneous interfacial hydrogen doping into the a-IGZO channel during sputtering deposition of a-IGZO on hydrogen-rich Al2O3 films, thus generating subgap states in the band gap of IGZO. Further, color pattern imaging was achieved by employing an array of the color distinguishable devices, and flexibility was demonstrated by fabricating the TFTs onto polymer substrates. Moreover, it is also found that both the RT and 150 °C Al2O3 a-IGZO TFTs exhibit typical light-stimulated synaptic behaviors, including excitatory post-synaptic current and pair-pules facilitation, etc., and the memory time of the synaptic devices can be easily modulated by the degree of the interfacial hydrogen doping.

A neuromorphic electronic system requires the component devices to not only mimic typical synaptic behaviors but also be energy-efficient, together with excellent uniformity and tunable memory time. For this purpose, we fabricated amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors with plasma-enhanced atomic layer deposition AlO x :H dielectrics, successfully demonstrating typical synaptic behaviors, such as excitatory and inhibitory postsynaptic current, pair-pules facilitation, dynamic filter, learning and forgetting abilities and spike-timing dependent plasticity. In particular, such synaptic transistors exhibit ultralow energy consumption down to 3.18 fJ per synaptic event and tunable extensive memory time ranging from 76.6 ms to at least thousands of seconds. The ultralow energy consumption is realized by electron trapping and releasing at and near the interface between a-IGZO channel and AlO x :H dielectric under low voltages. By adjusting the concentration of oxygen vacancy defects in the a-IGZO domain adjacent to the interface by means of changing the growth temperature of the AlO x :H dielectrics, the memory time of the device can be further tuned on a large scale. Device flexibility was also demonstrated by fabricating the synaptic transistors onto polymer substrates at room temperature.

We demonstrate dual-gated (DG) MoS2 field effect transistors (FETs) in which the degraded switching performance of multilayer MoS2 can be compensated by the DG structure. It produces large current ...

The large-scale two-dimensional (2D) transition metal dichalcogenides (TMDCs) have attracted great attention in the fields of high-performance switching and sensing devices, and various synthesis a...

The issue of contacts between the electrode and channel layer is crucial for wide-bandgap semiconductors, especially the β-Ga2O3 due to its ultra-large bandgap (4.6–4.9 eV). It affects the device p...

The fast-developing information technology has imposed urgent need for effective solutions to overcome the increasing power density in further scaled electronic devices and systems. The tunnel fiel...

We demonstrate a 2-levels-stacked multi-bridge-channels (MBC) FET with channel thickness only 0.6nm and 1.2nm which is the thinnest channel record among reported MBC FET. The normalized drive current of a single stacked channel is 13.2μA•μm/μm (V DS =1V) which is comparable to the latest 7-levels-stacked Si MBC FET. What’s more, this ultrathin MBC FET demonstrates a very low leakage current per level (0.92pA•μm/μm, V DS =1V), only 6.5% of the value of the Si MBC FET. We also explore a self-aligned edge-contact process, paving the way toward higher-levels-stacked ultrathin MBC FET.

With the rise of 2D materials, new physics and new processing techniques have emerged, triggering possibilities for the innovation of electronic and optoelectronic devices. Among them, ambipolar 2D semiconductors are of excellent gate-controlled capability and distinctive physical characteristic that the major charge carriers can be dynamically, reversibly and rapidly tuned between holes and electrons by electrostatic field. Based on such properties, novel devices, like ambipolar field-effect transistors, light-emitting transistors, electrostatic-field-charging PN diodes, are developed and show great advantages in logic and reconfigurable circuits, integrated optoelectronic circuits, and artificial neural network image sensors, enriching the functions of conventional devices and bringing breakthroughs to build new architectures. This review first focuses on the basic knowledge including fundamental principle of ambipolar semiconductors, basic material preparation techniques, and how to obtain the ambipolar behavior through electrical contact engineering. Then, the current ambipolar 2D semiconductors and their preparation approaches and main properties are summarized. Finally, the emerging new device structures are overviewed in detail, along with their novel electronic and optoelectronic applications. It is expected to shed light on the future development of ambipolar 2D semiconductors, exploring more new devices with novel functions and promoting the applications of 2D materials.

For metal-insulator-metal (MIM) capacitors applicated in the fields of RF, DRAM, and analog/mixed-signal integrated circuits, a high capacitance density is imperative with the downscaling of the device feature size. In this work, the microwave annealing technique is investigated to enhance the dielectric characteristics of Al2O3/ZrO2/Al2O3 based MIM capacitors. The results show that the permittivity of ZrO2 is increased to 41.9 (~ 40% enhanced) with a microwave annealing at 1400 W for 5 min. The substrate temperature is lower than 400 °C, which is compatible with the back end of line process. The leakage current densities are 1.23 × 10−8 and 1.36 × 10−8 A/cm2 for as-deposited sample and 1400 W sample, respectively, indicating that the leakage property is not deteriorated. The conduction mechanism is confirmed as field-assisted tunneling.

In this letter, we introduce field-effect transistors (FETs) built with ReS2 on engineered flexible substrate. Excellent electrical behaviors have been obtained including high mobility, low subthreshold swing, and large on/off ratio. The optoelectronics and flexible electronics applications of the ReS2 FETs have been studied. The FET-based photodetector exhibited photoresponsivity up to 25.3 AW−1. Great mechanical properties have also been achieved under various strain conditions. Such excellent performance is comparable to the well-developed Si-based devices and is due to the remarkable inherent material properties of ReS2 and optimized device structure engineering on flexible substrate.

As one of the emerging neuromorphic computing devices, memristors may break through the limitation of traditional computers with a von Neumann architecture. However, the development of flexible memristors is limited by the high-temperature fabrication process, large operating voltage and non-uniform distribution of resistance. The room-temperature process has attracted great attention due to its advantages of low thermal dissipation, low cost and excellent compatibility with flexible electronics. Here, we proposed a fully physical vapour deposition (PVD) process for fabricating a memristor without additional heat treatment. The device showed excellent resistive switching characteristics with ultralow set/reset voltages (0.48 V/-0.39 V), uniform distribution (10%/15%), stable retention characteristic, multilevel storage behavior and reliable flexibility (radius of 10 mm). With continuously modulated conductance, typical synaptic plasticities were simulated by our flexible biomemristor, including excitatory post-synaptic current (EPSC), paired-pulse facilitation (PPF), long-term potentiation/depression (LTP/LTD) and learning-forgetting curve. Furthermore, the array learning behavior like that of the human brain was simulated with these trainable biomemristors. This study paves a new way for developing low-cost, wearable, neuromorphic computing electronics at room temperature and expands the applications of artificial synapse arrays.

Although the energy consumption of reported neuromorphic computing devices inspired by biological systems has become lower than traditional memory, it still remains greater than bio‐synapses (≈10 fJ per spike). Herein, a flexible MoS2‐based heterosynapse is designed with two modulation modes, an electronic mode and a photoexcited mode. A one‐step mechanical exfoliation method on flexible substrate and low‐temperature atomic layer deposition process compatible with flexible electronics are developed for fabricating wearable heterosynapses. With a pre‐spike of 100 ns, the synaptic device exhibits ultralow energy consumption of 18.3 aJ per spike in long‐term potentiation and 28.9 aJ per spike in long‐term depression. The ultrafast speed and ultralow power consumption provide a path for a neuromorphic computing system owning more excellent processing ability than the human brain. By adding optical modulation, a modulatory synapse is constructed to dynamically control correlations between pre‐ and post‐synapses and realize complex global neuromodulations. The novel wearable heterosynapse expands the accessible range of synaptic weights (ratio of facilitation ≈228%), providing an insight into the application of wearable 2D highly efficient neuromorphic computing architectures., A flexible MoS2‐based heterosynapse is designed with electronic and photoexcited modes. With an ultrafast pre‐spike of 100 ns, the synaptic device exhibits ultralow energy consumption of 18.3 aJ per spike in long‐term potentiation and 28.9 aJ per spike in long‐term depression. The ultrafast speed and ultralow power consumption pave the way for a computing system owning more excellent processing ability than the human brain.

To improve the electrical performance of thin-film transistors with an atomic-layer-deposited Al2O3 dielectric/InOx channel, O2 plasma surface treatments of the InOx back channel are explored in comparison with thermal annealing. It is demonstrated that the O2 plasma treatment can enhance the device performance much more efficiently than thermal annealing, exhibiting an extremely low-thermal budget. Furthermore, it is revealed that the plasma treatment at a higher temperature can improve the device performance much faster than that at a lower temperature. For a 4 min O2plasma treatment at 200 °C, superior electrical characteristics are achieved, such as a field-effect mobility of 11 cm2V−1s−1, a threshold voltage of 0.9 V, a subthreshold swing of 0.38 V/dec, and good gate bias stress stabilities. This is ascribed to faster passivation of oxygen vacancies, removal of more C residues, and weaker surface damage and smaller surface roughness of the InOx back channel in comparison with long plasma treatments at lower temperatures.

In this letter, the real-time polarization switching process in HfZrO4 ferroelectric film is investigated at high speed (100 MHz, highest up-to-date) by using the ultrafast measurements system. Based on the measurements over a wide range of speed from ms to ns, clear and detailed time-dependent behaviors of the polarization switch of HfZrO4 are captured. HfZrO4 film with 10 nm in thickness still exhibits ferroelectric characteristics measured with a voltage sweep period from 4 ms to 20 ns and a voltage amplitude of 4 V. The phenomenon of polarization switching diminishes distinctively with the increase of measurement speed. When the measurement speed reaches as fast as 10 ns, the polarization process could not be clearly observed. Therefore, high-speed application of negative capacitance field-effect transistor should be optimized to prevent potential problems caused by the insufficient polarization.

A spin-coating method was applied to obtain thinner and smoother PEO/LiClO4 polymer electrolyte films (EFs) with a lower level of crystallization than those obtained using a drop-casting method. When the applied frequency was as high as 10 kHz, the specific capacitance of such EFs with thicknesses of 1.5 μm was on the order of 1 μF∙cm−2, a value larger than most of the previously reported results achieved from the same material. We then combined the thin EFs with two-dimensional (2D) materials to fabricate a MoS2 transistor with a top gate right above the channel, defined by a shadow-mask method, and an inverter device. This transistor showed excellent static characteristics and the inverter device showed excellent switching performance at 100 Hz, which indicates a fast polarization response of the thin EFs. Such device architecture is suitable for future low power and flexible electronics based on 2D materials.

Transparent conducting oxides (TCOs) with ZnO/Cu/ZnO sandwich structure grown by atomic layer deposition (ALD) were investigated. The optical and electrical properties of the ZnO/Cu/ZnO multilayers with different Cu thickness were studied by optical spectrometry and four-point probe measurements, respectively. The structural properties were investigated using x-ray diffraction and high resolution tansmission electron microscopy. The experiment results indicated that the thickness of copper has a significant influence on the photoelectrical properties of films. A average transmittance of over 65% at visual wavelength and low resistivity of ∼3.05 × 10−4 Ω · cm were obtained when the thickness of Cu was 14 nm. The obtained results inspire us that ALD method is one of candidates for preparing high quality TCO films with high transmittance and low resistivity.

A multi-functional microwave annealing (MWA) process was proposed for high-performance GaN heterostructure devices. By this means, an Al2O3/AlN/GaN MOS-channel high-electron-mobility transistor was fabricated. The MWA was performed on both the AlN insertion layer and electrode metals, enabling the formation of high-quality AlN/GaN interface and good ohmic contact at the same time. A better performance of lower threshold voltage hysteresis (more than 2 times lower), smaller gate leakage, and larger current output (∼1.7 times larger) was hence obtained.

Ultrathin Ga2O3 films nanomixed with few atom-thick SiO2 interlayer were deposited on silicon and quartz substrates through plasma-enhanced atomic layer deposition. Upon adjusting the number of SiO2 atomic layers, different Si doping levels in Ga2O3 films were obtained. Herein, we report for the first time the use of this method to investigate the doping effect and realize the precise control of the microstructural, optical, and electrical properties of the Ga2O3 films. The experimental results indicated that the microstructural properties such as density, roughness, and chemical composition of the films are all affected by the number of doped SiO2 atomic layers. As the Si doping concentration increased in the films, the refractive index of the Ga2O3 films decreased monotonically, the optical transparency improved, and the average transmittances were >95% from ultraviolet to visual wavelengths for all the Si-doped Ga2O3 films. Moreover, the energy band-gap increased with the increase in Si composition, increasing from ∼4.8 eV for the undoped film to ∼5.1 eV for the film with a 20 at% Si doping level. Moreover, the breakdown field of the Ga2O3 film linearly improved from 6.8 MV cm−1 to 10.7 MV cm−1 as a function of the Si content. More importantly, this result enlightened us that the breakdown field of the Ga2O3 film can be further improved by increasing the Si doping concentration. This study provides a means to expand the properties of the new doped films and develop Ga2O3 film-based devices, such as transparent electrodes, photodetectors, thin film transistors, or high-power high-voltage devices.