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Packaging of microelectromechanical systems (MEMS) is essential for preserving device performance, providing physical protection and enabling electrical connections to devices. MEMS packaging sector is estimated to grow 2x faster than the integrated circuit (IC) packaging sector, because of ever-increasing penetration of MEMS technology into mobile and consumer applications in recent years [1]. Despite its growth, MEMS packaging is still one of the least explored components of MEMS technology [2]. Moreover, MEMS packaging can compromise up to 20-40% of the total material and assembly cost [3]. Besides, conventional MEMS packaging techniques involving ceramic, metal or plastic packages has challenges either of size limitations, high-temperature requirements, and packages being device-specific [4]. In addition, the surface of the MEMS devices should stay clean after packaging because the atmospheric contaminants and moisture can create dampening effects and oxidation, which might interfere with device performance and reliability. Therefore, there is a clear need for low-cost, clean, IC-compatible, high volume, wafer-level packaging solutions. The goal of this study is to develop a MEMS packaging technique using polymer-based air-gaps as a cost-effective method. The intention is to stabilize and secure the movable MEMS components inside a protective envelope so that the MEMS chip can then be treated like an integrated circuit (IC) and enjoy the benefits of low-cost, high-volume IC packaging, such as lead-frame, or plastic overmolding packaging. The air-gap creation process uses thermal decomposition of patterned sacrificial polymer layer, poly(propylene carbonate) (PPC), which is encapsulated with an overcoat material, BCB (Cyclotene), through which PPC decomposition products permeate out, finally leaving an air cavity on top of MEMS device enclosed with overcoat. The process involves coating MEMS device with PPC, coating and patterning a thin pattern-transfer layer of BCB overcoat on top of PPC, reactive-ion etching by O2 plasma for patterning PPC, coating and patterning overcoat layer of BCB, then simultaneous thermal decomposition of PPC and curing of BCB (at around 250°C for 2-4 hours in N2 purged oven). PPC acts a temporary place-holder for defining air-gap region, whereas BCB provides mechanical stability to package. The application of the process on bare silicon substrates enabled 5-10 μm high air-gap creation in square or circular features up to 2 mm in size with no cracking or deformation in BCB overcoat. BCB is found to be chemically compatible with PPC providing uniform, conformal and adherent coating on top of PPC. Nanoindentation measurements revealed a mechanically stable and flexible BCB overcoat layer on top of the air-gap. The surface of silicon in the air-gap region was found to be clean after removal of BCB overcoat, with only a 5-10 nm thick high molecular weight hydrocarbon by X-ray photoelectron spectroscopic (XPS) measurements. The packaging process was also performed on actual working MEMS resonators of sizes 200 μm x 100-160 μm. Comparing the before-packaging and after-packaging resonant spectra measurements, we have observed a minimal decrease in resonant frequency ( Overall, a new MEMS packaging technique has been studied in order to achieve low-cost, clean, IC-compatible MEMS packages. The technique is easy-to-implement, and readily scalable to wafer-level packaging. The packaging of actual MEMS devices with the use of the developed packaging technique along with conventional lead frame packaging with epoxy molding is underway. References 1. MEMS Packaging Market and Technology Trends Report, Yole Développement, 2012. 2. M. Gaitan, MEMS Technology Roadmapping, Nano-Tec Workshop 3, 31 May 2012. 3. R.H. Grace, M. A. Maher, “MEMS: Think outside the chip... at the package level”, Hearst Electronic Products 2010, http://www.electronicproducts.com/Packaging_and_Hardware/Prototyping_Tools_Equipment_Services/MEMS_Think_outside_the_chip_at_the_package_level.aspx 4. P. Monajemi et al., “Characterization of a Polymer-Based MEMS Packaging Technique”, 11th International Symposium on Advanced Packaging Materials: Processes, Properties and Interface, 2006.

The process technology for the fabrication of 4H-SiC trenched-implanted-gate 4H–SiC vertical-channel JFET (TI-VJFET) has been developed. The optimized TIVJFETs have been fabricated with self-aligned nickel silicide source and gate contacts using a process sequence that greatly reduces process complexity as it includes only four lithography steps. A source-pillars sidewall oxidation and subsequent removal of the metallization from the top of the sidewall oxide ensured isolation between gate and source. Optimum planarization of the source pillars top has been performed by cyclotene spin coating and etch back. The effect of the channel geometry on the electrical characteristics has been studied by varying its length (0.3 and 1.2μm) and its width (1.5-5μm). The voltage blocking exhibits a triode shape, which is typical for a static-induction transistor (SIT) operation. The transistors exhibited high ON current handling capabilities (Direct Current density >1kA/cm2 ) and values of RON ranging from 6 - 12 mΩ•cm2 depending on the channel length. Maximum voltage blocking was 800V limited by the edge termination. The maximum voltage gain was 51. Most transistors were normally-on. Normally-off operation has been observed for transistors lower than 2μm channel width (mask level) and deep implantation.

Fabrication of continuous ultra-thin gold films (

This paper reports on the use of two well-known photoresists, the JSR and BCB for the construction of gray scale structures which have a wide range of applications in the semiconductor/electronics industry. Reactive ion etching experiments were carried out in order to define the etching rate of the resist JSR and cyclotene using a combination of two different gases. Argon and Oxygen were used separately in order to determine the etching rate of the photoresist and the cyclotene by changing the following parameters: concentration, gas pressure and power of the RF unit. New reactive ion etching experiments were performed using combinations of the two gases in order to establish the optimum ratio of the two gases for accomplishing the desirable gray scale structures.

Planarization has become a necessity for fabricating devices, large and small. Without planarization, only a limited number of layers of interconnects or device structures can be successfully fabricated. CON-TACT planarization is a method that applies and extends the fundamentals of press planarization by utilizing external force to bring an optically flat surface in physical contact with flowable materials. The surface planarity is replicated from that of the optically flat surface to the planarized flowable material surface, which is then hardened and separated afterward from the pressing surface to achieve planarity. In this study, CON-TACT planarization technology has been utilized to planarize various polymer dielectric materials coated on both Si and GaAs topography and device wafers, resulting in both local and global planarity. The polymer materials used in this study include cyclotene, polybenzoxazole, and polyimide. The results show that a topography or step height reduction of up to 98% was achieved. Additionally, the overburden variation from die to die was also significantly reduced with this method. This performance promises great potential for CON-TACT planarization technology to provide more consistent, more reliable, and improved device performance for more sophisticated and complex device designs with higher yield.

This paper presents a whole benzocyclobutene (BCB) film encapsulated 0-level packaging using a wafer level BCB bonding technique. The wafer-scale membrane transfer technique using silicon carrier wafers was used to make BCB membrane caps for encapsulation placed above the device wafers. The BCB multiple coating process using CYCLOTENE 4026-46 was developed to make an encapsulation cap. The average height of the BCB cap was 40 µm with a little curvature on the membrane for the dimension of 2 mm × 3 mm. The RF characteristics using coplanar waveguide (CPW) lines were measured to evaluate the effect of BCB film packaging and the results were compared with those of pyrex #7740 glass packaged CPW lines. It shows that the insertion loss (S12) of BCB-packaged CPW lines is better than that of pyrex glass packaged CPW lines at high frequencies. The insertion loss change of CPW lines by BCB film packaging is below 0.01 dB up to 90 GHz, while the glass-packaged CPW lines show about 0.1 dB deviation from 20 GHz to 110 GHz.

Conventional contact mode atomic force microscopy (AFM) has been used for local surface cleaning and cluster alignment. By using the AFM tip to sweep and push in contact mode, we have demonstrated that Cu clusters, prepared by vacuum evaporation onto Dow Cyclotene 3022 polymer and subsequent exposure to atmosphere, can easily be moved by the AFM tip, and assembled at the outer edge of the scanned region to form a line of clusters. We have found that the force applied by the tip plays an important role in the ease of cluster motion. Cyclotene surface treatment that enhances cluster adhesion hinders this ability, and may be used as a method of nanofabrication.

International audience; The main contribution of this work consists in showing the possibility to use the Cyclotene 4026-46 BCB (BenzoCycloButen) resin in thick layer to realize Deep Trench Termination (DT2). The development of the DT2 in power devices strongly depends on its reliability. 2D finite elements simulations were used to determinate the electrical characteristics after mechanical stresses created in the structure. It appears that void created inside the structure does not affect the structure's characteristic; however it changes when a quantity of charge was added at interface Silicon/BCB.

We demonstrate intrinsic white light emission from hybrid light emitting diodes fabricated using an inorganic-organic hybrid junction grown at 50 C on a paper substrate. Cyclotene was first spin co ...

Various micromachining techniques exist to realize integrated microelectromechanical systems (MEMS), which include sensors, signal processing and/or driving circuits, and/or actuators in one small die. Post-processing techniques performed on foundry-fabricated circuits (e.g., MOSIS) are attractive since such an approach eliminates the need for an in-house integrated circuit fabrication line to produce integrated MEMS. A method based on the combination of metallic (e.g., electroplating) micromachining techniques with multichip module deposited (MCM-D) processes is a possible candidate to realize vertically-stacked integrated MEMS using the post-processing of integrated circuits (post-IC) approach. In order to realize such devices, planarization of the surface of foundry-fabricated circuit chips or wafers is often required. In such planarization layers, mechanical and chemical stability, as well as adhesion between the circuit-containing substrate and the micromachined devices, should be addressed. A PI/BCB/PI sandwich interlayer system, which utilizes both advantages of DuPont polyimide PI 2611 and Dow benzocyclobutene (BCB) Cyclotene 3022 series, was developed as a planarization interlayer for vertically integrated MEMS. The PI/BCB/PI interlayer system shows an over 95% degree of planarization (DOP) as well as passes the Method 107G Thermal Shock from the military standard MIL-STD-202F. A interlayer system was also developed as an alternative to the PI/BCB/PI system.

Polymeric multimode waveguides were fabricated using a UV-curable epoxy based polymer (SU-8) as the core layer and Cyclotene as the cladding layer. Contact printing lithography was adopted for the fabrication as a simple and low cost process. The materials are thermally stable up to 200°C as evidenced by the little change in refractive index at the temperature under an atmospheric condition. The propagation loss of the multimode waveguide was 0.36 dB/cm at the wavelength of 830 nm. A micro-mirror was also fabricated by contact printing method with tilted exposure.

The fabrication of redistribution layer (RDL) for TSV 3D integration and its optimization are presented in this paper. BCB is selected as the passivation layer and the electroplated Cu is used as the metal layer. CYCLOTENE 3024–46 is utilized and it is deposited by spin-coating and soft cure at 210 °C in annealing oven for 40 minutes with N 2 protection. Sputtered Ti/W/Cu and electron beam evaporated Ti/Cu on BCB have shown good adhesion. Daisy chain of the two metal layers and double layer of CPW are fabricated. The RDL of MSL and CPW are simulated by Ansoft HFSS. In condition of folded shape of RDL, multilayer of folded RDL gives the better performance than that of single layer and even has lower attenuation than straight line by optimization. Multilayer of RDL can also offset the insertion loss brought by TSV and has lower return loss. Multilayer of RDL with increasing width of metal line gradually from bottom to top is good for signal transmission and system reliability.

We report on thin-film microstrip lines (TFMSLs) fabricated on low-resistivity Si with polymerized cyclotene as the dielectric between signal and ground conductor, all on top of the wafer. Electro-optic high-frequency characterization of the TFMSLs reveals negligible modal dispersion up to the highest frequencies of 1.0 THz. In spite of the high substrate conductivity, the attenuation is low (⩽1 dB/mm at 100 GHz). Over the full frequency range, it is dominated by conductor losses and not by absorption in the dielectric. With these dispersion and attenuation properties, TFMSLs are an attractive alternative to coplanar waveguides, with the additional advantage of immunity against substrate absorption and radiation losses.

This paper presents experimental results for line-to-line coupling between adjacent coplanar waveguide (CPW) transmission lines. The CPW lines are fabricated on glass and low resistivity CMOS grade Si substrates coated with a 20/spl mu/m cyclotene polymer. From the measurement results it is found that the coupling increases with frequency on low resistivity silicon substrate while the coupling on glass shows relatively constant peaks. A spacing of 600/spl mu/m between CPW lines is required to avoid parasitic coupling less than 30dB for frequencies up to 30GHz when fabricated on low resistivity silicon, while a spacing of 200/spl mu/m is required when fabricated on glass. The conductor width (W) and the slot width (S) for low resistivity silicon is 80/spl mu/m and 45/spl mu/m, and on the glass substrate W = 150/spl mu/m, S = 30/spl mu/m. Based on full-wave EM simulation results, it is argued that the primary coupling mechanism is through the interaction of higher-order modes.

The feasibility of patterning a cured polymeric film of benzocyclobutene (BCB) using silicon nitride (SiN x ) as an etch mask was investigated. Due to the carbon- and silicon-containing composition of BCB, a gas mixture with oxygen- and fluorine-containing components is required, which unfortunately also etches SiN x . Therefore, a reactive ion etching process with high selectivity between the etch rates of the BCB, CYCLOTENE 3022-46, and the SiN x was developed. We have investigated the dependence of the etch rates as a function of the CF 4 content in the O 2 /CF 4 gas mixture. The surface morphology and the angle of the etched BCB sidewall were determined using a scanning electron microscope. A process with 37.5% CF 4 content was defined, exhibiting etch rates of 155 and 14 nm/min for the polymerized BCB and the SiN x , respectively. This yields a selectivity of 11 :1. The morphology of the etched BCB surface is smooth. Depending on the shape of the SiN x etch mask, sidewall angles of the BCB structure between 70° and 80° were obtained. These inclinations allow an effective deposition of a contact metallization. For further technological processing, a residual dielectric SiN x film can be left on the structure when the BCB layer is etched.

A novel structure employing Dow Chemical (Midland, MI) benzocyclobutene (BCB) Cyclotene as a diaphragm material is presented in this report. The main advantages of this BCB diaphragm are its low thermal conductivity, robustness, chemical inertness, low curing temperature and high structure yield. Moreover, a BCB film can be either photo-defined or plasma etched and is a suitable micromachining material for post IC processing. Micromachined IR thermopile single detectors and lineal detector arrays (1×16), using BiSeTeSb/BiSbTe sensing elements on BCB diaphragms, have been constructed and tested. Up to 100% structure yield has been obtained. The process used to realize this detector structure is compatible with the eventual inclusion of on-chip circuitry for signal amplification and conditioning.

We describe two smart pixel array (SPA) applications of photopolymers: integrated liquid crystal (LC) cell assembly and micro-optics fabrication. In our experiments, we utilize benzocyclobutene (BCB) organic resins (or Cyclotene/sup TM/), a class of thermosetting polymers developed at the Dow Chemical Company for electronic thin film coating applications. The planarization properties, refractive index (n=1.56) and high optical transmission (>90%) of BCB resins lend themselves well to our applications.

Large die such as SRAMs and DRAMs are subject to significant stress resulting from thermal expansion mismatch of the die and packaging materials. The use of polymers as stress buffering media has been widely practiced to increase the reliability of these devices. Many of these devices require that small windows (/spl les/10 /spl mu/m) be opened up in the polymer over "fuse links" which are used to reroute or reconfigure inactive circuits. The need for tighter resolution in the stress buffering layer, as well as the desire for shorter process cycle times, has moved the industry from wet etch to photosensitive materials. Photosensitive BCB (Cyclotene) has been widely reported for use as a dielectric in numerous advanced packaging applications. A one mask photo-BCB stress buffer process has also been reported for opening up bond pads and fuse links in underlying SiN die passivation. Traditional passivation/stress buffer processing has required masking and dry etching of the SST followed by coating and patterning of the polymer dielectric (two mask process). The reduction in processing steps and processing time using the one mask BCB process can significantly lower the cost of ownership for passivation/stress buffer layers.

The processing conditions for photosensitive BCB (Cyclotene** 4024-40 and Cyclotene** 4026-46) were defined for a thin film Cu/Photo-BCB MCM-D structure. Fabrication of four layer MCM-Ds, designed by Sandia National Laboratories, was demonstrated. The modules were electrically tested, solder bumped, flip chip assembled and put through a reliability test program.

In the last 5 years, the requirement for low k polymer dielectric in on-chip interconnects has resulted in a considerable effort by both material and tool suppliers in product development, thin film characterization and process integration development. The acceleration of the ITRS roadmap and company-specific integration requirements imposes very specific property requirements onto the low k dielectrics. SiLK* Semiconductor Dielectric was developed specifically to accommodate the needs imposed by high performance interconnect systems fabricated using either a subtractive Al/W [1] and Cu [2,3] damascene architecture. Besides faster clock speeds, ICs needs denser I/O to get this information on and off the chip faster and faster. Low k polymers, Cyclotene* Advance Electronics Resin (BCB) are also being used to build these dense arrays of bond pads and bumps [4].

Thermally stable polymer waveguide was fabricated using polycarbonate as the core material. Polycarbonate is thermally stable up to 190 degrees C, has small birefringence of 0.003 and good otpical transparency at 1.3 micrometers . We used Cyclotene 3022 as the cladding material. The material has 0.45 percent lower refractive index than the core material, resulting in a good mode matching waveguide with a single mode silica fiber. Buried channel waveguides were fabricated by conventional photolithography and dry etching technique. The thickness of the guiding layer was 5.3 micrometers and the width of the waveguides varied form 3 to 8 micrometers . They showed an optical loss of less than 0.8 and 1.4 dB/cm at the wavelength of 1.3 micrometers for TE and TM polarizations, respectively.

The backplanes of Liquid-Crystal-on-Silicon microdisplays are derived from a VLSI silicon chip that includes the active matrix as well as row and column drivers. One away to convert this silicon chip into a functional backplane is to planarize the silicon chip, then etch vias through the planarization layer and finally to pattern an array of flat, highly reflective electrodes, each of which is electrically connected to a corresponding cell of the active matrix underneath. Such a post-processing sequence can be carried out in different ways, using either Chemical-Mechanical Polishing or spin-on planarization. We have chosen spin-on planarization with Dow Chemical's Cyclotene resin followed by reactive ion etching of the vias. Finally, electrodes are patterned by aluminum sputtering and lift-off. This step also establishing the electrical connection to the underlying metalization. To demonstrate this sequence we have fabricated a two-level passive silicon backplane with aluminum stripe electrodes. We describe in detail the processing steps involved and report on the achieved degree of planarization, polymer and aluminum roughness.© (1999) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

We present a planar integration technology of bare dices embedded in substrates (ceramic,silicon). A thin film multilayer with dielectric polymer layers and sputtered / electroplated wiring is realized in a planar fashion on top of the embedded system. The metalization is based on a Ti:W / Cu tie layer, which is subsequently electroplated with Cu. Polyimid Pyralin? (2722 (Du Pont) and Cyclotene? (4026-46 (Dow Chemical) are used as interlevel dielectric. The paper addresses high frequency performance, electromagnetic full-wave modeling and equivalent circuit model extraction of the described technologry.

We present a planar multichip module integration technology intended for high frequency applications. Bare dice are placed in substrate openings and connected thru a thin film multilayer realized in a planar fashion on top of the embedded system. It is built of dielectric polymer layers and a sputtered/electroplated copper wiring on ceramic or silicon substrate. Polyimid Pyralin/sup TM/ (2722 (Du Pont) and Cyclotene/sup TM/ (4026-46 (Dow Chemical) are used as interlevel dielectric. Metalization is based on a Ti:W/Cu tie layer, which is subsequently electroplated with Cu. The paper also addresses high frequency performance of the described technology, electromagnetic full-wave modeling and equivalent circuit model extraction.

Polymer materials strongly improve the propagation properties in several types of waveguides. Here we demonstrate another important advantage of the polymer, i.e., that the polymer itself can be utilized as a probe for contactless and noninvasive on-chip measurements of high-frequency electric fields up to 1.95 THz via electric-field-induced second-harmonic (EFISH) generation.

Polymer-based sandwich microstrip transmission lines are investigated for the use as ultrafast interconnects in microelectronic circuits. Electronic-grade Benzocy-clobutene (Cyclotene) is applied as dielectric medium. Optoelectronic pulse-propagation measurements comparing the microstrip lines with standard coplanar waveguides show that the waveguides are free of modal dispersion up to the highest frequencies of 1.2 THz. Signal attenuation is low (≤1 dB/mm at 0.1 THz, ≈ 6 dB/mm at 1.2 THz), dominated by conductor losses. Radiation losses are negligible for all sandwich microstrip lines tested. Shielding by the ground conductor ensures that the waveguides are immune against Drude absorption in lossy substrates.

Dynamic and time-of-flight (TOF) secondary ion mass spectrometry (SIMS) was performed on vertically standing III-V nanowire ensembles embedded in Cyclotene polymer. By embedding the NWs in Cyclotene, the top surface of the sample was made planar, while the space between the NWs was filled to protect the background substrate from the ion beam, thus allowing for the NWs to be sputtered and analyzed evenly as a function of depth. Using thin film standards, SIMS analysis was used to calculate the impurity dopant concentration as a function of height in the NW ensemble. This marked the first use of conventional SIMS to accurately determine the doping density with excellent depth resolution. Additionally, this is the first presentation of SIMS as the only reported tool for characterizing the segment height uniformity of any arbitrary axial heterostructure NW ensemble.

To lower the cost of multichip module packaging, hybridized substrate technologies have recently been reported which blend the desirable aspects of D and L fabrication (MCM-D/L). High performance dielectrics such as Cyclotene™3022 and photosensitive BCB have been shown to be compatible with laminate substrates used in MCM-DIL, however the cure levels of the dielectric on the laminates must be known for optimum processing.In this paper, the capability of attenuated reflection IR microscopy (micro-ATR-IR) to probe thin films of BCB polymers is demonstrated. This technique enables the polymer layer to be probed regardless of the characteristics of the substrate. Cure levels of both Cyclotene™ 3022 and photodefinable BCB polymer films are obtained with micro-ATR-IR on both silicon and laminate substrate. Micro-ATR-IR is also used to probe a rapid thermal cure of Cyclotene Tm 3022 and photodefinable BCB layers on copper-clad polyimide laminate; these measurements cannot be made with transmission IR due to the high reflectivity of the substrate.

We have fabricated bottom-gate amorphous (α-) indium-gallium-zinc-oxide (InGaZnO4) thin film transistors (TFTs) on both paper and glass substrates at low processing temperature (≤100 °C). As a water and solvent barrier layer, cyclotene (BCB 3022–35 from Dow Chemical) was spin-coated on the entire paper substrate. TFTs on the paper substrates exhibited saturation mobility (μsat) of 1.2 cm2 V−1 s−1, threshold voltage (VTH) of 1.9 V, subthreshold gate-voltage swing (S) of 0.65 V decade−1, and drain current on-to-off ratio (ION/IOFF) of ∼104. These values were only slightly inferior to those obtained from devices on glass substrates (μsat∼2.1 cm2 V−1 s−1, VTH∼0 V, S∼0.74 V decade−1, and ION/IOFF=105–106). The uneven surface of the paper sheet led to relatively poor contact resistance between source-drain electrodes and channel layer. The ability to achieve InGaZnO TFTs on cyclotene-coated paper substrates demonstrates the enormous potential for applications such as low-cost and large area electronics.

A crossed coplanar waveguide design using polymer insulation layers is developed as a tool to experimentally investigate fast, precessional switching phenomena in view of applications in magnetic random access memory. The photosensitive polymer Cyclotene 4024™ (benzocyclobutene) is used as an electric insulation layer to realize a multilayer sample consisting of several different conducting and insulating layers. We report on the processing of Cyclotene 4024™ multilayers with optimized surface and electric insulating properties after hard cure. The micropatterned impedance matched coplanar waveguides have a bandwidth of 8.5GHz according to −2dB criterion, and for the −3dB criterion the bandwidth exceeds the measurement range of up to 15GHz. These values allow for short rise and fall times of the pulse for ultrafast magnetization dynamics measurements.

The authors report a novel digital optical switch that is based on polymer rib waveguides with large cross-sections. The switches use the highly thermal stable polymer Cyclotene 3022™ (benzocyclobutene) and show insertion losses of 20 dB.