Search

A passive down-conversion mixer in a 65nm buck CMOS process has been presented. The proposed mixer is consisted of a mixer-core and a folded OTA buffer. The mixer has a 3-dB bandwidth of 57~66 GHz, with a conversion gain of −2.7 ~ −5.4 dB. It requires a LO level of −5 dBm. The isolation between LO and RF ports is 10 dB. The total power consumption of the mixer is 1.4 mW, and the chip area is 0.4 mm 2 .

In this paper, we present a novel gain-enhanced sub-harmonic mixer based on 0.5-μm emitter width InGaAs/InP double heterojunction bipolar transistors (InP DHBTs). The proposed mixer consists of a transconductance stage and a gain-enhanced stage. A common-emitter transistor is used in the first stage to realize the sub-harmonic mixing while another common-emitter transistor is used in the second stage to remix the fLO+IF and fIF and also amplify the f2LO+IF. For further verification, a transconductance mixer and a gain-enhanced mixer were designed and fabricated. Compared with the transconductance mixer, the gain-enhanced mixer exhibits a 6.8-dB higher conversion gain with 2-dB lower LO input power and a peak up-conversion gain of 9 dB at 213 GHz with fIF = 1 GHz, fLO = 106 GHz, and PIF = -26 dBm PLO = 3 dBm. To our best knowledge, the gain-enhanced mixing structure is proposed for the first time.

This paper presents a 64 mega-pixel, backside-illuminated, CMOS image sensor using a 0.7um pixel pitch with a 7.0ke- linear full well capacity (FWC). A switchable conversion gain design was also demonstrated to have a high 18.0ke- FWC in 4-Cell pixel binning mode. Several new processes were implemented to overcome pixel performance degradation due to pixel scaling. As a result, this high FWC image sensor achieves low dark noise of 1.26e- and high quantum efficiency, comparable to larger pixel pitch products, such as 0.8um.

A distributed mixer was designed and fabricated in 250-nm indium phosphide (InP) double-heterojunction bipolar transistor (DHBT) technology for 200-GHz bandwidth digital-to-analog converters. A method using non-uniform emitter resistors in the mixer unit cells is proposed to compensate for degradation of conversion gain (CG). The fabricated mixer achieves a bandwidth of 194 GHz from DC to 194 GHz with a CG of -3 dB, which is the widest bandwidth ever reported to the best of the authors' knowledge.

This paper presents an extensive comparison of two 28-nm CMOS technologies, i.e., standard and mm-wave-optimized (i.e., thick metals and intermetal oxides) back-end-of-line (BEOL). The proposed comparison is carried out at both component and circuit level by means of a quantitative analysis of the actual performance improvements due to the adoption of a mm-wave-optimized BEOL. To this end, stand-alone transformer performance is first evaluated and then a complete mm-wave macroblock is investigated. A 77-GHz down-converter for frequency modulated continuous wave (FMCW) long-range/medium range (LR/MR) radar applications is exploited as a testbench. For the first time, it is demonstrated that thicker metals and intermetal oxides do not guarantee significant improvements at mm-wave frequencies and a standard (low-cost) BEOL is competitive in comparison with more complex (expensive) ones.

A photoreceiver with balanced SiN waveguide photodetectors and BiCMOS transimpedance amplifier is proposed, achieving a high conversion gain of greater than 2 kV/W up through 2 GHz, and a low in-band NEP of 8 pW/^Hz.

A 38 GHz modulator composed of a differential I/Q mixer and a high power frequency quadrupler in 65-nm CMOS for the 5G millimeter-wave (MMW) Tx application is presented. The 5 GHz LO feed is utilized which is compatible with the 5G sub-6 GHz system. In order to up-convert the 2 GHz IF signal to 38 GHz RF using the 5 GHz LO source, sub-harmonic mixers and frequency quadrupler are adopted. According to the measured results, the proposed modulator demonstrates a conversion gain of 2 dB and an OP 1dB of −10 dBm over 37.5-38.5 GHz with 42-mW dc power dissipation ( $P$ DC ) of the mixer and 120-mW $P$ DC of the frequency quadrupler. The modulator performs −47-dBc 8LO-to-RF isolation and better than −32-dBc IRR. Furthermore, due to the high 8LO-to-RF isolation and IRR performances, the 64-quadratic-amplitude modulation (QAM) with 1.5 Gb/s data rate is successfully demonstrated at 38 GHz. The proposed 38 GHz modulator shows potential for the sub-6 GHz and MMW coexistent 5G system.

A W -band frequency doubler is proposed and demonstrated in a 90-nm CMOS technology. Differential output signals are obtained at the drain and source terminals with validated phase balance, which is seldom demonstrated in high frequency operations above 67 GHz. The input network of the circuit exhibits diverse reflections for the fundamental and second harmonic frequencies with respect to the doubler, enhancing the first harmonic rejection ratio better than 30 dB. The proposed frequency doubler shows a differential conversion gain of −8.6 dB with a 3-dB bandwidth from 91 to 109 GHz. A maximum output power larger than −5 dBm is measured to provide a sufficient power level as the local frequency signal in the transceiver design.

This paper presents a low-power highly-integrated 57-64 GHz receiver for short-range frequency-modulated continuous-wave (FMCW) radar applications and fabricated in a 28 nm CMOS technology. Measurement results show that the receiver (Rx) achieves a 18.9 dB conversion gain (CG) with a -12 dBm input referred 1-dB compression point (IP1dB) at 60 GHz. A 7.6 dB double sideband noise figure (NF dsb ) is achieved at 10 MHz offset. Furthermore, the circuit draws 44 mA from a single 0.9 V supply and the chip core size is 0.58 mm x 0.33 mm.

A single-ended active dual-gate zero-IF frequency downconverter for H-band applications is presented. The mixer is designed for a 240 GHz LO frequency and shows a flat conversion gain curve of -7dB over a 3-dB bandwidth of more than 50 GHz from 220 to 270 GHz at a low LO power of -2dBm. To reduce the DC power consumption an active load was integrated. The MMIC was realized in a 35 nm gate-length InGaAs-based metamorphic HEMT technology.

This study proposes a wide-band low-power low-noise amplifier (LNA) and switched transconductance (SwGm) mixer. The proposed mixer is realised with a fully differential complementary metal oxide semiconductor (CMOS) SwGm configuration. It provides a high bandwidth with a low noise figure (NF) and consumes a low amount of power. Moreover, an ultra-wideband LNA is designed by using a split-load inductive technique. The combination of the LNA and the mixer has provided competitive results in terms of power, bandwidth, NF, and gain. The LNA + mixer was designed and fabricated in the 65 nm radio frequency-CMOS technology. The proposed LNA achieves 2.5 ± 0.1 dB of NF and 17 ± 1.5 dB of gain over the band of 1-10 GHz and consumes 4.8 mW of power. The proposed SwGm mixer shows a maximum conversion gain (CG) of 10 dB, a minimum NF of 10 dB, and more than -8.5 dBm of third-order input intercept point (IIP3) over the band of 10 GHz. The implemented LNA + mixer achieves 19 dB of CG, 5 dB of NF, and -6 dBm of IIP3. The on-chip LNA and mixer consume only 1.65 mW and 530 μW, respectively, from a 1.2 V supply voltage.

This letter presents a $Ka$ -band Gilbert frequency doubler (FD), in which the phase of the injected signal to switching transistors is adjusted to maximize the core conversion gain (CG) and power-added efficiency (PAE). It achieves a peak PAE of 26.2% and a peak CG of 21 dB at 28 GHz, without any output buffer. The FD provides a saturated output power of 11.9 dBm, a 3-dB bandwidth of 22–36 GHz, and a fundamental harmonic rejection of 32 dB. To the best of our knowledge, this FD achieves the highest CG and PAE among all reported Si-based FDs without output buffers.

An ultra-low-LO (local oscillator)-power X-band down-conversion ring mixer in 0.18-μm CMOS process is presented. By using the weak-inversion biasing technique, the proposed X-band ring mixer exhibits low-dc-power consumption and low-LO-drive power while maintaining a reasonable conversion gain (CG). The measurement results show that the proposed mixer demonstrates a maximum CG of 1.75 dB with ultra-low-LO-power of −8 dBm at RF of 12 GHz and IF of 100 MHz. The dc power is only 2 mW. The 3-dB RF bandwidth is from 9 to 15 GHz and the output 1-dB compression point (OP1 dB) is −14 dBm.

A self-biased balanced frequency doubler is presented in gallium arsenide (GaAs) with more than 38 dB fundamental suppression and broad bandwidth from 22 to 40 GHz at its output. The combination of both large bandwidth and excellent harmonic rejection was achieved by applying a transformer balun with a high degree of symmetry and minimal capacitive coupling. The balun alone has a gain and phase imbalance of less than 0.3 dB and 0.7° respectively from 2 to 25 GHz. The conversion gain of the doubler with the balun is -2 to -5 dB across the output frequency range. The highest output power is approximately 8 dBm between 18 and 20 GHz, with 10 dBm input. This work features the highest fundamental rejection across the band compared to the previously reported broadband GaAs doublers, enabled by the excellent balance of the balun.

A highly efficient 94-GHz push-push frequency doubler is presented. The push-push frequency doubler is implemented with a commercial 65-nm CMOS process and can be operated in high-power mode (HPM) and high-efficiency mode (HEM). In HPM, it shows peak conversion gain of 1.94 dB, operating in the frequency range from 83.6 to 102.9 GHz (20.7%) with the input power of -1 dBm within 3-dB gain variation. Also at 94 GHz, it operates in the input power range of −11.9 to 8 dBm within 3-dB gain variation. In HEM, the peak total efficiency (P OUT /(P DC + P IN )) is 16.28%, which is the highest among those of the reported W-Band frequency doublers.

© 2019 IEEE. This paper reviews our major technical achievement in high-Tc superconducting (HTS) terahertz (THz) receivers or heterodyne mixers in recent years. By virtue of innovative on-chip antenna/circuit designs, accurate device modelling and simulation, and advanced YBa2Cu3O7-x (YBCO) step-edge junction technology, we have successfully developed a series of HTS Josephson THz mixers with superior performance in terms of operating temperature, intermediate-frequency (IF) bandwidth, conversion gain and noise temperature. These mixers serve as promising receiver frontends for THz wireless communication and sensing systems.

A 310GHz sub-harmonic self-oscillating mixer (SHSOM) with on-chip LO generation is demonstrated in this paper. The mixer consists of four Clapp oscillators that are differentially coupled to the adjacent one. Two patch antennas deliver the differential RF signal to the mixer/oscillator and with the large LO swings at the transistor terminals, high conversion gain is achieved. By controlling the phase shift of the RF signal between gate and drain, the conversion gain is boosted. Using a 65nm CMOS technology, the prototype of the SHSOM achieves 16.8 dB conversion loss and 21.3 dB noise Figure at 310GHz. The 3-dB IF bandwidth is more than 8GHz and DC power consumption is around 55mW in total.

A single-ended active frequency upconverter for H-band applications is presented. The mixer is designed for a LO frequency at 300 GHz and shows a flat conversion gain curve over a large bandwidth from 270 to 313 GHz with a conversion loss of 7 dB at a very low LO input power of -3 dBm. In saturation a simulated gain of almost 1 dB is reached. The MMIC was realized in a 35 nm gate-length InGaAs-based metamorphic HEMT technology.

This work demonstrates a 24-32 GHz upconverting mixer implemented in SiGe process technology. The mixer uses double-balanced Gilbert cell architecture with on-chip transformer-based baluns for the LO input and RF output ports. With LO power of 6 dBm, the mixer achieves a maximum conversion gain of 13.7 dB at 26.5 GHz, a 24-32 GHz 3-dB bandwidth, IF-bandwidth of 0.25-1.25 GHz on both side-bands with 27 GHz LO frequency and OP1dB of -1.5 dBm at 28 GHz. It occupies an area of $468-\mu {m}\times 465-\mu{m}$ consuming 90 mW from a 2.5 V power supply. The performance is comparable to any state-of-the-art mixers in similar silicon technologies.

The current-bleeding neutralization is proposed to simultaneously provide current path and $C_{GD}$ neutralization of mixer $g_{m}$ stage in $0.18-\mu \text{m}$ CMOS process. In addition to sustain high gain property as the traditional PMOS current-bleeding method, the $IP_{1\text{dB}}$ of the proposed current-bleeding technique is improved by 3.5 dB over the PMOS-type bleeding. The proposed mixer achieves 10.7-dB conversion gain and −13.6-dBm $IP_{1\text{dB}}$ under 3-dBm LO power driving, and the mixer core consumes 6.6 mW at 1.8-V supply voltage.

A V-band low-noise amplifier (LNA) and mixer with integrated transformers are proposed and demonstrated in a 90-nm CMOS technology. The transformer configurations are analyzed and designed with the orientations that optimize the transimpedance in the LNA design, and enhance the voltage or current gain in the mixer. In high-gain and low-power modes respectively, the designed LNA shows gains of 24.4 and 20.6 dB among wide 3-dB bandwidths of 11 GHz with lowest noise figures (NF) of 6.4 and 6.2 dB. In the low-power mode, the LNA consumes only 11.5 mW, on the low side compared to the state-of-the-arts. The designed mixer shows a conversion gain of 3.2 dB and $\mathbf{P}_{\pmb{1}\mathbf{d}\mathbf{B}}$ of -1 dBm.

We demonstrated a novel self-oscillating up-conversion mixer with double-conversion structure in order to overcome a high conversion loss of a self-oscillating sub-harmonic up-conversion mixer. The self-oscillating double-conversion mixer consists of a self-oscillating up-conversion mixer and an up-conversion gate mixer, based on two 100 nm pseudomorphic high electron mobility transistors (PHEMTs). The mixer has an operating frequency of 77 GHz due to the double-conversion of self-generated fundamental LO frequency of 38.5 GHz. The mixer exhibits a good conversion gain of 3.87 dB and a phase noise of −92.9 dBc/Hz at 10 MHz offset. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 58:1989–1993, 2016

In this paper, we present a study of the noise and the gain of ${\hbox{MgB}}_{2}$ hot-electron bolometer mixers with different critical temperatures $(T_{c})$ and at various operation temperatures. At a local oscillator (LO) frequency of 1.63 THz the minimum input receiver noise temperature $(T_{r})$ was 700 K with a gain of $-{\hbox{18}}~{\hbox{dB}}$ for a device with a $T_{c}$ of 8.5 K. For a device with a $T_{c}$ of 22.5 K the corresponding values were 1700 K and $-{\hbox{19}}~{\hbox{dB}}$ . For the latter device the $T_{r}$ was 2150 K at a bath temperature of 12 K, which is not achievable with Nb-compound based HEB mixers. We present and compare different methods for measurements of the HEB mixer gain and the output noise.

A 300-GHz CMOS receiver module with a WR-3.4 waveguide interface is presented. The CMOS receiver is flip-chip mounted on a low-cost multilayered glass epoxy printed circuit board (PCB). A transmission-line-to-waveguide transition with a back-short structure is built into the PCB. The measured conversion gain, noise figure, and 3-dB bandwidth of the receiver module are approximately −23.7 dB, 33 dB and 18.4 GHz, respectively. Packaging loss is estimated to be approximately 4 dB from the conversion gain of the CMOS chip of −19.5 dB. A wireless data rate of 20 Gbit/s with 16-QAM was achieved using the designed modules.

This paper presents an active W-band up-converting double-balanced Gilbert mixer realized in 800 nm transferred substrate (TS) InP-DHBT technology. It consists of an active balun and a frequency doubler followed by a double-balanced Gilbert cell mixer. The local oscillator (LO) of the mixer operates from 39 to 45 GHz with an input power of less than 3 dBm. The mixer achieves a single sideband (SSB) conversion gain of $\mathbf{8}\ \mathbf{dB}\pm \mathbf{2}\ \mathbf{dB}$ in the frequency range 75 … 96 GHz. The measured output 1 dB compression $(\mathbf{OP}_{\mathbf{1}\mathbf{dB}})$ reaches −7 dBm and −8.5 dBm at 75 GHz and 86 GHz, respectively. The up-converter offers more than 15 GHz IF bandwidth, at a DC consumption of only 80 mW.

This paper presents a CMOS On-Off keying (OOK) modulator with high isolation, high output power for Q-band applications. In this design, an innovative double-loop drainage technique is adopted to reduce the leakage current from the carrier to the output load. Moreover, a fully symmetrical layout is also implemented for further reducing the feed-through due to mismatch. Thus, the isolation of the circuit is effectively increased. According to the measurement results, the modulator achieves a high isolation better than 62 dB, a conversion gain of 1 dB, an $\text{OP}_{{1}\text{dB}}$ of 3 dBm, and a data rate up to 4 Gb/s. Fabricated in a standard 90-nm CMOS process, the modulator occupies a silicon area of $0.56\times 0.73\text{mm}^{2}$ and consumes a total dc power of 25 mW.

A new photodetector designed for Quanta image sensor application is proposed. The photodetector is a backside-illuminated, buried photodiode with a vertically integrated pump and transfer gate and a distal floating diffusion to reduce parasitic capacitance. The structure features compact layout and high conversion gain. The proposed device is modeled and simulated, and its performance characteristics estimated.

A 10 GHz bandwidth photoreceiver is demonstrated. The photoreceiver consists of two photodiodes (PD) in a balanced configuration to generate a single-ended input to the transimpedance amplifier (TIA). The PDs achieves a responsivity of 0.48 A/W, and a 15 GHz bandwidth while driving a 50 D load under the designed biasing. The regulated cascode TIA is implemented in a 130 nm RF CMOS process. The TIA achieves a transimpedance gain of 39 dBD The complete photoreceiver achieves a conversion gain of 41 V/W across a 10 GHz bandwidth with the TIA consuming 56 mW from a 2 V supply, and the PDs drawing 1.2 mA from +/−5 V supplies. High sensitivity is achieved due to a low noise equivalent power (NEP) of 86 pWA/Hz.

This paper presents a broadband integrated doublebalanced I/Q-upconverter at 73.5 GHz in a 50 nm InGaAs-based metamorphic high electron mobility transistor technology including Lange couplers with voltage-controlled variable termination resistance. The variable resistance is implemented by using resistive FETs. This MMIC is designed for broadband communication with controllable LO suppression at the output. Introducing Lange couplers with voltage-controlled termination resistance offers a post-production measure to optimize MMICs with respect to I/Q-imbalance and LO isolation. In comparison to conventional 50 Q termination resistances the LO isolation could be improved by up to 12 dB over a bandwidth of 20 GHz while maintaining near constant conversion gain.

This paper demonstrates a wideband, subharmonicdown converting mixer using a commercial 130-nmSiGe-BiCMOS technology. The mixer adopts a frequencydoubling LO-stage, a differential switched-transconductance RFstage,on-chip LO and RF baluns, and two emitter-followerbuffer-stages. The measured results exhibit a maximumconversion gain up to 2.6 dB over the frequency range of 100 to140 GHz with a LO power of 5 dBm. The mixer achieves aninput referred 1-dB compression point of -7.2 dBm, with a DC power of 46.3 mW, including 26.7 mW for buffer-stages. Itdemonstrates also up to 12 GHz 3-dB IF bandwidth, which to theauthors’ best knowledge, is the highest obtained among activesub-harmonic mixers operating above 100 GHz. The chipoccupies 0.4 mm2, including pads.

The numerical study on microwave photonic mixers based on I/Q modulators and Mach-Zehnder modulators has been analyzed. To improve the design accuracy and efficiency of the mixing systems, some key performance indicators including best power of LO, conversion gain, noise figure, spurious performance and image rejection are simulated and discussed.

Buried P-Well (BPW) technology was used in silicon-on-insulator pixels (SOIPIX) to suppress the back-gate effect, the major challenge in SOIPIX. In this work, we have designed and optimized two novel pixel structures, which are based on different BPW design layouts, to study the carrier collection efficiency and conversion gain of the pixel unit used in SOIPIX X-ray detectors. The first structure has an extended BPW region connected with a P+ node. In the second structure, a separated BPW ring region is formed surrounding the P+ node. Two X-ray sources with different photon energies have been applied in the simulation of excess carrier generation. The results indicated that the first structure had higher collection efficiency while the second structure had a slightly better conversion gain. As a result, the total photoelectric voltage of the first structure is about two times that of the second structure, where low doping concentration (

We propose doubly and triply resonant electro-optic modulators for efficient narrowband RF-to-optical signal conversion. Using a dual-optical-cavity design, we predict 30dB higher conversion gain than single-cavity modulators, and another 5–10dB using a realistic electrical resonance.

A 9-GHz bandwidth balanced photoreceiver with 21 V/W optical conversion gain at 1060 nm wavelength, 20 dB common mode rejection ratio, and 166 pW/Hz noise equivalent power is demonstrated.

The design of a 24 GHz frequency divider-by-10 for accurate indoor localisation systems is presented. It is proposed to use frequency dividers as active reflector tags in a frequency-modulated continuous wave indoor localisation system in order to reduce interferences caused by direct reflections of the interrogating signal. Since frequency dividers are subharmonic generators, this allows achieving conversion gain in the reflected signal. The frequency divider is fabricated using GLOBAL FOUNDRIES 45 nm-silicon-on-insulator technology. It consumes only 5.7 mW from a 1 V supply. It has a wide locking range of 33% and an efficiency of 3.58 GHz/mW. To the best of authors’ knowledge, the use of frequency dividers as active reflectors was not studied before.

This work presents an active balanced sub-harmonic mixer (SHM) using InP double heterojunction bipolar transistor technology (DHBT) for Q-band applications. A miniature spiral type Marchand balun with five added capacitances for improved control of amplitude and phase balance is integrated with the SHM. The measured results for the SHM demonstrates a conversion gain of 1.2 dB at an RF frequency of 41 GHz with an associated LO power of 5 dBm. The conversion loss remains better than 3 dB from 38 to 44 GHz. The LO to IF isolation is better than 42 dB within the bandwidth of the mixer and confirms the excellent balance of the integrated spiral type Marchand balun. The DC power consumption of the SHM is only 22.5mW under normal mixer operation.

This paper presents the first results from mechanically coupling multiple resonators in an array in silicon-on-insulator while also employing piezoresistive sensing. By careful design of the couplers, the resonators in the array are synchronized to all resonate in phase and also at the same frequency. By collectively summing the currents from each of the resonators in the array, the net output current is thereby increased. By using piezoresistive sensing, the benefit of arraying is further improved by exploiting the higher electromechanical conversion gain provided by the piezoresistive effect. Further to this enhancement in transduction, our results also show that Q was increased with the coupling. A synchronized array of up to three extensional mode square-plate resonators is demonstrated here, although the concept can be further extended to larger size arrays. We have also formulated a semi-analytical model (with the aid of finite-element analysis) to describe the electromechanical transfer function of the device. Close agreement between our measurements and the model confirms that the observed enhancements afforded by arraying are within theoretical expectations.

We present an RF amplitude detector with a conversion gain of −3 V/V for RF amplitude range 0 to 0.6 Vp in 65nm CMOS. On-chip self-calibration structure that automatically corrects the variations within the RF detector itself is proposed. Silicon measurement results show the self-calibration structure improves the detection error of the non-calibrated RF amplitude detector to less than 10% at only 0.23mW power consumption.

Under femtosecond pulse illumination the AM-to-PM conversion gain of a silicon p-i-n photodiode was measured to be as high as 7 dB below the AM and exhibits deep nulls at discrete photocurrents with bias dependence.

The impact of the emitter polysilicon etching in Tetramethyl Ammonium Hydroxide (TMAH) on the characteristics of high-linearity mixers fabricated with the low-cost Horizontal Current Bipolar Transistor (HCBT) is analyzed. During emitter formation, the thick layer of α-Si is deposited over the whole wafer, which is then etched-back in the TMAH. The emitter thickness depends on the TMAH etching time and impacts the HCBT's electrical characteristics. Active down-converting mixers with open-collector topology based on Gilbert cell are fabricated with two types of HCBTs with different TMAH etching time using the lowest-cost HCBT technology with CMOS n-well region for n-collector. Measurements of mixers' characteristics are done on-wafer by using the multi-contact probes. The mixers achieve maximum IIP3 of 20.2 dBm and conversion gain of 4 dB. Differences in performance characteristics between two mixer types are small indicating that HCBT's circuit performance sensitivity on the emitter thickness variations is relatively small.

By utilizing a cross-junction-loaded rectangular hole as a defected ground structure (DGS) at the input side and a simple slotline-based defected ground at the output side, a novel microwave frequency tripler with conversion gain is demonstrated. The cross-junction-loaded hole at the input side acts as a reflector with the capability of providing a suitable reflection for the 3rd harmonic and improving the output power; it also maintains a good pass-band performance at the fundamental frequency f 0. The slotline-based DGS functions as a frequency selector and diminishes unwanted harmonic components at f 0, 2f 0, 4f 0, and 5f 0 while only passing the desirable multiplied frequency component (3f 0). With proper DC bias conditions, results from measurements indicate that the developed tripler achieves an approximate conversion gain of 0.9 dB at 3f 0 under an optimal input power of 2 dBm.

A lot of demand for parts of millimeter wave band, as would be expected 57~63 GHz band down conversion mixer was designed and fabricated using IHP 0.25 um SiGe process. Designed and fabricated mixer was double balanced type and located reduced 3D balun at RF port and buffer amplifier at outport for suppression LO signal and conversion gain. Fabricated mixer measured conversion gain of 13.8 dB, -17 dBm and 88 mA of current consumption characteristics, respectively.

In this paper, a coupled-defected ground structure(C-DGS) using negative inductive coupling is proposed and a bandstop filter(BSF) using C-DGS is designed and fabricated. The proposed C-DGS is the closely-located DGS cells for the negative coupling, the negative coupling of ground currents between adjacent DGS cells greatly improves the stopband characteristics. The proposed BSF utilizing the sharp cutoff response of the C-DGS has a -10 dB rejection band from 4 GHz to 11.3 GHz. A maximum attenuation rate is -64.3 dB/GHz in 3 cell structure, -108 dB/GHz in 5 cell structure. The C-DGS BSF shows the improved attenuation rate 3.8 times in 3 cell structure, 2.4 times in 5 cell structure, Also, the C-DGS BSF is reduced to 35.2 % and 40 % of the DGS BSF, respectively, due to the closely-located DGS cells. We fabricated the single gate mixer using C-DGS BSF. The single gate mixer has 6.6 dB conversion gain.

We report a high conversion gain millimeter-wave monolithic IC (MMIC) quadruple subharmonic mixer adopting a novel cascode harmonic generator for an improved conversion gain. The proposed cascode harmonic generator produces 2.9 dB higher fourth harmonic output powers on the average compared with those of the conventional multiplier. The fabricated mixer shows a high conversion gain of 3.4 dB at a local oscillator (LO) power of 13 dBm. High isolations were obtained the LO-to-intermediate frequency (IF) of -53.6 dB and the LO-to-radio frequency (RF) of -46.2 dB, at a frequency of 14.5 GHz. The conversion gain achieved in this work is the best performance among the millimeter-wave MMIC subharmonic mixers reported to date.