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The extreme ultraviolet (EUV) lithography has the potential to enable 5-nm half-pitch resolution in semiconductor manufacturing, but faces a number of persistent challenges. At the 5-nm technology node, a precise process simulator with nanometer accuracy will be required. For a precise simulation, the better understanding the EUV process mechanism is critical for the improvement of resist performance and the development of new resist materials. In this paper, an EUV stochastic simulator is introduced for the modeling of EUV processes. The line-edge roughness (LER) and resist characters are described for the requirements of 5-nm pattern performance using this stochastic simulation. Through the opportunity to simulate EUVL materials and processes, the performance of EUVL resist and the optimization of EUVL parameters for 5-nm pattern formation can be conducted.

For the wavelength reduction to overcome the diffraction limit of the optical lithography, the surface plasmon lithography (SPL) has lower cost and simpler system configuration than the extreme ultraviolet (EUV) lithography. In this paper, for the below 10-nm critical dimension (CD) as one of critical challenges in the lithography technology, SPL based on the SP interference and metamaterial in bowtie and hexahedron structures is proposed and demonstrated by using computer simulations such as the rigorous coupled-wave analysis (RCWA) method and the finite difference time domain (FDTD) method. For 193-nm wavelength, the minimum FWHM (the full width at half maximum) of the transverse magnetic (TM) intensity in xz plane (and yz plane) is 10-nm (and 7-nm) in a bowtie plasmonic structure. For hexahedron structures, the minimum 30-nm FWHM of TM intensity with 193-nm wavelength is improved to the minimum 16-nm FWHM by using metamaterial and SP interference.

For the extreme ultraviolet (EUV) lithography, multilayer (ML) defects such as bump and pit defects can disrupt the phase of reflected field and degrade aerial images on wafer. In this paper, a defect printability and repair simulator (DPRS) is introduced to predict and repair the effect of ML defects in EUV aerial images. DPRS is composed of multilayer growth by using Gaussian function and Stearns's method, mask simulation by using a scattering matrix (S-matrix) analysis method, and projection simulation by using Köhler's illumination. For bump and pit ML defects, the combining the modified absorber and the layer-by-layer ML peeling is better than other methods. This study can be helpful in understanding EUV defect and also give insight into the EUV defect compensation for the device volume production.

The extraordinary optical transmission through a sub-wavelength size metal-aperture and metamaterials has been tremendous interests for the untilization of the surface plasmon polariton (SPP). Its technology, however, is hard to apply for the optical lithography process. In this study, a maskless plasmonic lithography (MPL) is modeled and simulated for 15-nm critical dimension (CD). The near-field intensity with the plasmonic phenomena of aperture shapes is described due to aperture parameters by using a scattering matrix (S-matrix) analysis method and the finite difference time domain (FDTD) method. MPL parameters of bowtie structures are optimized and improved for the imperfection of the resist pattern. The most dominant parameter on CD is gap size of bowtie by Taguchi method.

With the extreme ultraviolet (EUV) lithography, the performance limit of chemically amplified resists has recently been extended to 16-and 11-nm nodes. However, the line edge roughness (LER) and the line width roughness (LWR) are not reduced automatically with this performance extension. In this paper, to investigate the impacts of the EUVL mask and the EUVL exposure process on LER, EUVL is modeled using multilayer-thin-film theory for the mask structure and the Monte Carlo (MC) method for the exposure process. Simulation results demonstrate how LERs of the mask transfer to the resist and the exposure process develops the resist LERs.

Since the diffraction limit of Rayleigh criterion hardly creates finer features, the development for the quantum lithography of entangled photons, one of technologies beyond the diffraction limit, is a key merit without the shorter wavelength source tool. In the arbitrary pattern formation for the commercialization of this lithography, however, this quantum lithography is required to implement mask patterns and the conventional optical lithography. In this paper, for the quantum lithography of entangled photons, collective behavior of N-photon entangled states is modeled and simulated to show the effect of photon entangled states for 3-dimensional arbitrary pattern formation by using the rigorous coupled wave analysis (RCWA) and Kirchhoff analysis. For the enhanced resolution from the point of view that the de Broglie wavelength of a quantum state comprised of two entangled photons is half the classical wavelength associated with either photon, simulation results of entangled photons are similar to those of short wavelengths. However, both of simulation results show that the resolution of entangled photons is better than those of the shorter wavelengths. Simulation results can predict realistic better performance of entangled photons.

Authors thank Kiyoshi Minemura in Aichi University of Technology and Tomomi Uchiyama in Nagoya University, Japan for their helpful researches. This research was supported by the MIC(Ministry of Information and Communication), Korea, under the ITRC (Information Technology Research Center) support program supervised by the IITA(Institute of Information Technology Advancement) (IITA-2008-C109008010030).

Pattern reduction has generated much interest in developing effective methods of reducing the feature sizes of microelectronic and data-storage devices. For below-32-nm node technology, the bottom-up approach, namely, self-assembly, has obstacles such as the insufficient support of processes and mass production, and the top-down approaches, namely, photolithography, the extremely ultraviolet (EUV) technique, and high-index fluid-based immersion ArF lithography, are still under development. As one of the solutions for below-32 nm node technology, double patterning technology (DPT) has been researched. In this paper, we analytically report that the DPT pattern is 3/2 times denser than the double exposure technology (DET) pattern, and three times denser than the single-exposure pattern. An algorithm of the inverse lithography technology (ILT) based on not mathematical functions but pixels and the lithography model is described and simulated. An algorithm of the DPT mask design with ILT is described in terms of how to use this ILT method in an integrated computational lithography platform to handle the DPT. For its accuracy, its simulation results are compared with the simulation results obtained without ILT and with the conventional serif optical proximity correction (OPC). The ILT results are better than other results. Hence, the ILT based on pixels and the lithography model and its application algorithm of DPT can reduce the design complexity of mask design and the cost of production of DPT for below 32 nm half pitch pattern generation.

The patterning of very small features is a difficult challenge for current lithography technology. The thermal process is an easy and simple solution involving no any additional processes. This process is one of extension techniques for 248 nm KrF and 193 nm ArF lithography equipment and chemically amplified resists (CARs). However, thermal effects are severe, thus, more critical approaches are needed for small pattern formation. In this paper, thermal processes are described and modelled for evaluating property changes in 248 and 193 nm CARs. The simulated results agree well with experimental results. Those processes can be used to shrink not only contact hole patterns but also space patterns. For the optical proximity correction (OPC) of thermal effects, an orthogonal functional method is introduced. These orthogonal functions depend on pattern types such as contact holes and spaces. By using this method, underbaked postexposure bake and thermal reflow are performed for the below-45-nm contact hole pattern for a 248 nm KrF CAR and the 32 nm contact hole pattern for a 193 nm ArF CAR. Thus, an orthogonal functional method is useful for carrying out the OPC for thermal effects.

For 32-nm technology node, thermal treatment is one of the process extension techniques with 193-nm ArF lithography equipment and chemically-amplified resist (CAR). However, it is difficult to use these techniques in the manufacture process because the optical proximity effect of thermal effects is quite severe. In this paper, thermal processes, such as softbake, post-exposure bake and thermal reflow, are described and modeled to investigate the property changes of a positive type, 193-nm CAR. The simulated results agree well with the experimental results. For the optical proximity correction (OPC) of the thermal effects, an orthogonal functional method is introduced. Due to contact hole (C/H) pattern, the underbake of post-exposure bake (PEB) and thermal reflow are performed for the 45-nm critical dimension (CD) by using the OPC simulated images, to demonstrate the possibility of controlling these thermal processes for the formation of 32-nm CD.

For technologies beyond diffraction limit, the plasmonic nanolithography can produce subwavelength structures using the broad beam illumination of the standard photoresist with the visible light. In this study, for the nano-pattern formation, the polarization effects of the transverse magnetic (TM) mode and the transverse electric (TE) mode about diffraction limit and plasmonic phenomena are described on basis of simulation results through the sub-wavelength aperture. TM mode is degraded in diffraction effects but enhanced in plasmonic effects due to the change distribution on the metallic surface and the waveguide resonances in slits. For the confidence of simulation results, those results are compared with experiment results of the pyramidal horn with mirror. For the contact lithography, it is shown that the resolution of plasmonic metamaterial masks is enhanced larger than that of the conventional mask by using a multi-layer method.

For the patterning of sub-100 nm contact holes, thermal reflow is suggested as a good method of resolving the cost problems of resolution-enhancement technology and the new lithography technology. However, it is difficult to use this process in lithography process because the optical proximity effect of thermal reflow is quite severe. In this study, the optical proximity effects before and after thermal reflow are described. Resist reflow is modeled and simulated for a top-view image. For repeated contacts and random contacts, thermal reflow biases are modeled and compensated for pattern arrays. Simulation results agree well with the experiment results in a small error range according to baking temperature, time, and pitch size. For the optical proximity correction of thermal reflow, two-stage corrections, and model-based optical proximity corrections before and after thermal reflow, are described. The model-based optical proximity correction before thermal reflow can be required using pull-simulated images rather than an aerial image as pattern critical dimension shrinks down to sub-100 nm. The possibility of thermal reflow for the formation of a sub-100 nm pattern is shown by simulating a model-based optical proximity correction of a 45 nm contact hole.

In this study, after Dill’s model is discussed for transmittance and refractive indices of the non-chemically amplified resists, G- and I-line novolak resists, and the chemically amplified resists, a modification of Dill’s model as a new exposure model is introduced. The simulation results obtained using this new model with the multi-thin film interface method and the Berning theory have shown a good matching to the experimental data. Also, the simulated transmittance change due to the exposure parameters are used to analyze the influence of the coefficients on the transmittance.

Pattern reduction has created a great deal of interest in finding effective methods to reduce the feature sizes of microelectronic and data-storage devices. These methods are divided between top-down approach such as photolithography and bottom-up approach such as self-assembly. For below 32 nm node technology, top-down approach has obstacles such as diffraction-limited resolution and high cost of ownership and bottom-up approach has obstacles such as the insufficient support of processes and mass production. Thermal treatment is a new process extension technique using current-day lithography equipment and chemically amplified resists (CARs). In the lithography process, thermal processes are softbake (SB), post-exposure bake (PEB), and thermal reflow. The purpose of SB is to remove excess solvent after spin coating, relieve strain in the solid film, and provide better adhesion to the substrate. The purpose of PEB is to reduce the standing wave effect and, thus, increase linewidth control and resolution. The purpose of thermal reflow is to reduce the pattern size by using thermal heating at temperatures about the glass transition temperature of the resist after development. These three kinds of thermal processes are essentially the same for heat treatment, but they have different effects on CD. Hence, it is required to understand mechanism behaviors that drive photo resist image and to deal with optical proximity effects (OPEs) due to thermal processes. OPE is quite severe as the critical dimensions (CDs) shrink down to the sub-30 nm patterns. Although the simulation parameters are not used to analyze the chemical phenomena of thermal processes, the CD bias after thermal reflow can be predicted in the linear system. Through the optical proximity correction (OPC), the distorted image from OPE can be manipulated back to the original design. However, the thermal affects of CD is the non-linear system, so that the prediction of OPE is not easy. Hence, the understanding of mechanistic behaviors that drive photo resist image can make the physically corrected resist model, and achieve the best prediction of resist images across multiple process conditions. One of the most critical issues for sub-50-nm patterning is patterning a fine contact hole (C/ H). The resolution performance of contact hole patterns is lower than that of line and space patterns because the depth of focus (DOF) for patterning contact holes is insufficient due to the low aerial-image contrast. The resist reflow process is a good method due to its simplicity without the additional complex process steps and due to its efficient technique

Pattern reduction has created a great deal of interest in finding effective methods to reduce the feature sizes of microelectronic and data-storage devices. These methods are divided between top-down approach such as photolithography and bottom-up approach such as self-assembly. For below 32 nm node technology, top-down approach has obstacles such as diffraction-limited resolution and high cost of ownership. Bottom-up approach has obstacles such as the insufficient support of processes and mass production. As one of solutions, double patterning technology (DPT) has been researched. In this paper, DPT is analytically shown more dense patterns then single or double exposures. For the reduction of the DPT complexity, a mask design method, which is the inverse lithography technology (ILT) based on pixels and the lithography model, is described as an integrated computational lithography platform to handle the DPT. The ILT can use the decomposition of design and optical proximity correction for below 32 nm half pitch pattern generation. A simple example is performed for its verification.

The automation methods of mask design are described in this paper for double exposure and double patterning by using inverse lithography. This attempts to synthesize the mask for the desired wafer pattern by inverting the forward model from mask to wafer. The combination of double exposure, double patterning, and inverse lithography is discussed for 20 nm half pitch pattern generation.

Current 193 nm optical lithography and commercially available 193 nm resists are pushed far beyond previously expected critical dimension by using the process extension technology for the resolution enhancements technology. This paper deals with three kinds of process extension technologies such as thermal treatment, polarization, and double patterning. Those technologies are tried to model and analyze. Supposed the 50% pattern shrinkage due to thermal treatment, 25% resolution enhancement due to polarization, and the 50% pattern shrinkage due to double patterning, an effective combination can generate a sub-50 nm pattern. When pattern size is smaller, optical proximity effects are more severe. After describing optical proximity effects for each of technologies, optical proximity correction methods are discussed.

Since 193 nm ArF lithography is the practical wavelength, the high and hyper numerical aperture technologies prolong and start its lithography ending for further improvement of the resolution. Application of polarization illumination leads to the 25 % increase of depth of focus and exposure latitude. Hence, polarization simulation becomes a key technology for its control and application. In this paper, polarization of numerical aperture is modeled into aerial image by using a vector model as an improved scalar model. In terms of small half pitch nodes, polarized effects are described into aerial and resist images. For high and hyper numerical aperture, the TM polarized degradation of aerial and resist images are severe, so that the reduction of TM polarization is required for below 45 nm half pitch pattern formation. In the comparison with the un-polarized small half pitch formation, the optical proximity effects of TE polarization are similar for dense patterns, but those effects are different for sparse patterns. Hence, the sparse pattern formation of TE polarization is preferred to the optical proximity correction.

For the sub-100-nm pattern generation, thermal treatment is one of the new process extension techniques with current day lithography equipment and chemically-amplified resist. The key element to introduce these new techniques is in the understanding of mechanistic behaviors that drive photo resist image rendering. Thermal processes, such as soft bake, post exposure bake, and thermal reflow process, are same thermal processes, but produce different chemical and physical behaviors in the chemically-amplified resist. In this paper, those thermal processes are described and modeled for the property change of a positive type 193 nm chemically amplified resist. Those simulated results agree well with experimental results. Those thermal effects move the boundaries of resist bulk images to a center point and make these boundaries dense. Due to pattern types, the thermal reflow process technology and the overbake and underbake technologies of soft bake and post exposure bake can be used for the 45 nm critical dimension. Combining the benefits of thermal processes becomes possible to produced the below 45 nm critical dimension.

In the semiconductor lithography process, the thermal flow process after development resolves the patterning of sub-100 nm contact hole and saves cost problem of resolution enhancement technology. In this study, resist flowing behavior and contact hole shrinkage are described by using the thermal reflow length of the boundary movement method and the analysis of image process. The viscosity variable affects the shrinkage of critical dimension. This variable is extracted from the experimental data by using a proposed equation. Those results have a good agreement with the experimental results in both contact hole size and the vertical wall of profile according to the baking temperature and time. Although the most effective process of the 193 nm chemically amplified resist is the post-expose bake process for critical dimension, the parameter of the development process, the inhibition reaction order of the enhanced Mack model, is shown as the most controllable parameter for critical dimension in thermal reflow process.

In this paper, model-based optical proximity correction (OPC) software for thermal reflow is introduced and verified for its accuracy in comparison with experiment results due to pitch sizes. For its purpose, the resist reflow process (RRP) is modeled, and the OPE effects after development and thermal reflow are described by using the top view images. The sensitivity of the optimized parameters for contact hole and side wall angle of simulated profiles is analyzed using the response surface methodology (RSM). Through the quantization of sensitivity of these easy-to-optimized simulation parameters, lithography processes are quantified and compared between line-and-space and contact hole. By using the behavior model on the chip layout, the designed mask dimensions are changed due to the correction of the RRP image. The final profiles after the model-based OPC show that the optical proximity effects are reduced to an acceptable level even with the mask errors included.

As lithography pushes to the nanoline dimensions, even less drastic changes during photoresist processes can have a non-disregarding impact on proximity behavior, thus these changes can affect the optical proximity correction rules and models. In this study, after the descriptions of the modified mechanical method of rinse and dry processes and the model of etch simulation for dense and isolated lines, the impact on proximity behavior is described and analyzed by using the quantitative sensitivity of the pattern collapse and etch properties on the critical dimension. The effect for optical proximity correction rules and the characterization of the mask error enhancement factor are discussed.

It is helpful in lithography process and developing resist to know the relationship between the critical dimension variation and simulation parameters such as aerial image parameters, the Dill exposure parameters, PEB (Post Exposure Bake) parameters, and development parameters. In this paper the profiles of a 193 nm CAR (Chemically Amplified Resist) were simulated with those various parameter, and those results were analyzed by the response surface methodology (RSM) approach to know the influence of independent factors on a dependent response and to optimize each process. Both the parameter effects of each process and the simulation process effects of the whole process were described about critical dimension and side wall angle so that the sensitivity of lithography process could be assumed. The development parameters were modified with those of flood exposure experiment according to the pattern density and pattern size for more accurate lithography simulation. Also those effects on critical dimension and side wall angle were analyzed. For the validity of our results the quantitative comparison between our results and those of a commercial tool was shown.

Current 193-nm optical lithography and commercially available 193-nm resists have been pushed far beyond the previously expected critical dimension by using process extension technology for resolution enhancement technology. This paper deals with three kinds of process extension technologies, thermal treatment, polarization, and double patterning. These technologies are modeled and analyzed. If a 50 % pattern shrinkage due to thermal treatment, a 25 % resolution enhancement due to polarization, and a 50 % pattern shrinkage due to double patterning are supposed, an effective combination can generate a sub-50-nm pattern. When the pattern size is smaller, optical proximity effects are more severe. After describing optical proximity effects for each of these technologies, we discuss optical proximity correction methods.