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In this paper, for the first time, we present a detailed RF experimental and simulation study of a 3-D multichannel SOI MOSFET (MCFET). Being different from the conventional planar technology, the MCFET features a total of three self-aligned TiN/HfO2 gate stacks fabricated on top of each other, allowing current to flow through the three undoped ultrathinned bodies (UTBs). In other words, the operation of the MCFET theoretically based on two UTB double-gate SOIs and a single-gate UTB fully depleted SOI (FDSOI) at the bottom. Using on-wafer S-parameters, the RF/analog figures-of-merit of an MCFET a gate length of 50 nm are extracted and discussed. Thanks enormous transconductance (gm) and very low output conductance, the RF/analog performances of MCFET-voltage gain (AVI) and early voltage (VEA) are superior compared with that single-gate UTB-FDSOI. However, these advantages diminish in terms of transition frequency (fT), due to the large total input gate capacitances (CGG). This inspires the introduction of spacer engineering in MCFET, aiming at improving both CGG and fT. The sensitivity of the spacer length to the RF/analog performances is experimentally analyzed, and the performance optimization is validated using ac simulation. This paper concludes that optimized MCFETs are a serious contender to the mainstream MOSFETs including FinFETs for realizing future low-power analog applications. [ABSTRACT FROM AUTHOR]

Abstract-Measurement and modeling procedures to accurately extract a small-signal equivalent circuit of advanced MOSFETs up to 220 GHz are proposed. The methodology carried out goes from the vector network analyzer calibration to the simulation results using complex deembedding. Good comparisons between the measurement and the simulation data obtained using this procedure are shown up to 220 GHz. [ABSTRACT FROM AUTHOR]

In this paper, the high-frequency properties of MOSFETs at low-temperature operation are investigated through measurements and electrical simulations. The experimental results show that the device achieves a 335-GHz ƒmax and a 300-GHz ƒt when operating at low temperature (78 K), which constitutes, respectively, a 78% and 34% improvement compared to the room temperature performances (296 K). The minimum noise figure NFmin decreases from 1.4 dB (296 K) to 0.5 dB at 30 GHz (78 K), while the associated gain increases from 8 to 12 dB. [ABSTRACT FROM AUTHOR]

This letter provides an experimental demonstration of high-performance industrial MOSFETs thinned down to 5.7 \mu\m and transferred onto a 125- \mu\m-thick polyethylene naphthalate foil. The die stack transferred onto the organic substrate comprises the 200-nm-thick active layer and the 5.5- \mu\m-thick interconnection multilayer stack resulting in a light, compact, and bendable thin film. We unveil that dc and RF performances are invariant even for ultimate thinning down to the buried oxide layer. Furthermore, n-MOSFET performance is improved by \1.5\times compared with previous work, and the first demonstration of 100-GHz p-MOSFETs on an organic substrate is presented. Unity-current-gain cutoff and maximum oscillation frequencies as high as 150/160 GHz for n-MOSFETs and 100/130 GHz for p-MOSFETs on a plastic substrate have been measured, respectively. [ABSTRACT FROM PUBLISHER]