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AlGaN/GaN metal insulator semiconductor heterostructure field effect transistors (MISHFETs) with different thickness of in-situ silicon carbon nitride (SiCN) cap layer were investigated. It was found that in-situ SiCN layer not only increases the two dimensional electron gas (2DEG) density, but also effectively passivates the surface of the AlGaN/GaN MISHFET. The fabricated device with 2 nm-thick SiCN cap layer exhibits superior device performances, such as larger maximum transconductance ( $\text{g}_{\mathrm{ m}}$ ) and higher on/off drain-current ratio ( $\text{I}_{\mathrm{ ON}}/{\mathrm{ I}}_{\mathrm{ OFF}}$ ) compared to those of the device without SiCN cap layer.

Low-frequency noise (LFN) performances are investigated in a normally-off GaN metal-oxide-semiconductor field-effect transistor (MOSFET) fabricated by utilizing the tetramethylammonium hydroxide (TMAH) wet etching. The normalized power spectral densities ( $\text{S}_{Id}/\text{I}_{d}^{2})$ are measured and perfectly matched with both the correlated mobility fluctuations (CMF) and Hooge mobility fluctuations (HMF) noise models. From the curves of ( $\text{S}_{Id}/\text{I}_{d}^{2})$ dependent on the gate overdrive voltage (V g – $\text{V}_{th})^{-1}$ , it is also confirmed that the mobility fluctuations prevail in the fabricated GaN device. The calculated Hooge constants ( $\alpha _{H}$ ) according to the (V g – $\text{V}_{th}$ ) are obtained to be 10−2 ~ 10−3. The reason for the dominance of the mobility fluctuations and the relatively low $\alpha _{H}$ is attributed that the TMAH wet etching effectively removes the plasma etching damage and fully recovers the crystal quality of GaN channel.

Gate leakage current in lateral GaN wrap-gate nanowire transistors (WG-NWT) was investigated using current density–voltage (Jg–Vg) characteristics at room temperature. We found that the gate leakage current is strongly dependent on the top corner angle of the gate architecture. This leakage current was characterized by considering hopping (Poole–Frenkel emission) and trap-assisted thermionic emission mechanisms. Despite its smaller gate area, the gate leakage current of the lateral GaN WG-NWT without a 2DEG channel was higher than that of the device with a 2DEG channel for all applied gate biases. The reason for this is that the lateral GaN WG-NWT without 2DEG channel has a triangular cross-section with a sharp top corner angle resulting in a strong electric field due to geometrical field enhancement.

Charge trapping effects are considered as one of the most severe reliability issues in gallium nitride (GaN)/aluminium gallium nitride (AlGaN) metal-insulator-semiconductor HEMTs (MISHEMTs). Thus, the identification of the origin and the physical properties of active defects is one of the key factors to improve the stability of GaN technology. In this work, we suggest two neighboring nitrogen vacancies as the origin of correlated random telegraph noise (RTN) emissions in a GaN/AlGaN fin-MISHEMT. We determine the magnitude of electrostatic coupling between these two defects by using three different approaches and verify the results by simulating the RTN emissions of a similar system using a Hidden Markov Model (HMM).

Temperature-based organic–inorganic photodiodes have recently become attractive applications in branches of science and technology with eco-friendly and hybrid concepts. Here, we describe the use of salmon DNA (SDNA) biomolecules as temperature and light sensors. We demonstrate the temperature- and light-sensitive mechanism of polarity switching in metal/organic/n-GaN bio-hybrid photodiodes based on salmon DNA-cetyltrimethylammonium chloride (SDNA-surfactant). The SDNA-surfactant/n-GaN bio-hybrid temperature photodiode (Bio-HTPD) shows negative bias shift of current (I)–voltage (V) plots by 0.70 and 0.42 V compared to zero-bias at temperatures of 275 and 300 K, respectively, under light illumination. However, the I–V plots of the Bio-HTPD moved towards positive bias by 0.08 V compared to zero-bias at 325 K under light irradiation. This phenomenon resulted in electrically negative photocurrents up to room temperature, which remarkably switched to positive photocurrents at above room temperature. The temperature variations are closely associated with charge activation and unidirectional transport in the SDNA-surfactant biomolecule. Moreover, the change from negative to positive photocurrent could be related to high electron–hole pair generation at higher transition temperature. The formation of an energy band model with thermal hopping is proposed, which explains the reasonable charge transport mechanism.

We have proposed a method of surface passivation with high-temperature atomic layer-deposited (ALD) Al2O3 layer on the fully recessed anode AlGaN/GaN-based Schottky-barrier diode (SBD) and systematically analyzed the cause of the lateral and the vertical leakage component in the SBD. The forward turn-on voltage of the recessed SBD decreased to 0.38 V from the value of 0.8 V of the nonrecessed SBD due to the lowered barrier height. Application of the ALD Al2O3 surface passivation layer to the recessed SBD, which was deposited at higher temperature (550 °C), significantly improved the performances of the proposed SBD such as high on-current of 12 A at 1.5 V and increased breakdown voltage of 780 V with greatly decreased reverse leakage current (at least 3 orders lower in magnitude), compared to the corresponding on-current of 6 A at 1.5 V and breakdown voltage of 510 V of the reference SBD.

We investigated the effects of in situ silicon carbon nitride (SiCN) cap layer of AlGaN/GaN high-electron mobility transistors (HEMTs) on DC, capacitance-voltage (C-V) and low-frequency noise (LFN). The proposed device with SiCN cap layer exhibited enhanced drain current, reduced gate leakage current, low interface trap density (Dit), and high on/off ratio thanks to the passivation effect, compared to the device without SiCN cap layer. Both devices clearly showed 1/f noise behavior with carrier number fluctuations (CNF), regardless of the existence of SiCN cap layer. The proposed device presented the relative low trap density (Nit) and reduced access noise due to the effective surface passivation in source-drain access region compared to the device without SiCN cap layer. From the improved DC, C-V and noise results of the proposed device, the in situ SiCN cap layer plays an important role in the passivation layer and gate oxide layer in AlGaN/GaN HEMT.

AlGaN/GaN Schottky barrier diodes (SBDs) with high Al composition and high temperature atomic layer deposition (ALD) Al2O3 layers were investigated. Current&ndash, voltage (I&ndash, V), X-ray photoelectron spectroscopy (XPS), atomic force microscope (AFM), and capacitance&ndash, voltage (C&ndash, V) measurements were conducted in order to find the leakage current mechanism and reduce the reverse leakage current. The fabricated AlGaN/GaN SBDs with high Al composition exhibited two orders&rsquo, higher leakage current compared to the device with low Al composition (20%) due to large bulk and surface leakage components. The leakage current measured at &minus, 60 V for the fabricated SBD with Al2O3 deposited at temperature of 550 &deg, C was decreased to 1.5 &mu, A, compared to the corresponding value of 3.2 mA for SBD with nonpassivation layer. The high quality ALD Al2O3 deposited at high temperature with low interface trap density reduces the donorlike surface states, which effectively decreases surface leakage current of the AlGaN/GaN SBD.

In this study, a PdAl (20 nm)/Au (30 nm) metal stack scheme is used for forming low-ohmic-resistance contact on Mg-doped (1.5 &times, 1017 cm&minus, 3) p-type AlGaN at various annealing temperatures. Using a circular-transmission line model, the specific contact resistance (&rho, c) of PdAl/Au/p-AlGaN ohmic contact is determined via the current&ndash, voltage (I&ndash, V) characteristics. As-deposited contacts demonstrate non-linear behavior. However, the contact exhibits linear I&ndash, V characteristics with excellent ohmic contact of &rho, c = 1.74 &times, 10&minus, 4&Omega, cm2, when annealed at 600 &deg, C for 1 min in a N2 atmosphere. The Ga and Al vacancies created at the PdAl/Au and p-AlGaN interfaces, which act as acceptors to increase the hole concentration at the interface. The out-diffusion of Ga as well as in-diffusion of Pd and Au to form interfacial chemical reactions at the interface is observed by X-ray photoelectron spectroscopy (XPS) measurements. The phases of the Ga&ndash, Pd and Ga&ndash, Au phases are detected by X-ray diffraction (XRD) analysis. Morphological results show that the surface of the contact is reasonably smooth with the root-mean-square roughness of 2.89 nm despite annealing at 600 &deg, C. Based on the above experimental considerations, PdAl/Au/p-AlGaN contact annealed at 600 &deg, C is a suitable p-ohmic contact for the development of high-performance electronic devices.

AlxGa1&minus, xN/GaN heterostructures with two kinds of Al composition were grown by metal organic chemical vapor deposition (MOCVD) on sapphire substrates. The Al compositions in the AlGaN barrier layer were confirmed to be 13% and 28% using high resolution X-ray diffraction (HRXRD). AlxGa1&minus, xN/GaN high-electron mobility transistors (HEMTs) with different Al compositions were fabricated, characterized, and compared using the Hall effect, direct current (DC), and low-frequency noise (LFN). The device with high Al composition (28%) showed improved sheet resistance (Rsh) due to enhanced carrier confinement and reduced gate leakage currents caused by increased Schottky barrier height (SBH). On the other hand, the reduced noise level and the low trap density (Nt) for the device of 13% of Al composition were obtained, which is attributed to the mitigated carrier density and decreased dislocation density in the AlxGa1&minus, xN barrier layer according to the declined Al composition. In spite of the Al composition, the fabricated devices exhibited 1/&fnof, noise behavior with the carrier number fluctuation (CNF) model, which is proved by the curves of both (SId/Id2) versus (gm/Id)2 and (SId/Id2) versus (Vgs&ndash, Vth). Although low Al composition is favorable to the reduced noise, it causes some problems like low Rsh and high gate leakage current. Therefore, the optimized Al composition in AlGaN/GaN HEMT is required to improve both noise and DC properties.

We investigated the effects of GaN buffer resistance of AlGaN/GaN high-electron-mobility transistors (HEMTs) on direct current (DC), low-frequency noise (LFN), and pulsed I-V characterization performances. The devices with the highest GaN buffer resistance were grown on sapphire substrate using two-step growth temperature method without additional compensation doping. The proposed device exhibited the degraded off-state leakage current due to the improved GaN buffer quality compared to the reference devices with relative low buffer resistance, which is confirmed by high resolution X-ray diffraction (HRXRD). However, the proposed device with deep-level defects in GaN buffer layer showed the reduced hysteresis (∆Vth), increased breakdown voltage (BV), and enhanced pulse I-V characteristics. Regardless of GaN buffer resistance, all devices clearly showed 1/f behavior with carrier number fluctuations (CNF) at on-state but followed 1/f2 characteristic at off-state. From the 1/f2 noise characteristics, the extracted trap time constant (&tau, i) of the proposed device can be obtained to be 10 ms, which is shorter than those of the reference devices because of the full compensation of deep-level defects in the GaN buffer layer.

A tetramethyl ammonium hydroxide (TMAH)-treated normally-off Gallum nitride (GaN) metal-insulator-semiconductor field-effect transistor (MISFET) was fabricated and characterized using low-frequency noise (LFN) measurements in order to find the conduction mechanism and analyze the trapping behavior into the gate insulator as well as the GaN buffer layer. At the on-state, the noise spectra in the fabricated GaN device were 1/f&gamma, properties with &gamma, &asymp, 1, which is explained by correlated mobility fluctuations (CMF). On the other hand, the device exhibited Lorentzian or generation-recombination (g-r) noises at the off-state due to deep-level trapping/de-trapping into the GaN buffer layer. The trap time constants (&tau, i) calculated from the g-r noises became longer when the drain voltage increased up to 5 V, which was attributed to deep-level traps rather than shallow traps. The severe drain lag was also investigated from pulsed I-V measurement, which is supported by the noise behavior observed at the off-state.

We investigated the performances of GaN junctionless fin-shaped field-effect transistors (FinFETs) with two different types of gate structures; overlapped- and partially covered-gate. DC, low-frequency noise (LFN), and pulsed I-V characterization measurements were performed and analyzed together in order to identify the conduction mechanism and examine both the interface and buffer traps in the devices. The fabricated GaN junctionless device with overlapped-gate structure exhibits improved DC and noise performance compared to the device with partially covered-gate, even though its gate length is much larger. The LFN behavior was found to be dominated by carrier number fluctuations (CNF). At off-state, the device with partially covered-gate exhibits generation-recombination (g-r) noise on top of 1/ ${f}$ noise. This superposition is correlated with the severe current collapse revealed by pulsed I-V measurements. In contrast, the device with overlapped-gate shows clear 1/ ${f}$ behavior without g-r noise.

GaN-based materials are expected to show excellent immunity against short-channel effects because they have relatively lower permittivity and higher electron effective mass, compared to other materials such as Si, Ge, and In(Ga)As. To further reduce the short-channel effects, it is important to enhance the gate controllability of the device by utilizing a gate-all-around (GAA) structure. In this article, GaN vertical GAA nanowire MOSFETs with various diameters of 120, 75, and 45 nm have been fabricated. The device with a diameter of 120 nm shows a threshold voltage of 0.7 V, drain saturation voltage of 0.5 V, and subthreshold swing of 70 mV/decade, which would be suitable for low-voltage/power applications. However, the devices with smaller diameters of 75 and 45 nm show peculiar characteristics, such as a second rise of the drain current in output characteristics and a negative transconductance.

We investigate the DC, C–V, and pulse performances in GaN-based nanowire gate-all-around (GAA) transistors with two kinds of geometry: one is AlGaN/GaN heterostructure with two dimensional electron gas (2DEG) channel and the other is only GaN layer without 2DEG channel. From I–V and C–V curves, the fabricated GaN nanowire GAA transistor with AlGaN layer clearly exhibits normally-on operation with negative threshold voltage (Vth) due to the existence of 2DEG channel on the trapezoidal shaped GaN nanowire. On the other hand, the GaN nanowire GAA transistor without AlGaN layer presents a positive Vth (normally-off operation) due to the absent of 2DEG channel on the triangle shaped GaN nanowire. However, both devices show the similar temperaturedependent I–V characteristics due to the combination of bulk channel and surface channel in GaN nanowire GAA channel are mostly contributed, rather than the 2DEG channel. GaN-based nanowire GAA transistors demonstrate to almost negligible current collapse phenomenon due to the perfect GAA gate structure in GaN nanowire. The proposed GaN-based nanowire GAA transistors are very promising candidate for both high power device and nano-electronics application.

GaN gate-all-around (GAA) vertical nanowire MOSFET (VNWMOSFET) with channel length of 300 nm and diameter of 120 nm, the narrowest GaN-based vertical nanowire transistor ever achieved from the top-down approach, was fabricated by utilizing anisotropic side-wall wet etching in TMAH solution and photoresist etch-back process. The VNWMOSFET exhibited output characteristics with very low saturation drain voltage of less than 0.5 V, which is hardly observed from the wide bandgap-based devices. Simulation results indicated that the narrow diameter of the VNWMOSFET with relatively short channel length is responsible for the low voltage operation. The VNWMOSFET also demonstrated normally-off mode with threshold voltage (VTH) of 0.7 V, extremely low leakage current of ∼10−14 A, low drain-induced barrier lowering (DIBL) of 125 mV/V, and subthreshold swing (SS) of 66–122 mV/decade. The GaN GAA VNWMOSFET with narrow channel diameter investigated in this work would be promising for new low voltage logic application.

We demonstrated dual-surface modification of GaN/AlGaN/GaN high-electron mobility transistors using tetramethylammonium hydroxide (TMAH) and piranha solutions prior to gate metallization. The TMAH-treated device exhibits improved performances with lower I-V hysteresis, in off-state leakage current and gate leakage current. The device performances were further significantly improved with applies additional piranha solution treatment right after the TMAH treatment, especially in hysteresis and 1/f-noise characteristics. It is found that the Schottky barrier height is high and ideality factor is low measured from I-V characteristics for the TMAH and piranha solution treated device. Reasonable gate leakage mechanisms were also discussed using Poole-Frenkel and Schottky emissions. In addition, it is observed that the magnitude of interface state density for the TMAH treatment after the piranha solution treated device shows significantly low compared to other devices. These excellent device-performances are observed due to the reason of dual-surface treatment which effectively decreases the surface trap density with an appropriate etching and passivation of the device surface exposed prior to the gate metallization.

International audience; Novel AlGaN/GaN omega-shaped nanochannel FinFETs with fin width of 50 nm were successfully fabricated using TMAH lateral wet etching with ALD HfO2 sidewall spacer. This fin structure apparently exhibited the current spreading in the access region, which results in the suppression of the drain lag effect at high drain voltage and sharp switching performance with subthreshold swing of 57–65 mV/decade. Excellent on- and off-state state performances for the fabricated device prove that the omega-shaped gate structure not only exhibits excellent gate controllability, but also decouples the active nano-channel region from the underlying thick buffer. The proposed device is very promising candidate for high-performance device applications.

International audience; Two different lateral GaN-based nanowire gate-all-around transistors with and without 2-D electron gas (2-DEG) channel were fabricated using top-down approach, and their noise characteristics were investigated. The nanowire transistor with 2-DEG channel had a relatively larger channel cross section, which consists of regrown AlGaN/GaN plateau on the trapezoidal GaN layer, and exhibited negative threshold voltages ( ${V} _{\textsf {th}}$ ). The transistor without 2-DEG channel consisted only GaN layer with triangular-shaped smaller channel cross section and exhibited a positive ${V} _{\textsf {th}}$ . Both nanowire transistors clearly demonstrated typical $1/{f}$ noise characteristics, but the AlGaN/GaN nanowire transistor with 2-DEG channel showed larger noise magnitude. The noise characteristics of both devices are well explained by the carrier number fluctuation with correlated mobility fluctuation model. Using this model, the interface trap densities and the remote Coulomb scattering parameters were extracted, revealing a worse interface quality for the AlGaN/GaN device on the one hand, but stronger scattering for the narrow GaN transistor on the other hand.

International audience; Using capacitance, conductance and noise measurements, we investigate the trapping behavior at the surface and in the core of triangular-shaped one-dimensional (1D) array of GaN nanowire gate-all-around field effect transistor (GAA FET), fabricated via a top-down process. The surface traps in such a low dimensional device play a crucial role in determining the device performance. The estimated surface trap density rapidly decreases with increasing frequency, ranging from 6.07 × 1012 cm−2·eV−1 at 1 kHz to 1.90 × 1011 cm−2·eV−1 at 1 MHz, respectively. The noise results reveal that the power spectral density increases with gate voltage and clearly exhibits 1/f-noise signature in the accumulation region (Vgs > Vth = 3.4 V) for all frquencies. In the surface depletion region (1.5 V < Vgs < Vth), the device is governed by 1/f at lower frequencies and 1/f2 noise at frequencies higher than ~ 5 kHz. The 1/f2 noise characteristics is attributed to additional generation–recombination (G–R), mostly caused by the electron trapping/detrapping process through deep traps located in the surface depletion region of the nanowire. The cutoff frequency for the 1/f2 noise characteristics further shifts to lower frequency of 102–103 Hz when the device operates in deep-subthreshold region (Vgs < 1.5 V). In this regime, the electron trapping/detrapping process through deep traps expands into the totally depleted nanowire core and the G–R noise prevails in the entire nanowire channel.

A crack-free GaN film grown on 4-inch Si (111) substrate is proposed using two-step growth methods simply controlled by both III/V ratio and pressure. Two-step growth process is found to be effective in compensating the strong tensile stress in the GaN layer grown on Si substrate. The high-resolution X-ray diffraction (XRD) rocking curves of (002) and (102) planes for the GaN epitaxial layer with two-step growth method are 317 and 432 arcsec, while the corresponding values for the reference sample without two-step growth method are 550 and 1207 arcsec, respectively. The reduced threading dislocation of GaN film with two-step growth method is obtained to be ~2 × 108/cm2, which is attributed to effectively annihilate and bend threading dislocation.

The initially dry-etched GaN layer with trapezoidal cross-section was laterally etched along the 〈11 2 ¯ 0〉 direction in the tetramethyl ammonium hydroxide (TMAH) solution to form a sidewall normal to the direction, which is corresponding to the (11 2 ¯ 0) plane. On the other hand, the etched sidewall still maintains the trapezoidal shape with angle of 58.4° when etched along the 〈1 1 ¯ 00〉 direction, which is corresponding to the (1 1 ¯ 01) plane. The GaN lateral nanowires with two different types of cross-sections, Ω-shape which is connected to underlying thick buffer layer through very narrow neck region and rectangle shape which is completely separated from underlying buffer layer, were realized with second lateral TMAH wet etching along the 〈11 2 ¯ 0〉 direction and by using the atomic layer deposited (ALD) HfO 2 layer as a sidewall spacer. The shape is dependent on both the height of the second dry-etched GaN sidewall below the HfO 2 spacer and the second wet etching time in TMAH solution. It was found that the dangling bond density at the surface of the crystal plane is responsible for the strong lateral anisotropic etching property of the GaN layer in TMAH solution.

International audience; Three types of bufferless GaN‐based FETs are fabricated on GaN‐on‐insulator (GaNOI) wafer: i) recessed‐gate AlGaN/GaN MOSFET with threshold voltage (Vth) of 4 V; ii) AlGaN/GaN nanowire gate‐all‐around (GAA) MOSFET with Vth of −2 V; and iii) GaN nanowire GAA‐MOSFET with Vth of 3.5 V. These devices are characterized and compared. The nanowire GAA‐MOSFET can be easily fabricated by simply removing buried oxide layer of GaNOI wafer. The recessed‐gate AlGaN/GaN MOSFET presents poor on‐current characteristic. On the other hand, the nanowire GAA‐MOSFETs show improved on‐current, reduced subthreshold swing (SS), good pinch‐off characteristics, and negligible current collapse phenomenon.

session 9: Noise characterization; International audience; We investigated the 1/f noise generation mechanism in surface-treated AlGaN/GaN heterojunction field-effect transistors (HFETs) with different gate length and gate-to-drain distance (Lgd). From the normalized drain current power spectral density (PSD) SIdId 2 versus Id, the AlGaN/GaN HFET with shorter gate length exhibited the Hooge mobility fluctuation (HMF) in subthreshold region and the carrier number fluctuation (CNF) above threshold gate voltage. On the other hand, the HFET with longer gate of 20 μm followed the correlated mobility fluctuation (CMF), irrespective of the gate bias. The extracted trap density (Nt) in the HFET with shorter gate length was noticeably less than that in the HFET with longer length. The input gate voltage power spectral density (PSD) proves that the HFET with shorter gate length suffers from higher interface roughness scattering.

This paper presents a new concept, supported by 3-D TCAD simulations, for improving the performance and subthreshold swing (SS) of enhancement-mode AlGaN/GaN fin-shaped field-effect transistors (FinFETs). By choosing appropriate device parameters, the formation of 2-D electron gas (2DEG) can be delayed such as to ensure simultaneous activation of 2DEG and sidewall MOS channels at positive threshold voltage for normally off operation. The 2DEG channel starts forming in the middle of the fin, whereas the edges are depleted by the lateral MOS gates. Not only increasing the gate voltage does the 2DEG charge increase, but also the effective width is enlarged being less depleted by the gates. This double-2DEG mechanism adds to the regular MOS channels on the sidewalls and enables enhanced performance. The 3-D TCAD simulations indicate that narrow FinFET (20 nm) can exhibit excellent switching characteristics: very low SS of 55 mV/decade, below the 60 mV/decade limit, high on/off current ratio of 1010, and good current driving capability due to the added 2DEG channel contribution. The maximum transconductance is 350 mS/mm, the drain current reaches 380 mA/mm, and the on resistance is as low as 0.018 $\text{m}\Omega \cdot \text {cm}^{2}$ .

International audience; Normally off lateral GaN nanowire gate-all-around MOSFETs have been fabricated on the GaN-on-insulator substrate. The dynamic measurement proved that the devices with various nanowire heights exhibit current collapse-free characteristics implying that the electrons in the isolated nanowire channel do not suffer from trapping effects. However, the dc current level measured at high drain and gate voltage is reduced to approximately one half of the value measured in dynamic mode. This is attributed to the difficulty in heat dissipation because the suspended lateral nanowire channel is thermally isolated from the substrate. However, the heat dissipation is mitigated as the nanowire size increases.

DC and 1/ ${f}$ noise performances of the AlGaN/GaN fin-shaped field-effect transistor (FinFET) with fin width of 50 nm were analyzed. The FinFET exhibited approximately six times larger normalized drain current and transconductance, compared to those of the AlGaN/GaN planar metal-insulator-semiconductor heterostructure field-effect-transistor (MISHFET) fabricated on the same wafer. It was also observed that the FinFET exhibited improved noise performance with lower noise magnitude of ${8.5} \times {10}^{-{15}}~\text{A}^{{2}}$ /Hz when compared to the value of ${8.7} \times {10}^{-{14}}\text{A}^{{2}}$ /Hz for the planar MISHFET. An intensive analysis indicated that both devices follow the carrier number fluctuation model, but the FinFET suffers much less charge trapping effect compared to the MISHFET (two orders lower charge trapping was observed). Moreover, the FinFET did not exhibit the Lorentz-like components, which explains that the depleted fin structure effectively prevents the carriers from being trapped into the underlying thick GaN buffer layer. On the other hand, the slope of the noise is 2 irrespective of drain voltage and apparently showed the Lorentz-like components, especially at high drain voltage in MISHFET device. This explains that the carrier trapping/detrapping between the 2-D electron gas channel and the GaN buffer layer is significant in MISHFET.

The capacitance-voltage (C-V) characterizations of Al2O3/GaN-on-insulator (GaNOI) structure, prepared with the Smart Cut technology, with and without tetramethylammonium hydroxide (TMAH) surface treatment have been investigated. The GaNOI structure consists of a 150nm-thick GaN layer and a 800m-thick Si3N4/SiO2 buried insulating layer deposited on sapphire substrate. For fabrication of the MIS capacitor, an Al2O3 layer with thickness of 28nm as a gate dielectric was deposited on the GaNOI wafer by atomic layer deposition (ALD). The calculated carrier concentration of the GaN layer on the buried insulator was increased to 2.81017cm3 from the value of ~51016cm3 for the as-grown undoped GaN layer prior to the wafer transfer. The MIS capacitor with TMAH surface treatment showed a positive threshold voltage shift with negligible hysteresis and low interface trap density compared to the capacitor without TMAH surface treatment. Severe frequency dispersion was observed regardless of the TMAH treatment due to the crystal defects generated during the complicated wafer transfer process. Display Omitted The Al2O3/GaN-on-insulator (GaNOI) capacitors were fabricated using TMAH surface treatment.The calculated doping density of GaN layer was obtained to 2.81017cm3.This capacitors exhibited the severe frequency dispersion due to the crystal damaged GaN layer.The TMAH surface-treated MIS capacitor showed better performances compared to the TMAH-free device.

Charge trapping in gallium-nitride (GaN) metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) is a serious reliability challenge but is still poorly understood. A promising opportunity to investigate physical defect properties has become available through nanoscale GaN fin-MIS-HEMTs which are small enough to be sensitive to the impact of individual defects. In this work, we extract the properties of four pre-existing single defects, which are identified by their correlated random telegraph noise (RTN) signals and step heights. We use a two-state non-radiative multi-phonon (NMP) model to extract their vertical positions, their trap levels and their apparent activation energies. We show that they are in close proximity to each other within the barrier layer and also share a similar trap-level despite their different capture and emission times. Furthermore, TCAD simulations are used to estimate the influence of the vertical and horizontal positions of single-traps which are in reasonable agreement with the experimental data.

White-light-emitting diodes (WLEDs) are promoted as environmentally friendly because they are energy saving-features and mercury-free aspects, but, rare-earth-free, metal-free, cost-competitive, and eco-friendly for brighter WLEDs are attractive but quite challenging in practice. This paper reports a new methodology using biopolymer luminous material in bio hybrid white-light-emitting diodes (Bio-HWLEDs) based on a trichromophore-doped cassava crystalline thick film that emits bright white light emission through a dual Fӧrster resonance energy transfer (FRET) process. The dual-FRET takes place from coumarin to sulforhodamine via the curcumin chromophore. The Bio-HWLED showed color co-ordinates (0.33, 0.32) that exactly matched with pure white light emission. The effect of temperature on luminescence and the activation energy for thermal quenching were determined using the temperature-dependent photoluminescence measurements. Moreover, Bio-HWLED showed a low luminous drop rate of 0.00069 s−1 to overcome the aggregation-induced quenching effect. These results pave the way towards the realization of commercially viable, large-scale and high-contrast bio hybrid light applications that are environmentally friendly.

AlGaN/GaN-based fin-shaped field-effect transistors with very steep side-wall have been fabricated by utilizing electron-beam lithography and subsequent anisotropic side-wall wet etch in tetramethyl ammonium hydroxide solution. The investigate device demonstrated extremely broad transconductance ( $g_{m})$ ranging from $\sim 0$ to $\sim 8$ V at $V_{D} = 10$ V, which is essential for high linearity device performance. Pulse measurement showed that the device exhibits negligible gate lag, but still suffers from drain lag. The device with $L_{\mathrm {GD}}$ of $17~\mu \text{m}$ exhibited excellent OFF-state characteristic with subthreshold swing of $\sim 58$ mV/decade, low OFF-state leakage current of $\sim 10^{-12}$ A, and breakdown voltage of $\sim 400$ V at $V_{G}=- 9$ V.

We have demonstrated the lateral multifinger-type Schottky barrier diode (SBD) with bonding pad over active structure fabricated on the AlGaN/GaN heterostructure prepared on sapphire substrate. The fabricated GaN-SBD with size of 9 mm2 exhibited excellent device characteristics such as forward current of 4.5 A at 1.5 V, leakage current of 6 μA at 600 V, and high breakdown voltage of 747 V. The temperature variations of GaN-SBD for the reverse recovery characteristics are negligible and the value of reverse-recovery charge (Q)rr of GaN-SBD is one twentieth of Si-diode at 175°C.

This letter presents the MISHFET with si-doped AlGaN/GaN heterostructure for power amplifier. The device grown on 6H-SiC(0001) substrate with a gate length of 180 nm has been fabricated. The fabricated device exhibited maximum drain current density of 837 mA/mm and peak transconductance of 177 mS/mm. A unity current gain cutoff frequency was 45.6 GHz and maximum frequency of oscillation was 46.5 GHz. The reported output power density was 1.54 W/mm and A PAE(Power Added Efficiency) was 40.24 % at 9.3 GHz.

International audience; Lateral GaN nanowire gate-all-around transistor has been fabricated with top-down process and characterized. A triangle-shaped GaN nanowire with 56 nm width was implemented on the GaN-on-insulator (GaNOI) wafer by utilizing (i) buried oxide as sacrificial layer and (ii) anisotropic lateral wet etching of GaN in tetramethylammonium hydroxide solution. During subsequent GaN and AlGaN epitaxy of source/drain planar regions, no growth occurred on the nanowire, due to self-limiting growth property. Transmission electron microscopy and energy-dispersive X-ray spectroscopy elemental mapping reveal that the GaN nanowire consists of only Ga and N atoms. The transistor exhibits normally-off operation with the threshold voltage of 3.5 V and promising performance: the maximum drain current of 0.11 mA, the maximum transconductance of 0.04 mS, the record off-state leakage current of ∼10−13 A/mm, and a very high Ion/Ioff ratio of 108. The proposed top-down device concept using the GaNOI wafer enables the fabrication of multiple parallel nanowires with positive threshold voltage and is advantageous compared with the bottom-up approach.

session B7L-D: Wide Bandgap Innovative Devices; International audience; AlGaN/GaN nanowire omega-FinFETs have been fabricated and characterized. Tetramethylammonium hydroxide (TMAH) lateral wet etching and atomic layer deposited (ALD) HfO2 sidewall spacer result in very sharp vertical edges and fin widths from 200 nm down to 30 nm. Omega-gate structure exhibits excellent gate controllability and separates the channel from the underlying thick GaN buffer layer, which leads to excellent device performances: maximum drain current of 480 mA/mm, maximum transconductance of 370 mS/mm, extremely low leakage current of ~ 10-11 mA, subthreshold swing of 57 ~ 63 mV/decade, close to the theoretical limit, very high Ion/Ioff ratio of ~ 1010, and breakdown voltage of ~ 220 V. An increase in Ron was observed due to current collapse at the drain lag condition, but the saturation current was fully recovered at higher drain voltage. This is because the current spreads from the narrow fin to the wide access region and the gate overlapped configuration prevents the trapping at the surface and in the buffer layer, which leads to the reduced access resistance in between the gate-to-source and gate-to-drain compared with the planar AlGaN/GaN MISHFET.

International audience; AlGaN/GaN fin-shaped field-effect transistors (FinFETs) with variable fin width have been fabricated and characterized. Low-temperature measurements reveal distinct operation modes for wide FinFET, narrow FinFET and planar FET. The wide fin device exhibits broad transconductance (gm) that decreases sublinearly with increasing temperature due to the existence of the sidewall metal–oxide–semiconductor (MOS) channel. By comparison, the conventional planar AlGaN/GaN metal–insulator–semiconductor heterostructure FET (MISHFET) features relatively narrow gm curve and near-exponentially decay of gm with temperature. The effect of the sidewall channel becomes more prominent for the narrow fin device and leads to two distinct gm peaks. The first peak at negative gate voltage corresponds to the two-dimensional electron gas (2-DEG) channel, while the second peak at positive gate voltage is related to the sidewall MOS channel. Measurements also show that the electrons in 2-DEG channel experience polar-optical-phonon scattering unlike the electrons in the sidewall MOS channel which are mainly subject to Coulomb scattering.

International audience; The AlGaN/GaN nanowire omega-shaped-gate FinFET have been successfully fabricated demonstrating much improved performance compared to conventional AlGaN/GaN MISHFET. The AlGaN/GaN omega-shaped-gate FinFET exhibited the remarkable on-state performances, such as maximum drain current of 1.1 A/mm, low on-resistance, and low current collapse compared to that of the conventional device structure. In addition, the excellent off-state performances were measured: low off-state leakage current as low as ∼10−10 mA, the theoretical SS value of ∼62 mV/dec, and high I ON /I OFF ratio (∼109). Improved dc performances were obtained for omega-shaped-gate structure due to the fully depletion of the active fin body and perfectly separation of the depleted fin from the underlying thick GaN buffer layer. Furthermore, the additional reason for the enhanced device performance of the proposed device is the improved gate controllability compared to the conventional MISHFET. The proposed nano-structure device is very promising candidate for the steep switching device applications.

We have grown high quality GaN layers on (111)-oriented silicon substrate using a two-step growth method and fabricated high-performance normally-off n-channel GaN Schottky-barrier MOSFET (SB-MOSFET). Indium-tin-oxide (ITO) was used as Schottky-barrier contact for source and drain (S/D) because the work function of ITO is close to the electron affinity of GaN. Due to enhanced crystalline quality and reduced surface roughness of GaN layer grown by two-step process, the fabricated device exhibited much improved performances: sufficiently high threshold voltage of 3.75V, subthreshold slope of 171mV/dec, low specific on-resistance of 9.98m@Wcm^2, and very high field-effect mobility of 271cm^2/Vs. This is the highest mobility value among the GaN MOSFETs ever reported so far.

A vertical-type mesa-gate GaN metal–oxide semiconductor field-effect transistor (MOSFET) has been fabricated. The mesa-gate structure can be easily achieved by a single deep etch to the n+-GaN which is the drain of the device, whereas the trench-gate structure, the commonly used structure for the vertical-type MOSFETs, requires an additional etching process to define the gate region. The mesa-gate GaN MOSFET exhibited a normally-off operation with the threshold voltage of 3 V, a normalised drain current of ∼ 55 mA/mm and a high on/off current ratio of 108.

Display Omitted The TMAH-treated FinFET improved DC and noise performance.TMAH treatment enhances the interface quality between the Al2O3 and GaN surface.TMAH treatment reduces sidewall defects improves the noise performances.It also eliminates the plasma damage, roughness and results in lower trap density.The device without TMAH treatment suffers from correlated number fluctuations. In this paper, we have fabricated and investigated the AlGaN/GaN fin-shaped field-effect transistors (FinFETs) with and without TMAH surface treatment. DC and noise characteristics of the FinFETs were compared to evaluate the interface quality between Al2O3 layer and the side-wall GaN surface. The tetramethyl ammonium hydroxide (TMAH)-treated device with a fin width of 70nm and gate length, Lg=5µm exhibited excellent device performances, such as drain current of 0.16mA and transconductance (gm) of 0.11ms, both 30% improved, and extremely small gate leakage current of about 10-9A at Vgs=-5V which is approximately two orders lower in magnitude compared to that of the device without TMAH treatment. Improved low-frequency noise performances were obtained for TMAH treated device due to the enhanced side-wall quality after the TMAH surface treatment. The trap density was found to be reduced approximately one order after TMAH treatment. Thus, simple surface treatment not only smoothens the sidewall surface but also eliminates the plasma damage caused during the fin etching, which leads to the reduction of trap density in AlGaN/GaN FinFETs.

Display Omitted Subthreshold slope of wide fin is lower than 60mV/dec.Subthreshold slope of narrow fin is higher than 200mV/dec.Wide fin exhibit severe hysteresis of threshold voltage.Narrow fin exhibit negligible hysteresis of threshold voltage.Trapping effect from sidewall is correlated to the fin width. AlGaN/GaN FinFETs with various fin widths (Wfin), which have both a 2DEG channel and two sidewall MOS channels, have been fabricated by using electron-beam lithography and subsequent sidewall wet etch in tetramethyl ammonium hydroxide (TMAH) solution. The devices with wide Wfin of 150nm showed normally-on operation with threshold voltage (Vth) of -2.5 and -5.0V, respectively. The devices also exhibited broad transconductance (gm), and excellent off-state performance with very low subthreshold swing (SS). On the other hand, narrow device with Wfin of 50nm exhibited normally-off operation with Vth of 3.0V, but degraded SS due to trapping effect at the sidewall of fin.

International audience; An AlGaN/GaN-based Ω-shaped nanowire fin-shaped FET (FinFET) with a fin width of 50 nm was fabricated using tetramethylammonium hydroxide (TMAH)-based lateral wet etching. An atomic layer deposited (ALD) HfO2 side-wall layer served as the etching mask. ALD Al2O3 and TiN layers were used as the gate dielectric and gate metal, respectively. The Ω-shaped gate structure fully depletes the active fin body and almost completely separates the depleted fin from the underlying thick GaN buffer layer, resulting in superior device performance. The top-down processing proposed in this work provides a viable pathway towards gate-all-around devices for III–nitride semiconductors.

A silicon-based micro-reactor to amplify small amount of deoxyribonucleic acid (DNA) has been fabricated using micro-electro-mechanical systems (MEMS) technology. Polymerase chain reaction (PCR) of DNA requires a precise and rapid temperature control. A Pt sensor is integrated directly in the chamber for real-time temperature measurement and an infrared lamp is used as external heating source for non-contact and rapid heating. In addition to the real-time temperature sensing, PCR needs a rapid thermocycling for effective PCR. For a fast thermal response, the thermal mass of the reactor chamber is minimized by removal of bulk silicon volume around the reactor using double-side KOH etching. The transparent optical property of silicon in the infrared wavelength range provides an efficient absorption of thermal energy into the reacting sample without being absorbed by silicon reactor chamber. It is confirmed that the fabricated micro-reactor could be heated up in less than 30 sec to the denaturation temperature by the external infrared lamp and cooled down in 30 sec to the annealing temperature by passive cooling.

Heavily doped GaN nanochannel fin-shaped field-effect transistors (FinFETs) without heterojunction have been fabricated and characterized for the first time. Simplified pragmatical technology for GaN epitaxial growth and FinFET process was used to achieve nanodevices with a channel width from 40 to 100 nm and a gate length of 1 μm. They exhibit excellent on-state performance, such as maximum drain current of 670 mA/mm and maximum transconductance of 168 mS/mm. Record off-state performance was measured: extremely low leakage current of ~ 10-11 mA and source-drain breakdown voltage of ~280 V. The subthreshold slope of 68 mV/decade is close to the theoretical limit (60 mV/decade, so far achieved only in SOI MOSFETs) and leads to very high Ion/Ioff ratio of 108 - 109. The proposed heterojunction-free nanochannel GaN FinFET is a very promising candidate not only for high-performance and high-speed integrated circuits but also for high-power applications.

A single-nanoribbon Al2O3/GaN metal-insulator-semiconductor field-effect transistor (MISFET) has been fabricated. The fabricated device exhibits normally off operation with a threshold voltage of 2.1 V. The device also exhibits superior performances such as a maximum drain current density of 1.51 A/mm, a maximum transconductance of 580 mS/mm, and a field-effect mobility of 293 cm2·V-1·s-1. This is because the electron concentration in the GaN channels can be increased due to the enhanced gate controllability, which, thus, effectively screens the field lines from the interface traps or the defects near the channels to improve the electron mobility in the channel. The nanoribbon Al2O3/GaN MISFET is a very promising candidate for high-performance normally off GaN FETs.

We have grown an AlIn(Ga)N/GaN heterostructure which is a promising alternative to the AlGaN/GaN heterostructure. The mobility and the carrier concentration of the two-dimensional electron gas (2DEG) formed at the AlIn(Ga)N/GaN heterointerface were strongly dependent on both the growth temperature and pressure. Two optimized growth conditions for the heterostructure with a low sheet resistance less than 300 Ω/sq were obtained by varying the growth temperature and pressure from 750 to 1070 °C and 100 to 300 torr, respectively: (i) AlIn(Ga)N/GaN heterostructure with high 2DEG carrier concentration of 2.4 × 1013 cm−2 with mobility of 1010 cm2 V−1s−1 (grown at 900 °C and 100 torr); (ii) AlIn(Ga)N/GaN heterostructure with high 2DEG mobility of 1910 cm2 V−1s−1 with carrier concentration of 1.13 × 1013 cm−2 (grown at 900 °C and 300 torr). Both structures would be useful for different purpose of device application.

Normally off Al2O3/GaN MOSFETs are fabricated by utilizing a simple tetramethylammonium hydroxide (TMAH) treatment as a postgate-recess process. The TMAH-treated device with a gate length of 2.5 μm exhibited excellent device performances, such as a threshold voltage of 3.5 V, a maximum drain current of 336 mA/mm, and a breakdown voltage of 725 V, along with extremely small gate leakage current of about 10-9 A/mm at Vgs = 15 V, which is approximately six orders lower in magnitude compared to that of the device without TMAH treatment.

AlGaN/GaN-based normally-off GaN MOSFET with stress controlled 2DEG source and drain was proposed and fabricated using Al2O3 gate oxide deposited on the fully recessed gate region. The proposed normally-off Al2O3/GaN MOSFET utilized AlGaN/GaN heterostructure source and drain with extremely high 2DEG density of 1.87×1014 cm2 with mobility of 120 cm2V-1s-1 and the device results were compared to those obtained from the reference device with normal AlGaN/GaN heterostructure source and drain with 2DEG density of 1.33×1013 cm2 and mobility of 1070 cm2V-1s-1. The maximum drain current and maximum transconductance of the proposed device were 263 mA/mm and 72 mS/mm, respectively, about 7.3-times and 5-times larger than those of the reference device, which are comparable to or even higher than one of the best results obtained from various GaN MOSFETs reported by others. (© 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)