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Source degenerative feedback is extensively applied in the low-noise amplifier design. The beneficial effects of this technique are well established in the open literature. However, the designer is often left to trial-and-error or optimization procedures to identify the adequate amount of feedback when other linear requirements, such as signal matching, come into play. This issue is even more relevant in multistage designs. In this article, we present a synthesis procedure and the relevant design chart to identify the optimum feedback inductor value on all transistors of an N-stage amplifier to obtain a perfect match at its external ports in conjunction with amplifier noise figure minimization and a specified gain requirement. It is shown that the method is applicable to arbitrary N values although it becomes more elaborate for N greater than 6. The method is deterministic as opposed to optimization or trial-and-error-based procedures. The design flow is illustrated at first through a four-stage design with ideal matching elements and subsequently validated by an monolithic microwave integrated circuit (MMIC) test vehicle designed and realized in the WIN foundry’s Gallium Arsenide PIH1-10 process. The measured performance of the test vehicle is NF = 1.9 dB, 26 dB gain, typical I/O return loss of 15 dB in the 26.5–29.5-GHz bandwidth, and practically ideal behavior at the design frequency of 28 GHz. [ABSTRACT FROM AUTHOR]

A novel result is presented concerning the locus, on the source reflection coefficient plane, of the optimum tradeoff between noise factor and available gain. Although this locus has been discussed and exploited in previous contributions, here, it is shown in a simple manner that it must be an arc of a circumference with center $C_{\mathrm{ tc}}$ and radius $\rho _{\mathrm{ tc}}$ (tangency circle). A handy transformation (a reversible, conformal one) of two-port networks is adopted to study the problem in a simplified, yet general, representation. Properties of the tangency circle are observed in this “noise-centered” representation which are preserved under the conformal transformation, thus providing two equivalent, closed-form approaches to computing $C_{\mathrm{ tc}}$ and $\rho _{\mathrm{ tc}}$. The second method presented lends itself to being easily implemented in commercial circuit simulators, thus serving as the basis of a simple design method for single-stage low-noise amplifiers. [ABSTRACT FROM AUTHOR]

The technology, design procedure and measurements of an E‐band (71‐86 GHz) high performance gallium arsenide (GaAs) low‐noise amplifier (LNA) are presented. The latter provides a gain in excess of 20 dB, an average in‐band noise figure (NF) of 2.3 dB, absorbing 60 mW DC bias power. A European space‐qualified technology (OMMIC's GaAs 70 nm process) has been selected to demonstrate the feasibility of employing the proposed LNA for production‐ready wireless backhaul point‐to‐point communication systems. A possible installation scenario has been depicted, in order to verify the maximum distance at which TX and RX antennas can be placed and employing the proposed LNA as first amplifying stage of the receiver chain. [ABSTRACT FROM AUTHOR]

The design, realization, and tests of an S-band gallium nitride (GaN) monolithic microwave integrated circuit (MMIC) single-chip front end (SCFE) is presented. The MMIC, realized on the 250-nm gate length GaN process available from the united monolithic semiconductor, integrates high-power and low-noise amplification together with the transmit (Tx)-receive (Rx) switch in a $7\times 7$ mm2 chip area. The SCFE has been conceived for active electronically scanned antenna applications in S-band. In the Rx mode, noise figure (NF) lower than 1.75 dB and gain better than 30 dB have been measured. In the Tx mode, output power and power added efficiency better than 45 dBm and 42%, respectively, have been achieved, with an associated gain higher than 35 dB. Such performance has been measured over a 13% fractional bandwidth in S-band. To the best of the authors’ knowledge, this is the first GaN SCFE operating in S-band. [ABSTRACT FROM AUTHOR]

Abstract: Designing wideband low noise amplifiers (LNAs) at millimeter wave frequencies (>30 GHz) is rather challenging due to trade‐offs that need to be achieved between often contrasting goals such as noise figure, gain, impedance matching, stability, DC power consumption, and chip size. In this paper, a low noise design procedure at 50 GHz is presented, proving the feasibility of a 2 dB Noise Figure LNA at Q/V band. Such performance is enabling for future (but imminent) satellite communication systems operating in the 47‐52 GHz frequency band. Repeatability and reliability are key requirements for satellite operations and therefore an Industrial Grade—Space Qualified technology has been selected. [ABSTRACT FROM AUTHOR]

In this contribution a series of integrated circuits and methodologies, purposely developed for application in microwave receiving subsystems, will be presented. The integrated circuits, realized in GaN integrated technologies by different suppliers, find their applications in telecom systems as well as in RADAR ones, mainly for space-based apparatuses. The respective performance, as well as the key design methods will be presented in the contribution for bandwidths ranging from S-Band up to K-Band. [ABSTRACT FROM AUTHOR]

A low noise amplifier operating in the 8.5÷11.5 GHz (X Band) was designed and realized. The LNA uses the AlGaN/GaN HEMT technology provided by the Leonardo foundry. The low noise amplifier is composed by a cascaded of three single-ended stages. The realized MMIC amplifier has the following measured performance: 24.7dB small-signal gain with a ±1 dB ripple; a noise figure ranging from 1.6 dB to 1.8 dB in the upper half of the X Band, and reaching 2.1 dB full band; a 1-dB output compression point of 26.7 dBm was obtained. Chip size is 3.0x1.5 mm2. The design approach implemented is focused on maximizing overall gain and noise performance, as well as obtaining a good level of output power. [ABSTRACT FROM AUTHOR]

In this contribution, a set of robust GaN MMIC T/R switches and low-noise amplifiers, all based on the same GaN process, is presented. The target operating bandwidths are the X-band and the 2-18 GHz bandwidth. Several robustness tests on the fabricated MMICs demonstrate state-of-the-art survivability to CW input power levels. The development of high-power amplifiers, robust low-noise amplifiers and T/R switches on the same GaN monolithic process will bring to the next generation of fully-integrated T/R module front-end MMICs. [ABSTRACT FROM AUTHOR]

Constant input and output mismatch circles in the output load plane are introduced as the basis for low-noise amplifier design methodology. Optimum tradeoff between input and output matching levels results as the application of a design chart providing, at the same time, the corresponding stage transducer gain. The role of degenerative series feedback is studied and systematically embedded in the design procedure, thus providing a direct way to evaluate its optimum level. [ABSTRACT FROM AUTHOR]

In this paper, an overview of recently reported low-noise amplifiers (LNAs), designed, and fabricated in GaN technology is provided, highlighting their noise performance together with high-linearity and high-robustness capabilities. Several SELEX-ES GaN monolithic technologies are detailed, providing the results of the noise characterization and modeling on sample devices. An in-depth review of three LNAs based on the 0.25-\mum GaN HEMT process, marginally described in previous publications, is then presented. In particular, two robust and broadband 2–18-GHz monolithic microwave integrated circuit (MMIC) LNAs are designed, fabricated, and tested, exhibiting robustness to over 40-dBm input power levels; an X-band MMIC LNA, suitable for synthetic aperture radar systems, is also designed and realized, for which measurement results show a noise figure \sim2.2~dB with an associated gain >25~dB and robustness up to 41-dBm input power level. [ABSTRACT FROM AUTHOR]

In this paper a GaN-on-Si MMIC Low-Noise Amplifier (LNA) working in the Ka-band is shown. The chosen technology for the design is a 100 nm gate length HEMT provided by OMMIC foundry. Both small-signal and noise models had been previously extracted by the means of an extensive measurement campaign, and were then employed in the design of the presented LNA. The amplifier presents an average noise figure of 2.4 dB, a 30 dB average gain value, and input/output matching higher than 10 dB in the whole 34–37.5 Ghz design band, while non-linear measurements testify a minimum output 1 dB compression point of 23 dBm in the specific 35–36.5 GHz target band. This shows the suitability of the chosen technology for low-noise applications. [ABSTRACT FROM AUTHOR]

An overview of applicable technologies and design solutions for monolithic microwave integrated circuit (MMIC) low-noise amplifiers (LNAs) operating at millimeter-wave are provided in this paper. The review starts with a brief description of the targeted applications and corresponding systems. Advanced technologies are presented highlighting potentials and drawbacks related to the considered possibilities. Design techniques, applicable to different requirements, are presented and analyzed. An LNA operating at V-band (59–66 GHz) is designed and tested following the presented guidelines, demonstrating state-of-the-art results in terms of noise figure (average NF < 2 dB). A state-of-the-art table, reporting recent results available in open literature on this topic, is provided and examined, focusing on room temperature operation and performance in cryogenic environment. Finally, trends versus frequency and perspectives are outlined. [ABSTRACT FROM AUTHOR]

Low‐noise amplifier (LNA) designers often struggle to simultaneously satisfy gain, noise, stability, and I/O matching requirements. In this article, a novel design technique, tailored for two‐stage low‐noise amplifiers, is presented. The proposed design method is completely deterministic and exploits inductive source degeneration to obtain a two‐stage LNA featuring perfect input and output match together with low noise figure (NF) and a pre‐determined gain, including stability analysis. A novel flowchart is provided together with the corresponding design chart that contains gain, matching, and stability information, therefore addressing all key figures‐of‐merit of a linear amplifier. The design chart is easily implementable in commercial Electronic Design Automation software, to aid designers in the difficult task of selecting the appropriate source degeneration inductor value. The noise performance, on the other hand, is the best possible since the matching networks are designed to provide the input of the two Field Effect Transistors with the optimum termination for noise. The design method is validated with two separate test vehicles operating respectively at Ka‐band (26.5‐31.5 GHz) and K‐band (20.0‐24.0 GHz). The realized Monolithic Microwave Integrated Circuits exhibit 18 dB gain for both versions, NF of 1.5 and 1.2 dB, respectively for the Ka‐band and K‐band version. Input and output matching are typically better than 12 and 15 dB. [ABSTRACT FROM AUTHOR]

A recently presented implementation of the current‐reuse concept, specifically devised for microwave cascaded single‐ended amplifiers, is applied to the design of a three‐stage medium‐power low‐noise amplifier (LNA) operating in X‐band. The LNA is realized on a GaN‐on‐SiC 0.25 µm technology supplied by Leonardo S.p.A.'s internal foundry and achieves a transducer gain (GT) of 24 dB, a noise figure (NF) better than 2.5 dB and an output power at 1 dB gain compression (Pout,1dB) higher than 20 dBm over the whole X‐band. The first two stages of the LNA are stacked and share the same current while requiring, as a pair, a doubled external supply voltage, which corresponds to that of the third, medium‐power stage. The versatility of the adopted current‐reuse concept is exemplified by the fact that the two low‐noise stages are initially designed in a conventional single‐ended topology: only in a second step are they converted into a current‐sharing stage pair with no significant effect on RF performance. Nonconventional approaches to low‐noise design and small‐signal stability analysis developed by the Authors and adopted in this design are referred to the Reader. [ABSTRACT FROM AUTHOR]