Search

Electromagnetic patterns in near field scanning usually give important information about the source inside an device under test. In this paper, we develop a postprocessing technique, including standard-deviation-based method, principal component analysis, and K -means method, so that the electromagnetic patterns in near field scanning can be extracted fast and grouped automatically and efficiently. The postprocessing techniques are applied to experimental near-field scanning of ICs, such as a microcontroller unit (MCU) and a field programmable gate array (FPGA). The grouping on the electromagnetic patterns of the MCU is in good agreement with the published grouping result, and the grouping on the electromagnetic patterns of the FPGA can find out the additional cluster responsible for additional circuit.

In this paper, the radiated emission of a microcontroller integrated circuit is investigated by rotating the test board in a transverse electromagnetic (TEM) cell measurement. The dependence of the radiated emission on the angle of rotation is derived on the basis of the coupling between a microstrip line and the TEM cell, and then validated by the multiple-orientation TEM cell measurements in a quantitative accuracy of fitting. With the validated dependence, the radiated emissions contributed by electric and magnetic coupling are extracted. The extracted emissions are found in agreement with the measurement result by near-field scanning experiments.

Electromigration was characterized at the cathode Cu/solder interface&mdash, without the effect of Joule heating&mdash, by employing scanning electron microscopy (SEM) and electron backscatter diffraction (EBSD) analyses. Rapid (Cux,Ni1&minus, x)6Sn5 intermetallic compound (IMC) growth was observed at the anomalous region at the cathode end due to the effect of current crowding. The abnormal isotropic diffusion and parallel distribution of Pb were characterized in an ultra-low temperature environment in a monocrystalline structure stressed at &minus, 196 &deg, C. The interesting results were attributed to crystallographic transformation due to the simultaneous effect of cryogenic and electrical stressing. The diffusion behavior of Pb atoms in face-centered cubic lattices performed isomorphism. As a result, Pb atoms of the bump gathered at the high-energy grain boundaries by diffusing through the face-centered cubic lattices around the long grain boundary, eventually forming a long-range distribution and accumulation of Pb elements. Our study may provide understanding of cryogenic electromigration evolution of the Cu/solder interface and provide visual data for abnormal lattice transformation at the current stressing.

Displacement damage induced degradations in four-junction solar cells are investigated by electron irradiation and TCAD simulation. It shows that In0.3Ga0.7As cell is the key sub cell to affect the radiation tolerance of four-junction solar cell. Although irradiation will introduce relatively uniform displacement damage in each sub cell of four-junction solar cell, the In0.3Ga0.7As cell show the most significant degradation under the same radiation damage conditions. The radiation harness of the four-junction solar cell can be promoted by increase the short circuit current of In0.3Ga0.7As cell before irradiation, which is verified by the TCAD simulations. The relationship between electrical characteristics degradations and the displacement damage dose is established for four-junction solar cells. Then, the equivalent displacement damage dose method has been used to predict the on-orbit degradation of four-junction solar cells. The degradations of the four-junction solar cells on typical geosynchronous earth orbit are calculated by combining Monte Carlo simulations and ground irradiation test data.

This paper presents a novel VSWR measurement system for high power electronic vacuum device such as traveling wave tube in working mode. The measurement principles of this VSWR measurement system have been presents. The feasibility of this VSWR measurement system has been analyzed.

The polarity effect of electromigration on the interfacial reactions of micro ball grid array (μBGA) solder joints was studied in terms of microstructural evolution. A dummy μBGA package with the same pair of solder joints was used to obtain reproducible results for a practical application. The μBGA package with Ni(P)/SnPb/Ni(P) structure showed a polarity effect on intermetallic compound (IMC) formation after stress by a current density of 3.0 × 10 3 A cm −2 at 120 °C, compared to the no-current case. Electric current enhanced the growth of Ni 3 Sn 4 at the anode and retarded it at the cathode because of the change in Sn diffusion induced by electromigration. The IMC growth at the anode was about one order of magnitude faster than that at cathode. The growth of IMC at the anode had a parabolic dependence on time since the square of thickness of IMC increases linearly with time. The real μBGA package has unique and more complicated geometry compared to ordinary diffusion couples. So not only the polarity growth of IMC but also the fast dissolution of Cu and Ni at specific positions was found with the μBGA package. The unique geometry of μBGA solder joints caused heat generation at the upside interfaces due to Joule heating. Because of the heat generation and the high interfacial energy at the triple point of upside interfaces, the electroless Ni(P) finishes and Cu trace are consumed rapidly in the region where the current is crowded. Thus electromigration induced the rapid dissolution of Ni and Cu into solder and then formed (Cu,Ni) 6 Sn 5 at the triple point of the current crowding region at high temperature. This is a rapid failure process because the localized fast dissolution of Ni and Cu accelerated the solid-state reaction between solder and electroless Ni(P) or Cu trace.

Malicious modification of integrated circuits referred to as Hardware Trojan fabricated in untrusted foundries pose a growing concern on reliable and security application. In order to ensure trusted in-filed operation of integrated circuits, many techniques are developed to authenticate Hardware Trojan often called trojan detection. Among these techniques side-channel signals analysis is a widely researched method to detect Hardware Trojan but suffer from sensitivity decreasing caused by increasing process variation effects. In this paper, we propose a non-invasive Hardware Trojan detection method which is immune to process variation effects. The method exploits the intrinsic relationship between transient current (I ddt ) and quiescent current (I ddq ) and I DDT of different test vectors that can eliminate the effects of process variation. The proposed method is verified by Hspice simulation carried on ISCAS 85 benchmark circuit. The 100 times simulation results with 130nm CMOS process using Monte Carlo method show that the suggested methods are capable of detecting the Hardware Trojan whose equivalent area is as small as 10"4 of the total size of the circuit in the presence of ±7% parameter(threshold voltage) variations.

Malicious modification of integrated circuits, namely Hardware Trojan, has emerged as a major security threat. Since it is extremely difficult to detect the presence of such small Trojan circuits using only logic test or side-channel analysis, this paper presents a novel test method combining logic test and side-channel test together. An 18-bit CORDIC IP core is adopted as a golden circuit, while a 2-bit counter is applied as a Trojan circuit. The automatic test platform is set up with Xilinx FPGA, LabVIEW software, and high precision oscilloscope. Meanwhile, the power traces of power supplies V ccint or V ccaux in FPGA are both monitored to enhance the detection sensitivity. The relevant test flow chart is also depicted in detail. Experimental results demonstrate that the novel test method can easily achieve about 0.1% Trojan detection sensitivity when principal component analysis approach is adopted as the data processing algorithm.

Total ionizing dose (TID) radiation effects in the bipolar voltage comparator with different biases and dose rates were investigated in this paper. The experimental results show that offset voltages shift after irradiation. Dominated by the current gain degradation of differential PNP transistors, the shifts of offset voltage and output characteristics were significantly affected by biases at high dose rate. Dominated by the current gain degradation of NPN transistors, the shifts of offset voltage and output characteristics were similar in all biases at low dose rate.

Firstly, the storage failure mode and failure mechanism study of the klystron was carried out, the main failure modes of klystron in storage were summarized, and the failure mechanism and failure reasons of the main failure mode were analyzed. The results of the study showed that the vacuum degree decline is the main reason for the failure in long-term storage of klystron. The vacuum degree decline of tube is due to the residual gas of in seal manufacturing process or the deflation and shell leakage of the tube during the period of storage. Secondly, the generation process of residual gas was studied. At last, a failure sample of long-term storage klystron was analyzed; results showed that the failure mechanism was due to a large number of evaporation the cathode emission material which induced the serious degeneration of cathode, then the cathode emission current reduced and the out power declined. The reason of cathode degradation was vacuum degree decline in long-term storage process, ions back to the cathode surface that caused the huge evaporation of cathode emitting material.

We have submitted the AlGaN/GaN High electron mobility transistors (HEMTs) to the high temperature reverse bias(HTRB) stress to assess their reliability for high voltage operations. The effects of HTRB stress as a function of the V DG and stress time on the DC parameters and trapping effects were investigated. The study was based on combined DC and pulsed characterization, transient measurement. It provides the following information: 1) the exposure to HTRB may result in a permanent degradation in on-state current, the transconductance, and a slightly positive shift of threshold voltage; 2) the high temperature (T A =175°C) step reverse bias (V DG stepped from 20V to 80V) stress tests revealed that the gate leakage current I GS increased abruptly after 50V stress voltage V DG ; 3) interestingly, the long term high temperature moderate reverse bias(V DG 40V) stress resulted in some positive effects such as the decrease of gate leakage current, improved gate lag characteristics and the decrease of current collapse in pulsed measurement during the whole test; 4) the reverse-bias voltage is the key factor but for reliability assessment of AlGaN/GaN HEMTs for high voltage application based on HTRB stress; 5) The degradation mechanism of the gate leakage current under relatively high voltage HTRB test has been ascribed to the degradation metal and semiconductor interface; 6) the improved I-V characteristic under moderately voltage HTRB test has been attributed to the reduction of lateral tunneling current.

This paper presents an equivalent circuit approach to evaluate the effect of near-zone electromagnetic interference on the shielding effectiveness (SE) of an apertured rectangular enclosure. The approach is an extension of Robinson's equivalent circuit formulation. The extension in this paper is carried out by using an electric dipole to represent the external interference and applying the electric field at the aperture caused by the dipole to replace Robinson's incident plane wave. The SE correlates to the dimensions of the enclosure and the aperture. The distance from the interference to the enclosure and the observed position within the enclosure are significant parameters on the SE evaluation. The shapes of the aperture also affect the SE. This equivalent circuit approach based on the available analytical formulation provides a fast means of investigating the effect of design parameters on the SE of an apertured enclosure for near-zone interference and can be used for designers of shielded enclosures.

Space traveling wave tube (TWT) is one kind of microwave vacuum tube for communication, which must have high reliability, high power. The life of the space TWT is requested for a long lifetime of 10–15 years. In order to shorten the testing process, accelerated aging tests are performed at higher than normal operating temperature and currents of cathode. But in the process of the actual test, the cathode degradation is very slow, the test time is too long for all samples failing to get the lifetime data. In order to obtain the lifetime of the long life tube in a short time, it is necessary to investigate a new method which can evaluate the long lifetime through short-term working data. This paper introduced how to solve the zero-failure test data with small samples. With no failure data in data processing of life test, parameter degradation extrapolation method is used to obtain the failure life time. All the expected life of the sample was estimated of each test samples by least-square method for linear fitting and the goodness of fit and the significance testing was done.

This work aims to characterize the microstructure and temperature field of the hermetic packaging structure by welding the cover made of Kovar alloy and the base made of a low-carbon low-alloy steel (i.e., #10 steel) using parallel seam welding (PSW) process. The microstructure of welded joints and distribution of elements were analyzed by scanning electron microscopy (SEM) equipped with energy dispersive spectrometer (EDS). Welding mechanism of PSW is discussed and temperature field of PSW is studied by a nonlinear transient finite element analysis. In FEM simulation, the surface contact pair is created to form weld beam and the heat generated by a pulse current is taken as a moving heat source. The results show that the maximum temperature in the weldment is 1105.3 °C, which is below the melting point of Kovar alloy and #10 steel (both in 1400∼1500°C). The cross-sectional microstructure analysis results of the welded joint show that welded junction is localized between the plating layers of two base materials, both Kovar alloy and #10 steel did not melt during the welding process. Numerical simulation value of the temperature at the plating coat layer on Kovar side is larger than that on #10 steel because of boundary conditions and thermal conductivity. Same phenomenon can be seen at the location 3 mm away from the weldment. The temperature on the node of Kovar with a distance of 5 mm from the weldment is 796 °C.

The total-dose-induced edge effect in SOI NMOS transistors with different layouts is presented. Experimental results show that the edge effect is very sensitive to their layouts. Among the transistors hardened by design, the H-gate and ringed-source transistors do not behave as expected. At high radiation doses, the edge leakage currents appear for both transistors. Compared to the unhardened two-edged transistor, their total-dose-induced edge leakage paths and the role of layouts on edge effect are discussed.

Total Dose ionizing radiation response of substrate PNP transistors have been investigated as functions of biases and dose rates. The experiment result shown that emitter-base junction bias dominates dose rate effects in the SPNP transistors. By considering of radiation induced interface traps and oxide trapped positive charges, the degradation mechanisms have been discussed based on space charge model. In addition, the worst case biases in the SPNP transistor with different dose rates are also discussed in this paper.

A prognostic circuit for electromigration failure of integrated circuit was proposed, and it was simulated on the base of the SMIC 0.18 um mixed-signal CMOS process model. The prognostic circuit is composed of stress and detection module, two-stage comparator, offset voltage cancellation module, non-overlapping clock generation module, and output module. When the increase amount of resistance for interconnect line exceeds a preset value due to electromigration, the output of the prognostic circuit designed to fail faster will jump from low voltage to high voltage. It indicates the impending failure of hosted circuit because of that the prognostic circuit experiences the same manufacturing process and operational environment as the hosted circuit. The research results are useful for the prediction of performance degradation and failure of integrated circuit.

This paper investigates the total dose effects of substrate PNP transistors through experiments. By considering of oxide trapped positive charges and interface traps, the radiation induced excess base current in the irradiated SPNP is simulated. The simulation results showed similar trends with the experimental results, thus the mechanisms of total dose effects in the SPNP transistors are verified.

Traveling wave tube (TWT) is a type of microwave vacuum electronic component. TWT often works under harsh mechanical environment stress, such as vibration, shock. The stress leads to the open circuit of filament in heater, which results in the change of inner structure and electric performances, even failure. This paper introduced a failure case of TWT in use. Failure mode and failure mechanism of filament in heater of a typical TWT was analyzed in this paper.

Ionization radiation causes ESD protection structure of integrated circuit degradation. A new method using Transmission Line Pulse (TLP) test is introduced in this article; this method gives more detailed information of the ESD protection structure's degradation. Turn-on voltage, hold voltage, turn-on resistance of two type ESD protection structures are measured before and after TID radiation test, results are discussed.

An investigation of thermal effects in a high power 3-5μm solid state laser pumped with different pump beam transverse profiles is carried out by COMSOL software based on the finite element method, and the temperature of the crystal center where the Super-Gaussian distributed light projected area is 81.8°C, and is bigger than that of Gaussian pump light mode and top plane pump light mode.

The electromagnetic interference effects in the μA741 operational amplifier circuit were investigated in this paper. Through the using of pulse injection, the output characteristics of μA741 were simulated by considering of EMI effects. Through sensitivity and smoke analysis, the simulation results shown that the differential input stage and the intermediate amplifying stage are the most sensitive and vulnerable function model in the μA741 circuits to EMI effects.

Prognostics and health management has become a preferred approach to achieve warning or respond to impending failure of electronic systems. A prognostic circuit for hot carrier injection (HCI) failure of integrated circuit was proposed in the paper, and it was simulated on the base of the SMIC 0.18 um mixed-signal CMOS process model. The prognostic circuit consists of stress voltage generation module, HCI failure detecting module, two-stage comparator, offset voltage cancellation module, non-overlapping clock generation module, and output module. When the increase amount of threshold voltage for the MOSFET exceeds a preset value due to hot carrier injection, the output of the prognostic circuit designed to fail faster will jump from low voltage to high voltage. It indicates the impending failure of hosted circuit because of that the prognostic circuit experiences the same manufacturing process and operational environment as the hosted circuit. The research results are useful for the prediction of HCI degradation and failure of integrated circuit.

Total dose dependence of bias current and offset voltage in the linear operational amplifier μA741 with different bias is presented in this paper. The experimental results show that the bias current in the μA741 with grounded bias is significantly affected by the degradation of the differential input transistors. In addition, the offset voltage is affected by the degradation of bipolar transistors of the current source in the differential input stage.

In this paper, effect of bias dependence of substrate NPN (SNPN) transistors on total dose radiation is investigated. By considering of bulk field and fringing electric field in the oxide, the degradation mechanisms are discussed in numerical simulations. Experimental results show that the applied emitter voltage and the emitter-base junction bias play important roles in the total dose irradiation effect of SNPN transistors, which is agreement with the theoretical analysis.

With the increase demand of high power, high efficient and good beam quality solidstate lasers, thermal management become more important for the lasers. Thermal resistance between laser crystal and heat sink can be effectively reduced by soldering technology, but the technology might induce huge heat stress. In order to solve the problem, finite-element method was used to analysis the stress and thermal resistance. Moreover, a practicable structure was also designed and calculated in this study. Keywords-lasers crystal rod; thermal stress; thermal resistance; Soldering technology

High power laser diodes have found wide spread applications as pump sources for solid state lasers or in direct material processing. Due to the high electrical and optical power densities in the laser structures the reliability is still questionable. We report on lifetime testing of a high power cm-bar arrays using an automated diode array reliability experiment. This computer controlled setup operates the cm-bar array 24 hours a day, and three groups of different operating condition aging test were carried on. Analysis of the aging data suggest that the extrapolated lifetime of cm-bars at 25°C can reach 7950 hours (2.86×109 shots).

The temperature-dependent DC conduction mechanism in BaTiO 3 -based multilayer ceramic capacitors has been discussed in this paper. In the high electric field, BaTiO 3 -based Multi-Layer Ceramic Capacitor (MLCC) showed different DC conduction mechanism in room-temperature, Curie-temperature, and high-temperature regions. The DC conduction mechanisms at room and high temperature are Schottky effect and ionic flow, respectively. However, the mechanism at Curie temperature showed a tunnel-like current, abnormal temperature-independence DC conduction current. For the study of this abnormal phenomenon, the structural nature of insulting solids of practical importance is emphasized. Based on the relation of barrier height and phase transformation, the Curie-temperature region is actually controlled by Schottky process. The DC conduction mechanism of BaTiO 3 -based MLCC in Curie-temperature region can compatibly explained by the change of barrier height resulting from phase transformation.

Three groups of lifetime test were completed, according to the statistical knowledge, the degradation model of cm-bars is obtained using the short-term working datas, then we obtain the extrapolated lifetime of cm-bars at 25°C is 7950 hours (2.86×109 shots), and we also obtain an acceleration factor 1.88 of resulting in a thermal activation energy of Ea=0.21eV using Arrhenius function.

The reliability, long-term performance and lifetime of high power diode lasers are important issues for pumping of solid state and fiber laser systems. In order to obtain the lifetime data of high power QCW 808nm cm-bars, we have set up a computer controlled diode array reliability experiment which can automated monitor the laser arrays 24 hours a day. Using this setup 10 high power QCW cm-bars currently being tested was operated for more than 5.4 billion shots at 25 0 C with a pulse width of 200us and a duty factor of 2%, and one cm-bars suffered sudden failure at 3.24x10 7 shots, one cm-bars had reached the failure criterion at 1.98 billion shots. The failure analysis of these two failed device were reported on this paper. Keywords-reliability, laser diode, lifetime, sudden failure, failure analysis.

Electromigration in flip chip solder joints of Sn3.0Ag0.5Cu has been studied at current density of 2.03×104 A/cm2 and the bump temperature was at 120 °C. Three potential failure modes were absolved and their corresponding microstructural mechanism was discussed in this paper. The pancake-type void is noticeable failure mode and dominated by current crowding. The continuous void at the cathode of contact interface between IMC and solder was also formed without current crowding. But the void has less area than the void at entire cathode contact interface to the Si Chip. The large area of IMC in left-hand section of solder joints distributed in solder joint uniquely. All of the unique microstructural evolution induced by electromigration concern the migration of atoms and vacancies in interconnects with unique geometry.

In this study experiments such as constant voltage, constant current, ramp voltage have been done on gate oxide with 20 nm thickness. IV characteristics and CV characteristics after stress have been studied to investigate the gate oxide degradation mechanism. Our experimental results are different from those reported before. The charge inducing oxide degradation is different under different accelerated stresses. The paper explains the experimental results under different accelerated stress.

We investigate the effects of 60Co γ-ray irradiation on the 130 nm partially-depleted silicon-on-isolator (PDSOI) input/output (I/O) n-MOSFETs. A shallow trench isolation (STI) parasitic transistor is responsible for the observed hump in the back-gate transfer characteristic curve. The STI parasitic transistor, in which the trench oxide acts as the gate oxide, is sensitive to the radiation, and it introduces a new way to characterize the total ionizing dose (TID) responses in the STI oxide. A radiation enhanced drain induced barrier lower (DIBL) effect is observed in the STI parasitic transistor. It is manifested as the drain bias dependence of the radiation-induced off-state leakage and the increase of the DIBL parameter in the STI parasitic transistor after irradiation. Increasing the doping concentration in the whole body region or just near the STI sidewall can increase the threshold voltage of the STI parasitic transistor, and further reduce the radiation-induced off-state leakage. Moreover, we find that the radiation-induced trapped charge in the buried oxide leads to an obvious front-gate threshold voltage shift through the coupling effect. The high doping concentration in the body can effectively suppress the radiation-induced coupling effect.