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Switched capacitor circuits exhibit dynamic topology and operate on clock phase dependent charge transfer. A circuit simulator that can directly compute branch charges by retaining capacitors and closed switch branches while excluding open switch branches based on clock is proposed in this work. Topological/graph-based formulation is used for charge level analyses of ideal switched capacitor circuits. The simulator supports time, frequency, noise and sensitivity analyses of switched capacitor circuits for any number of clock phases. The compact linear difference equation can compute time responses in a straightforward manner while frequency analysis is based on the impulse response of the circuit. Adjoint network concept is used to perform noise and sensitivity analyses for computing noise spectrum and differential derivatives respectively. The same formulation holds good for the adjoint equivalent network also since the network topology and incidence matrix almost remains same. Simulation results are presented for sample circuits to demonstrate the performance of the proposed simulator. Time and frequency responses have been compared with SWITCAP while noise and sensitivity responses with a commercial simulator.

This article proposes the theory and implementation of an even-harmonic class-E CMOS oscillator that displays an excellent phase noise performance. Starting from zero voltage switching (ZVS) and zero derivative switching (ZDS) conditions, expressions for drain voltage and current waveforms are derived. Based on a 1:1 transformer, a custom-designed tank is proposed, which satisfies ZVS and ZDS conditions for the core transistors, provides high-Q resonances at both fundamental and second harmonics of the oscillation frequency, and yields a passive voltage gain from the drain to the gate of the core transistors. Satisfying ZVS and ZDS conditions reduces the overlap between the voltage and current waveforms of the transistor that increases the power efficiency of the oscillator. Furthermore, it widens the flat span of the semi half-sinusoidal voltage waveform, where the impulse sensitivity function (ISF) is negligible. Therefore, the conversion of the core transistor noise to phase noise is reduced. These features improve the oscillator's figure of merit (FoM) in comparison with state-of-the-art CMOS oscillators. The prototype of the even-harmonic class-E oscillator is implemented in a 0.18-μm CMOS technology. At 4 GHz, it exhibits a phase noise of -152.75 dBc/Hz at a 10-MHz offset while providing a 10.6% tuning range. The corresponding FoM is 197.9 dBc/Hz. The circuit draws 7 mA from a 0.7-V supply, and the die area is 0.23 mm².

Magnetic sensors based on tunneling magnetoresistance (TMR) effect exhibit high sensitivity, small size, and low power consumption. They have gained a lot of attention and have potential applications in various domains. This study first introduces the development history and basic principles of TMR sensors. Then, a comprehensive description of TMR sensors linearization and Wheatstone bridge configuration is presented. Two key performance parameters, the field sensitivity and noise mechanisms, are considered. Finally, the emerging applications of TMR sensors are discussed.

Occurrence of high frequency emission due to increasing use of power electronic based equipment challenges the functioning of equipment, e.g., malfunctions of equipment, audible noise or performance/lifetime degradation of dc-link capacitor. When subjected to a high frequency voltage distortion, an AC-DC converter draws intermittent current of the same frequency, this is referred to as 'intermittent conduction'. In this paper, a link between intermittent conduction and dc-link capacitor current has, for the first time, been constituted through a mathematical expression. Based on this, a model that can quantify the impacts on dc-link capacitor and calculate maximum allowed voltage in the frequency range of 2-150 kHz, so called 'supraharmonics' (SHs), has been proposed for avoiding degradations. Besides modelling, a testing technique is implemented where maximum allowed voltage can be identified for an equipment under test (EUT). The result shows that dc-link capacitor's stress can be managed under the SHs if maximum SH voltages are respected. The proposed model gives a better understanding of SH impacts on dc-link capacitor and the mechanisms behind. The study has been limited to equipment that draws input current lower than 16 A as they exhibit more non-linear characteristic and longer zero-crossing which results in intermittent conduction.

This work presents a 300-GHz low-noise amplifier (LNA) in a SiGe:C 130-nm BiCMOS technology, featuring $f_{t}$/$f_{max}$ of 470/700 GHz. The designed amplifier uses three cascaded stages in a pseudo-differential cascode topology with input and output baluns facilitating single-ended measurements. The first stage is matched trading off noise and gain performance, while a T-type output matching network is used for broadband matching. The interstage matching is performed using center tap transformers. On-wafer measurements show that the designed LNA has a peak small-signal gain of 10.8 dB at 325 GHz, along with a 3-dB bandwidth of 68 GHz and an input 1-dB compression point of -15.6 dBm at 287.5 GHz. The simulated noise figure is better than 12.7 dB over the required band. The circuit occupies 0.26-mm² silicon area and consumes 119 mW from a 3.3-V supply.

We present an OTA-free 1-1 multi-stage noise-shaping (MASH) analog-to-digital converter (ADC) utilizing a fully passive noise-shaping successive approximation register (NS-SAR) as the first stage and an open-loop ring voltage-controlled oscillator (VCO) as the second stage. The key contribution of this work is to address the challenge of driving large sampling capacitors for high-resolution NS-SAR. The proposed architecture allows a low-resolution NS-SAR stage and leverages residue attenuation due to passive charge sharing in the NS-SAR to linearize the VCO. The MASH architecture suppresses quantization noise and SAR comparator noise at the ADC output, and the high pass shapes VCO thermal noise. In addition, we demonstrate a computationally inexpensive foreground inter-stage gain calibration algorithm for the proposed ADC architecture. The prototype ADC consumes 0.16 mW while achieving an SNDR/DR of 71.5/75.8 dB over a 1.1-MHz bandwidth and Walden FoM of 23.3 fJ/step, which is the lowest in 65-nm technology.

This paper describes the design, fabrication, and record performance of a new class of ultra-wideband wavelength tuning, ultra-low noise semiconductor laser, the Integrated Coherent Tunable Laser (ICTL). The ICTL device is designed for, and fabricated in, a CMOS foundry based Silicon Photonics platform, utilizing heterogeneous integration of III-V material to create the integrated gain section of the laser - enabling high-volume mass-market manufacturing at low cost and with high reliability. The ICTL incorporates three or more ultra-low loss micro-ring resonators, with large ring size, in a Sagnac loop reflector geometry, creating exceptional laser reflector performance, plus an extended laser cavity length that enables highly-coherent output; ultra-low linewidth and phase noise. This paper describes record integrated laser performance; 118 nm wavelength tuning, covering S-, C- and L-bands, with Lorentzian linewidth

This paper reports a high-performance, low-power temperature sensor suitable for wireless IoT devices/RFID tags. The system utilizes a mostly digital approach to achieve energy-efficient, sub-μW operation with a resistor-based temperature sensor. A sampled, incomplete-settling, switched-capacitor-based Wheatstone bridge is read out using a digital frequency-locked loop (DFLL) while harnessing the quasi-periodic limit cycles to reduce in-band noise. Implemented in a 65 nm CMOS process, it consumes 310 nW and achieves 9.8 mK resolution in a 10 ms conversion time. This results in a 297 fJ∙K2 figure-of-merit (FoM) and low energy (3.1 nJ/meas.).

This brief presents a class-C voltage-controlled oscillator (VCO) that ensures a robust start-up with low phase noise and high power efficiency. The proposed start-up scheme, which uses a voltage converter that operates according to the output state, relieves the start-up difficulty by supplying a timevarying bias voltage to the core transistors and allows the VCO to operate in an optimal state. The start-up circuitry is enabled only during initial operation, so power efficiency is improved without phase noise degradation. Furthermore, a capacitor array with a high quality factor is implemented by a direct capacitor connection that exhibits low series resistance. Fabricated with a 65-nm CMOS, the VCO demonstrates a frequency tuning range of 13.1% from 19.3 to 22.0 GHz. The measured minimum phase noise at a 1-MHz offset is --106.33 dBc/Hz at an oscillation frequency of 19.7 GHz, while dissipating 3.8-mW of power from a 1.0-V supply. The VCO occupies an active area of 0.064 mm2. It reveals a figureof-merit and figure-of-merit with area of --186.4 and --198.3 dBc/Hz, respectively.

The switching action of power electronic devices causes high frequency current, magnetic field, vibration and annoying noise of induction machines fed by inverters, and these high-frequency components concentrate around the switching frequency and its multiple times. Adding auxiliary winding with capacitors is an effective way to reduce the high frequency vibration by weakening the high frequency magnetic field. In order to analyze the vibration mitigation effect of adding auxiliary winding with capacitors, this method is systematically and theoretically analyzed in the paper. The accurate equivalent circuit of induction machines with auxiliary winding is proposed considering the mutual leakage inductance between stator main winding and auxiliary winding. The transfer function of electromotive force and its frequency response are used to illustrate the effect of vibration reduction. To verify the correctness of the analysis, two induction machines with different auxiliary winding arrangements are prototyped and tested.

An ultra-small-area, low-power analog front-end (AFE) for high-density neural recording is presented in this paper. It features an 11-bit incremental delta-sigma analog-to-digital converter (σ ADC) enhanced with an offset-rejecting event-driven input biasing network. This network avoids saturation of the ADC input caused by leakage of the input-coupling capacitor implemented in an advanced technology node. Combining AC-coupling with direct data conversion, the proposed AFE can tolerate a rail-to-rail electrode offset and achieves a good trade-off between power, noise, bandwidth, input impedance, and area. Fabricated in a 22-nm fully-depleted silicon on insulator (FDSOI) process, the design occupies an active area of

With superb device characteristics, gallium nitride (GaN) power transistors facilitate fast and efficient power conversion and delivery in modern power circuits. To take full advantage of these devices, high switching frequency ( $f_{{SW}})$ operation is highly desirable. However, the lack of GaN compatible high-speed, efficient, and reliable gate drivers has been a formidable design hindrance. In this article, we address three critical design challenges faced in GaN power gate driving, namely bootstrap (BST) level-shifting, switching slew rate (SR) control, and active deadtime $t_{{dead}}$ control. We first propose a BST dynamic level-shifting technique to enable sub-nanosecond $t_{{delay}}$ at high $f_{{SW}}$ . Meanwhile, a dual-SR switching technique is introduced to retain both low switching power and noise. Compared with traditional constant $t_{{dead}}$ controls, the $t_{{dead}}s$ in this design are regulated actively for high efficiency. To validate these techniques, a four-phase GaN-based switching power converter was designed and implemented on a 0.35 μm high-voltage (HV) BCD process. At a $f_{{SW}}$ of 20 MHz and a $V_{{IN}}$ of 20 V, it delivers a maximum power of 8.4 W and a peak efficiency of 84.9%. The gate drivers are fully integrated including all BST capacitors and active BST switches. It achieves regulated rise and fall $t_{{dead}}s$ of 3.2 and 4.7 ns, respectively, for a load range from 50 mA to 1.2 A. The gate switching rise time $t_{R}$ is reduced to 1 ns with a maximum switching SR of 48 V/ns. The converter employs a HV synchronized hysteretic control, which works with the proposed gate drivers seamlessly to demonstrate a dynamic voltage scaling (DVS) Vo up- and down-tracking speeds of 0.33 μs/V and 0.47 μs/V, respectively.

Backscattering noise is a key factor to restrict the performance of resonant fiber optic gyroscopes(RFOG). In order to improve the accuracy of RFOG, this paper proposes a scheme with heterodyne optical phase-locked loop(HOPLL) technique based on acousto-optic modulation(AOM) to suppress backscattering noise. In this scheme, the main light source is divided into three output lights, two of which are frequency-shifted by the AOM, and then they are phase-locked with the third light, using the HOPLL technique. The two channels of frequency-shifted light are respectively used as the clockwise (CW) and counterclockwise(CCW) light of the RFOG, and are locked on the resonance peak. The transmissive fiber resonator can be regarded as a band-pass filter. By adjusting the reference signal in the HOPLL, the carrier of the two frequency-shifted lights can be moved away from the resonance peak. The carrier light intensity of the frequency-shifted light is suppressed by the cavity itself. The suppression ratio(SPR) reaches 15.83dB. The experimental results illustrate that the bias stability of RFOG is 3.8/h based on the Allan deviation, strongly proving the effectiveness of this scheme in suppressing backscattering noise in practical applications.

In this article, a novel circuit is proposed to synthesize absorption common-mode filters (A-CMFs) in only one stage, which can be implemented with different kinds of transmission lines. This proposed one-stage absorption circuit has been derived with analytical equations, and design formulas are found to determine circuit parameters. To validate the proposed circuit and derived formulas, an intuitional structure composed of a meander slotline (MSL), a straight differential pair, and one resistor is proposed. Moreover, a technique named meander asymmetrical coplanar strip (MACPS) has also been developed to reduce the size of MSL-type A-CMF by up to 26%. Finally, the proposed test sample of MACPS-type A-CMF is fabricated in a two-layer printed circuit board (PCB) and measured. The common-mode (CM) noise absorption efficiency of above 80% can be obtained from 2.33 to 2.67 GHz to eliminate CM noises in the Wi-Fi 2.4 GHz band. Besides, the MACPS-type A-CMF provides an excellent differential-mode (DM) signal integrity. The −3 dB bandwidth of DM insertion loss can reach 7.5 GHz, and the measured eye diagram of the proposed work is identical to that of the reference board even the transmitted data rate is up to 16 Gb/s. To our best knowledge, the smallest A-CMF implemented in a two-layer PCB is achieved in this article with the electrical dimension being only 0.0358 λg2.

In this work, the low-frequency noise (LFN) characteristics of hafnium-zirconium oxide (HZO) ferroelectric field-effect transistors (FeFETs) with and without high-pressure forming gas annealing (HPA) treatment are investigated. The origin of 1/f noise in the FeFET without HPA is changed from carrier number fluctuation to Hooge’s mobility fluctuation after wake-up due to the remote phonon scattering from the polarized HZO. Also, Hooge’s parameter is increased by the program/erase (P/E) cycling-induced stress. On the contrary, only the correlated mobility fluctuation is increased after the wake-up in the FeFET with HPA. Furthermore, the LFN of the FeFET with HPA shows robustness to P/E cycling-induced stress after the wake-up, showing superb endurance performance.

A technique to reduce the area of a low-noise sub-sampling PLL (SSPLL) is proposed. The resistor in the loop filter is eliminated. The transconductor driven by the phase detector is switched such that its output consists of a positive and negative pulse with the former wider than the latter. A low frequency zero can thus be realized with a substantially smaller capacitor. Transconductor noise is suppressed to acceptable levels by the high phase-detector gain. In applications that require low out-of-band phase noise, the capacitance can be reduced by 25x or more with typical PLL parameters. A prototype SSPLL from 24.4 GHz-29.2 GHz with a 50 MHz reference clock and bandwidth of 1MHz in 65nm LP CMOS process uses a loop filter capacitance of only 5pF. The conventional topology would require 38pF for the same integrated jitter. The in-band phase noise at 1MHz offset ranges from -90 to -95dBc/Hz, and the out-of-band phase noise at 10 MHz offset ranges from -117 to -121dBc/Hz. The jitter integrated from 10kHz to 50MHz is 330-390fs. It consumes 18.2mW, exhibiting a minimum FoM of 235dB over the frequency range. The SSPLL occupies an area of only 0.14mm².

Resistive switching (RS) has been studied for several applications such as information storage and bio-inspired computing, although reliability issues still prevent their massive use. In this work, we present a novel observation of trapping activity that imposes giant random conductance fluctuations, up to 3 orders of magnitude, resembling RTN in RS devices based on TiO2, HfO2 and hexagonal boron nitride (h-BN) under reading voltages (~ 0.1 V). These events appeared reproducible for all the aforementioned RS device types in sequential measurements and under different bias. This behavior is very beneficial to ensure recognition of the device’s two-state in applications such as stochastic computing integrated circuits (ICs).

It is critical for maintaining the safe operation of turbine blades to inspect the potential structural damages promptly. However, the industry still lacks efficient tools for inspection of the curved surface. In this respect, in this article, a new flexible probe with in-plane differential coils is proposed. With the sophisticated configuration, the probe has four channels, which complement each other in terms of sensitivity to defects of different orientations. The in-plane differential scheme nulls the background signal and reduces the noise resulting in high sensitivity to microdefects. The probe can be bent according to the curved surface due to its flexible configuration. A three-dimensional finite-element method model based on the cluster parallel computation is utilized to study the feasibility and performance of the probe, and a prototype probe is developed and tested by scanning defects on the curved surface of a turbine blade sample. Furthermore, a data fusion method is proposed to obtain a better signal-to-noise ratio so that defects with length*width*depth = 2.5 mm*0.1 mm*0.1 mm can be identified. Based on repeated experiments, it is observed that the probability of detection with the fusion of the multichannels is higher than that of every single channel demonstrating that the data fusion increases the reliability of the inspection.

Accurate localization of single particles plays an increasingly important role in a range of biological techniques, including single molecule tracking and localization-based superresolution microscopy. Such techniques require fast and accurate particle localization algorithms as well as nanometer-scale stability of the microscope. Here, we present a universal method for three-dimensional localization of single labeled and unlabeled particles based on local gradient calculation of microscopy images. The method outperforms current techniques in high noise conditions, and it is capable of nanometer accuracy localization of nano- and micro-particles with sub-ms calculation time. By localizing a fixed particle as fiducial mark and running a feedback loop, we demonstrate its applicability for active drift correction in sensitive nanomechanical measurements such as optical trapping and superresolution imaging. A multiplatform open software package comprising a set of tools for local gradient calculation in brightfield and fluorescence microscopy is shared to the scientific community.

For ac/dc power conversion applications like server power supply, telecom power supply, and on-board charger of an electric vehicle, the rising electricity demand has presented challenges toward high efficiency and high power density. The cascaded H-bridge (CHB) based multilevel power factor correction (PFC) converter has much higher power density than that of traditional boost PFC converter. However, the CHB-PFC converter has multiple floating dc outputs, which leads to a common mode (CM) electromagnetic interference (EMI) issue due to the parasitic capacitance of cascaded dc/dc stages and layouts and distributed noise sources existing in the ac/dc system. Thus, a large EMI filter is necessary for the PFC system that sharply degrades the system's power density. In order to quantify the CM noise caused by the floating outputs and cascaded parasitic capacitance, a unified equivalent CM circuit model is derived in this article, which decouples the effects among the multiple CM noise sources in the CHB converter. Based on the derived circuit model, a mirror-bridge phase-shift modulation is proposed to cancel the CM noise within the CHB converter itself. A single-phase 2-kW CHB PFC prototype has been built up to verify the analysis, and 40-dB CM noise reduction compared with conventional unipolar modulation is achieved by the proposed modulation scheme.

This article presents a novel straightforward and real-time algorithm to measure power system frequency. The main idea of this approach is to improve accuracy of the estimated frequency during off-nominal frequency conditions. The proposed approach includes two stages: 1) the DFT algorithm is used to estimate voltage amplitude and phase angle by assuming that the frequency is the same as its value at the previous step, and 2) based on Taylor approximation and using the least error square algorithm, the error due to the frequency difference is calculated and thus the estimated frequency would be updated. One of the main features of the proposed approach is that it can be easily implemented on the available industrial hardware requiring low computational burden. The proposed approach is also robust against noise and harmonics and can track the deviations of the power system frequency as well. The performance of the proposed approach is evaluated through simulation studies and also verified based on implementing it on a prototype synchronizing relay.

This article presents a frontend amplifier based on the 50-μm channel length n-type only indium-tin-oxide (ITO)-stabilized ZnO thin-film transistors (TFTs) on glass substrate. The amplifier has an external-bias ac-coupled, open-loop capacitor bootstrap structure. The area and power consumption are 41 mm² and 0.1 mW (8-V supply), respectively. Electrical measurement results show a gain of 20 dB, a bandwidth of 3 Hz-6 kHz, a common-mode rejection ratio (CMRR) up to 42 dB, an input impedance of 100 MΩ , and an input-referred noise of 106 μV $_{rms}$ (integrated from 1 to 200 Hz). The noise efficiency factor (NEF) and power efficiency factor (PEF) of the amplifier are, respectively, 248 and 4.9 x 10⁵, which is comparable among the state of the arts. The amplifier is successfully used to measure the heart-rate signal, which demonstrates its practicality.

A differential quench and reset (QR) configuration for single-photon avalanche diodes (SPADs) is proposed and investigated in this work. Compared to the traditional single QR configuration in which only one QR circuit is connected to either the cathode or anode of the SPAD, the differential QR configuration consists of two QR circuits to quench and reset through both the cathode and anode terminals. Using a SPAD fabricated in a 65 nm CMOS process, the measurement results of the traditional single passive quench and reset (SPQR) circuit and the proposed differential passive quench and reset (DPQR) circuit shows that the SPAD with the DPQR circuit presented a reduced reset time, an improved timing performance, an increased count rate and a decreased afterpulsing. In addition, the differential output pair from the DPQR circuit has the potential to increase the signal-to-noise ratio of the detection system due to its ability to reject common-mode noise and interference.

Advances in microelectronics have enabled smaller technical nodes, lower threshold voltages, and greater working frequencies. Even though VLSI circuit performance and power consumption have improved as a result, the reliability of the designs has suffered. A fall in noise resistance and an increase in uncertainty from multiple sources of variability make circuits more vulnerable as technology scales down. Fault tolerant techniques are commonly used in safety-critical applications. Three-dimensional electrical devices like double gate, tri-gate, and nanowire field-effect transistors (FETs) give an alternative approach since they regulate the device channel better electrostatically. In this paper, a new form of FinFET with asymmetric gate and source/drain connections is developed, and its simulation results are shown. Asymmetric FinFETs exhibit better short-channel behavior when the current density is increased, according to the results of the benchmarking. High aspect ratio FinFETs give greater current per area while demanding significantly fewer horizontal geometry constraints, making them ideal for situations where conventional scaling has hit its physical limits. The suggested multigate FinFET provides improved performance in low-power and high-frequency applications, according to the experimental results. The work report also includes an evaluation of the proposed multigate FinFET’s dependability.

Millimeter-wave radar interferometry is superior in detecting small displacement motions owing to its short wavelength. However, it is subject to phase ambiguity as the target displacement may often exceed a quarter wavelength. In this article, a modified differentiate and cross-multiply (MDACM) technique is proposed to tackle the phase ambiguity issue for accurate reconstruction of the phase history in millimeter-wave interferometry. In addition, to resolve the imperfections of the interferometric radar system, an MDACM-based integral phase reconstruction approach is presented, which seamlessly integrates alternating current (ac)-coupling-induced distortion correction, $I/Q$ mismatch correction, and direct current (dc) offsets’ calibration. Without causing any phase ambiguity, the proposed technique acts as a black box to take in the raw $I/Q$ signals and correct all the hardware imperfections, and it outputs the desired displacement motions with micrometer accuracy. The simulation results show that the proposed technique can not only linearly recover the displacement motions across a wide range in different noise conditions without any phase ambiguity but also improve the stability by 11 times under ac-coupling-induced distortion. With a custom-designed 120-GHz interferometric radar sensor, experiments were carried out to validate various scenarios including mechanical vibrations and gesture sensing. The experimental results show that the proposed technique can accurately track not only deep subwavelength motion of only $1~\mu \text{m}$ but also multiwavelength displacement of >40 times of the wavelength at 120 GHz.

Force measurement plays an important role in assessing the status of electromechanical system and the performance control. Force sensors are the most common devices that used for measuring force, and are made with various materials and fabrication methods. However, the components of most sensors are in contact with each other, which bring a lot of inconvenience to design and preparation the sensor, and also cause the interference and noise transmission between the substrate and conversion element. In this paper, a new force measurement method based on the auxetic structure is proposed. The scheme of this method consists of three parts, which are light source, auxetic structure and the solar cell. The auxetic structure can be regarded as a substrate and solar cell as a conversion element. These three parts are not in contact with each other. The basic principle of the proposed method is that the change of transmittance of the auxetic structure due to elastic deformation is transformed into the change of output current of the solar cell. The effectiveness of the proposed method is investigated by geometrical analysis and experiment. The sensitivity and linearity error of the proposed method based on the auxetic structure are 0.04mV/N and 8.17% respectively, while that based on the non-auxetic structure are 0.02mV/N and 14.78%. The results prove the feasibility of the proposed method and this study provides new structural insights for force sensors and presents future research directions.

A 12-GHz transformer feedback Class-F2,3 voltage-controlled oscillator (VCO) using noise circulating is proposed in this letter. Transformer feedback is utilized in the proposed VCO to achieve Class-F2,3 resonant impedance control at the VCO output and tail current transistor input. Also, the noise contribution of the tail current transistor is further reduced by partially circulating its noise into itself. The proposed VCO is fabricated in 40-nm CMOS process with 0.04-mm2 core area. Experimental results show that the frequency tuning range of the VCO is 11.74–12.63 GHz. The VCO achieves phase noise of −120.2 dBc/Hz at 1-MHz offset frequency at 12 GHz with figure of merit (FoM) of 190.5 dBc/Hz and FoM $_{T}$ of 187.8 dBc/Hz, and consumes 13.23 mW from a 1.1-V supply.

We present a 32.768 kHz crystal oscillator with ultra-low power operation and a fast startup featuring for IoT applications. A self-reference power gating scheme detects the amplitude of a clock, enabling a negative resistance booster to awake XO and keep the oscillation with a duty-cycling technique for minimizing power consumption. In addition, a relaxation oscillator injects in-band noise initially, further reducing the startup time. The prototype XO for proof-of-concept was fabricated in 0.11- $\mu \text{m}$ CMOS and fully characterized. It consumes 5.02 nW at 0.5-V supply and achieves the startup time of 1.26 s simultaneously.

The modulation strategies of dual active bridge (DAB) including single phase-shift (SPS), dual phase-shift (DPS), and triple phase-shift (TPS) have been proposed to optimize the efficiency, eliminate the reactive power, and release the current stress. While the previous literature focuses on the accurate loss model in steady states or small-signal analysis for dynamic response, the common-mode (CM) model has been largely ignored. The main contribution of this article then is to propose an analytical CM model for DAB, which considers the CM parasitic capacitors including those of grounded heatsink and transformer windings. Based on such model, the CM performance is compared among different modulation strategies. The impact of two H-bridge on the input and output CM voltage has been addressed. A prototype based on SiC devices is used to verify the proposed analytical mode under SPS, DPS, and TPS. It is found that while TPS improves the light-load efficiency it introduces the worst CM noise. Influence of the ZVS current setting on the CM performance is also discussed.

Multi-axis integration is important for micro-electromechanical system(MEMS) gyroscopes in the future. In this paper, a monolithic integrated tri-axis gyroscope and interface circuit are designed and implemented. The presented tri-axis gyroscope with single drive and multi sense axes is fully decoupled in structure among the drive and sense modes. Quadrature coupling can also be further reduced by the in-plane and out-of-plane correction electrodes. The pitch(roll) structure is designed as a unilateral unequal height comb, which reduces the damping and improves the Q value of pitch and roll modes and simplifies the fabrication process. In addition, the interface circuit adopts a closed-loop drive and open-loop sense circuit, an additional decoupling module that effectively reduces the cross axis sensitivity. Finally, a gyroscope prototype was tested to evaluate its performance. The designed tri-axis gyroscope has low bias instability(1.2821°/h) and good noise performance(0.1635°/ $\surd \text{h}$ ). The coupling coefficient is even below 1% after adding decoupling modules. Meanwhile, the bandwidth can meet the needs of the gyroscope working in a low-frequency environment.

In recent years, nitrogen vacancy (NV) centers have shown great potential for application in quantum sensor research due to their high sensitivity to magnetic fields and excellent spatial resolution. However, in practical applications, it is necessary to eliminate environmental requirements and bulky instruments brought by the optical detection of magnetic resonance (ODMR) measurement method.. In this paper, we propose an efficient portable magnetometer with a miniature confocal system (CSPM) to resist background noise and improve integration. The confocal system can automatically focus, and the volume is limited to 11 cm3. Moreover, a fiber optic flange, an antenna and a homemade integrated photodetector are integrated in the magnetometer to achieve the actual sensitivity of sub-40 nT/Hz1/2. In the experimental process of optimizing system parameters, we discovered the important influence of beam focusing or microwave uniform operation on the detection signal and proposed specific optimization methods, which have guiding significance for future integrated design. Through comparative experiments with an integration scheme that does not use uniform operation, we found that the CSPM reduces the system noise by 4.2 times and that the signal-to-noise ratio (SNR) increases by 6.2 dB.

With increasing scale and integration of distributed generations, it has become progressively significant for operation of modern distribution network to locate fault in widely used three-terminal lines accurately. For the using V/V connection in the voltage transformers of distribution network, only two line voltages are measured in China. Without phase voltage and accurate line parameters, the existing fault location method based on impedance can’t be applied in distribution network any more. To solve this problem, a fault location method is proposed for three-terminal lines based on line voltage measured by ${\mu }$ MPMU (micro-multifunctional phasor measurement unit) without requirement for accurate impedance parameters. The transformation from two line voltages to positive-sequence component is proposed at first. Then location equations are established on the basis of positive-sequence network, with impedance parameters of lines and fault position as unknown variables solved together. The influence of random measurement noise is suppressed by applying the characteristics of fundamental frequency component’s amplitude and initial phase. The simulation results show that the proposed method has high accuracy and reliability, and can overcome the limitation of line voltage measurement, inaccurate impedance parameters, and measurement noise.

Turn-to-turn faults between primary windings due to insulation degradation are a major cause of distribution transformer failure, and occur due to high levels of stress such as overloading and overheating. An additional consequence of these faults is an increased voltage on the transformer secondary due to effective change in turns ratio. This paper develops a novel method for early detection of insulation degradation and subsequent inter-turn winding failure by monitoring the transformer secondary voltage. The algorithm is based on a cumulative sum (CUSUM) statistic and compares voltages on neighbouring transformers to flag degrading assets. Results obtained from simulation as well as experimental data show that smart meter measurements can be utilized to achieve very high detection accuracy while keeping costs low. The paper also demonstrates the validity of the algorithm in the presence of measurement noise, residential solar power injection etc.

This paper presents an in-run mode-matching method for MEMS gyroscopes based on the power symmetry between the sideband signals in the sense mode. The method takes advantage of the power symmetry of both the noise and the Coriolis response within the upper sideband (USB) and the lower sideband (LSB) of the driving frequency. The power difference is taken as a mismatch detection and is fed to the mode-matching controller, which regulates the tuning electrodes. During the matching control, the history of the estimated mode order is recorded to adaptively tune the controller gain, speeding up the tracking process and reducing the steady ripples. The experiments exhibited that the frequency loop could converge to the steady-state within a reasonable time and with 0.28Hz peak-peak fluctuation. By the mode-matching, the scale factor of the gyroscope under test was boosted by ten times; the angle random walk was enhanced from 8.13deg/h/sqrt(Hz) to 1.99deg/h/sqrt(Hz); the bias instability was improved from 2.09deg/h to 1.12deg/h. The method proposed in this paper can be implemented with a general platform that MEMS gyroscopes usually utilize.

The scalable synthesis and transfer of large-area graphene underpins the development of nanoscale photonic devices ideal for new applications in a variety of fields, ranging from biotechnology, to wearable sensors for healthcare and motion detection, to quantum transport, communications, and metrology. We report room-temperature zero-bias thermoelectric photodetectors, based on single- and polycrystal graphene grown by chemical vapor deposition (CVD), tunable over the whole terahertz range (0.1-10 THz) by selecting the resonance of an on-chip patterned nanoantenna. Efficient light detection with noise equivalent powers

A low-cost device for eddy current non-destructive testing made of off-the-shelf components is described. The system consists of a dual H-bridge stepper motor driver, a coil wound in-house on an additively manufactured support, a tunneling magnetoresistance sensor, and a data generation/acquisition module. The system is compact, and it can flexibly generate rectangular pulses, square wave bursts and arbitrary binary excitation waveforms. Among these, in this paper pseudo-noise binary signals were used within a pulse-compression measurement protocol to increase the SNR and the inspection sensitivity with respect to pulsed excitation. A benchmark sample was analyzed, and all the defects were correctly located, demonstrating a good detection capability of the overall hardware-software solution proposed. It was also found that pulse-compression output signals can be further processed as standard pulsed eddy current data. Features can be extracted from them for defect classification purposes and the lift-off invariant point can be used for imaging. These results were achieved by assembling a low-cost handy device, which can be further improved in portability and performances using different off-the-shelf components and by integrating it with a single-board PC, paving the way for future developments in this field.

Avalanche photodiodes (APDs) are used in optical receivers of high-speed optical communication systems to improve signal-to-noise ratio over conventional photodiodes. Low excess noise characteristics are crucial for APDs to preserve the benefits associated with high internal gains. In this work, we presented room temperature data of avalanche gain and excess noise factors of Al0.85Ga0.15As0.56Sb0.44 APDs using pure and mixed carrier injection profiles. Using pure electron injection, the best possible excess noise performance for a given avalanche width was measured with an excess noise factor https://doi.org/10.15131/shef.data.15082455 )

In this paper, a low voltage bandgap reference circuit has been proposed. The introduction of a modified beta multiplier bias circuit decreased the mismatch caused by the PMOS transistors opamp con...

This research introduces a closed-loop method to improve the zero-rate output (ZRO) stability of amplitude-modulated (AM) capacitive MEMS gyroscopes, even in absence of quadrature compensation electrodes. The method relies on the direct measurement and closed-loop compensation of the variation of the relative phase between the quadrature output, modulated by the drive carrier frequency, and the demodulation reference. The closed loop includes a phase meter, whose output regulates the phase of the lock-in amplifier inside the sense-mode, open-loop, demodulation chain. The proposed technique, tested on the pitch axis of a consumer-grade commercial monolithic 3-axis gyroscope, brings up to 300-fold stability improvements over temperature transients, without affecting noise and scale-factor performance. Stability limits depend on the phase meter resolution and on the lock-in granularity in regulating the phase. Overall, a mdps/K stability is obtained with a one-time calibration at ambient temperature and no post-acquisition processing. [2021-0049]

Semiconductor lasers are widely used in incoherent/coherent optical communications, optical fiber sensing, and lidar due to their small size, high efficiency, and immunity to vibrations. To support the continuous evolution of these high-performance application systems, the noise characteristics of semiconductor lasers play a key role and the noise levels need to be reduced to unprecedentedly low values (such as quantum limit). In this paper, a comprehensive overview on the principles, measurements, and suppressions of semiconductor laser noises are provided. First, we introduce the analysis models and key performance indicators of semiconductor lasers related to noise. Then, different noise measurement systems are investigated for semiconductor lasers and the noise characteristics are fully analyzed. Next, the noise suppression methods towards semiconductor lasers are demonstrated from three aspects: the chip structures, the external cavity optical feedback technology and the driving and controlling circuits. Finally, we summarize the recent advances on the noise measurement and suppression of semiconductor laser, future prospects are also discussed.

In this paper, we investigate the performance of a full-duplex (FD) relay system where multi-antennas are exploited at source and destination. Unlike previous works, the impacts of imperfect channel state information (I-CSI), transceiver hardware noise (THN), and residual self-interference (RSI) are taken into account. We mathematically derive the exact closed-form expressions of the outage probability (OP), symbol error rate (SER), and ergodic capacity (EC) of the FD relay system with I-CSI, THN, and RSI over Nakagami- $m$ fading channels. From the derived expressions, the performance of the considered system under the effects of three negative factors (I-CSI, THN, and RSI) is compared with that system in the case of all ideal factors (perfect channel state information (P-CSI), perfect transceiver hardware (P-TH) and perfect self-interference cancellation (P-SIC)), two ideal factors (P-CSI and P-TH, P-CSI and P-SIC, P-TH and P-SIC), or one ideal factor (P-CSI or P-TH or P-SIC). Numerical results show a strong impact of three negative factors on the OP, SER, and EC of the considered FD relay system, especially when the data transmission rate of the system and signal-to-noise ratio (SNR) are high. In particular, OP, SER, and EC go to the floors in the high SNR regime due to the three negative factors. Therefore, when I-CSI, THNs, and RSI exist in the FD relay system, we should use suitable source and relay transmission power to obtain excellent performance while saving energy consumption. Moreover, when two of the three negative factors are large enough, the remaining factor’s impact becomes weaker and may be neglected in certain circumstances.

Stabilization of residual point defects at the finishing stages of noise diodes can be ensured by the selection of appropriate ignition modes and the environment of its conduct. The method and technology of reducing the concentration of point defects in the structure of p-n-transition, taking into account the content of impurities of secondary metals, oxygen and nitrogen is proposed. It has been established that the burning of readymade structures and diodes of noise generators in nitrogen environments at temperatures of 450…600 °С for (80 ± 3) min leads to an increase in spectral noise density and a significant (twice) reduction of its unevenness. The most important result of this burn is a reduction in the spread of the average values of the noise parameters studied: by 61.2 % in effective noise voltage; spectral density by 34.2 %; at the boundary frequency of the signal by 34.9 %; in non-linear density by 25.9 %. This improves the quality of random numerical sequences in information protection software systems.

We demonstrate a hybrid solution for simultaneous transfer of ultra-stable optical frequency, RF frequency and time signal on a 100 km fiber spool with the same wavelength based on coherent demodulation and optical phase-lock-loop (OPLL). The one pulse per second (1PPS) is encoded by phase and RF frequency is encoded with an intensity modulator. The noise caused by fiber link is compensated by the round-trip method. And the bad effect on optical frequency caused by optical phase modulation (PM) can be cleaned using OPLL. When the fiber link is stabilized, the transferred time deviation (TDEV) can be 2.4E-11@1s and 1.9E-12@104s, RF frequency stability can achieve 8.0E-14@1s and 2.5E-17@104s, the modified Allan deviation (MDEV) of cleaned optical frequency can be 1.4E-16@1s and 1.6E-19@104s.

We demonstrate an optical fiber vector magnetic field sensor based on Mach-Zehnder interferometer by splicing a section of side-polished hollow-core fiber between two sections of single-mode fiber. As a varied magnetic field is applied to the magnetic fluid encapsulated sandwiched structure, the transmission spectra of the sensor will vary with the intensity and the direction of the magnetic field. In our experiments, at the incident light wavelength around 1510 nm, the magnetic field orientation sensitivity and intensity sensitivity are 180 pm/° and 240 pm/mT, respectively. In addition, a high contrast of about 20 dB between the signal interference dip with the noise interference dip is obtained in our experiments. The proposed all-optical fiber magnetic field sensor has the advantages of simple structure, compact size, low cost and easy fabrication.

Two RF CMOS voltage-controlled oscillators (VCOs) with source damping resistors to suppress 1/ ${f}$ noise up-conversion are presented in this letter. Two important parameters: the phase deviation from the first harmonic term of the ideal impulse sensitivity function (ISF), and the initial phase of the first harmonic term of channel current, dominate the 1/ ${f}$ noise up-conversion. Based on the outcome, the effects of the source damping resistors on the two phases are analyzed and two VCO prototypes are designed. Implemented in Taiwan Semiconductor Manufacturing Company 180 nm RF CMOS process, the VCOs achieve 64.7% and 50% frequency tuning range at 2.3–4.5 and 3–5 GHz, respectively, and perform phase noise (PN) of −131.03, −129.28, and −124.98 dBc/Hz at 1 MHz offset from output frequencies of 2.33, 3.057, and 4.57 GHz separately.

Optical superchannels provide a route to obtaining the highest achievable data rates in optical fiber systems. Here, we investigate the role of optical filtering on system performance and required optical signal-to-noise ratio, when receiving a single sub-band from an optical superchannel, where the dominant noise source changes from optical to transceiver noise. We find that optical filtering can provide improvement up to 3 dB in signal quality and around 1 b/symbol in information rate, in an experiment where transceiver noise is dominant.

In this brief, an enhanced derivative superposition (DS) method is proposed to increase the third-order input intercept point (IIP3) of double-balanced CMOS active mixers. In the proposed mixer, an auxiliary common-gate transconductor biased in the moderate inversion region with a source inductive degeneration is used in the feedforward AC-coupled path to the main transconductor to generate the third-order intermodulation distortion (IMD3) current. Hence, the overall IMD3 current of the transconductance stage is minimized while optimizing the conversion gain (CG). This auxiliary transconductor also improves the overall NF of the mixer by partially cancelling the output noise voltage. In addition, the current reuse and current bleeding techniques are utilized to further improve the overall performance. As a proof-of-concept, a 2.4-GHz down-conversion mixer with an output bandwidth of 10 MHz is implemented in a 65-nm CMOS process. Measurement results show that the mixer achieves a peak CG of 12.5 dB, a double-sideband (DSB) noise figure (NF) of 10.5 dB, and IIP3 of +7.6 dBm. The circuit consumes 1.2 mW from a 1-V supply and excluding the pads, it occupies a silicon area of 0.2208 mm2.

There are two bias schemes, namely current-bias and voltage-bias, for the directly coupled readout circuit of direct current superconducting quantum interference device (dc SQUID). In order to find out the difference between two bias schemes, we present the theoretical analyses on their equivalent circuits, working point locations, and noise performances. The theoretical analysis and experimental validation prove that the voltage-bias scheme achieves a larger transfer coefficient and exhibits a better noise performance than the current-bias scheme in the reading of conventional dc SQUID.

This study presents the simultaneous signal and noise modelling and analysis of mm‐wave/THz high electron mobility transistors (HEMTs) in the linear regime as stochastic active multi‐conductor transmission lines (SAMTLs). For such devices, stochastic inhomogeneous telegrapher equations of SAMTLs are extracted assuming the domination of the quasi‐transverse electromagnetic mode. Analytical solutions for these equations do not exist. So a numerical analysis of such equations is introduced here at millimetre‐wave and terahertz frequencies. These equations are analysed with a numerical method in the time domain, namely the finite‐integration technique. A semi‐distributed model in the advanced design system commercial software is used to validate the numerical results. Also, the results of noise figure and scattering parameters (S‐parameters) for the metal–semiconductor field‐effect transistor transistor, which has the same SAMTLs model as the HEMT transistor, are compared with the measurement reports at microwave frequencies.

This paper describes a two-coil eddy current sensor being used in a transmit-receive arrangement at 1 MHz, where the drive and amplification electronics are miniaturised and built directly behind the coil to reduce noise and the effects from cable length. Small, simulated defects are detected, less than 500 microns in length, on titanium and titanium aluminide, which is an increasingly important alloy for aerospace applications. Data is analysed quantitatively in a parametric approach. This experiment uses a transmitting coil driven by a constant current source and a separate receiving coil, where the magnitude and phase of the induced voltage signals on both coils are measured independently. Experimental measurements are validated using finite element modelling and the phase of the signal on the receiving coil in particular is less susceptible to variations caused by changes in lift-off. A combination of experimental and simulation data of 2D surface scans and lift-off measurements show the variation in the magnitude and phase of the eddy current signal with lift-off on Ti, TiAl (Ti-45Al-2Mn-2Nb-1B) and 316L stainless steel. It is also shown that the high-frequency lower noise approach can reliably detect defects of less than 500 microns in length in both Ti and TiAl.