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Enhancement-mode (E-mode) vertical $\beta $ -Ga2O3 metal–oxide–semiconductor (MOS) field-effect transistors featuring a current aperture were developed on a single-crystal $\beta $ -Ga2O3 (001) substrate. Nitrogen ions were implanted into a drift layer grown by halide vapor phase epitaxy to form current blocking layers (CBLs) for vertical source–drain isolation, while Si ions were implanted to form degenerately doped source contact regions and a top-gated lateral channel that was fully depleted at 0-V gate bias. The devices delivered a high output current on/off ratio of $2\times {10}^{{7}}$ despite a nonideal MOS interface that limited the maximum drain current density to

Depletion-mode vertical Ga2O3 metal-oxide-semiconductor field-effect transistors featuring a current aperture were developed on a halide vapor phase epitaxial drift layer grown on a bulk $\beta $ -Ga2O3 (001) substrate. Three ion implantation steps were employed to fabricate the ${n}^{++}$ source regions, lateral ${n}$ channel, and ${p}$ current blocking layers, where Si and N were selected as the donor and deep acceptor dopant species, respectively. The transistors delivered a drain current density of 0.42 kA/cm2, a specific on-resistance of 31.5 $\text{m}\Omega \cdot \text {cm}^{2}$ , and an output current on/off ratio of over 108. High-voltage performance of the present devices was hampered by a large gate oxide field in the off-state causing high gate leakage, a limitation that can be readily overcome through optimized doping schemes and an improved gate dielectric. The demonstration of a planar-gate vertical Ga2O3 transistor based on a highly manufacturable all-ion-implanted process greatly enhances the prospects for Ga2O3-based power electronics.

Gallium oxide (Ga 2 O 3 ) is an attractive material for next-generation power device applications due to its large breakdown electric field $(> \mathbf{7\ MV}/\mathbf{cm})$ . This paper highlights current-aperture vertical Ga 2 O 3 metal-oxide-semiconductor field-effect transistors fabricated using silicon- and nitrogen-ion implantation processes.

Ga2O3 has exploded onto the semiconductor landscape for next-generation power electronics because its enticing material properties, most notably a large critical field strength stemming from its ultrawide bandgap, promise miniaturized circuits and systems with high conversion efficiency. Intense pursuit of Ga2O3 power devices galvanized by the demonstration of a high-voltage Ga2O3 field-effect transistor (FET) in 2012 has brought about tremendous advancements in this new technology, whose strong radiation tolerance and high thermal stability also befit harsh-environment applications that impose stringent reliability requirements. This chapter reviews the designs and properties of various types of depletion- and enhancement-mode Ga2O3 FETs—which have predominantly been lateral devices—for power switching and radiation-hard electronics. The development of vertical Ga2O3 transistors based on a low-cost, highly manufacturable ion implantation doping process will also be presented.

Gallium oxide $(\mathbf{Ga}_{2}\mathbf{O}_{3})$ is an emerging ultra-wide-bandgap semiconductor especially suitable for high-power and/or high-voltage switching device applications. In this paper, device fabrication process and characteristics of depletion-mode and enhancement-mode vertical $\mathbf{Ga}_{2}\mathbf{O}_{3}$ transistors fabricated by using a multiple ion-implantation doping process are discussed.

Wafer-bonded current aperture vertical electron transistors (BAVETs) aim to eliminate the present bottleneck of simultaneously achieving high frequency and high breakdown. BAVETs enable novel transistors with a high mobility III-As (mobility = 12000 cm2 V−1S−1) channel, and a wide-bandgap III-N (breakdown field = 3.3MV.cm-1) drift region. A BAVET device, based on a current aperture vertical electron transistor (CA VET), comprises source contacts to n-doped $\mathrm{In}_{0.53}\mathrm{Ga}_{0.47}\mathrm{As}$ channel, with $\mathrm{I}\mathfrak{n}_{0.52}\mathrm{Al}_{0.48}\mathrm{As}$ as the gate barrier, InGaN/GaN layers for the drift region, and n+GaN as the drain-contact layer (Fig. 1) [1]. The on-state DC performance in a BAVET has been traditionally affected by abnormally high on-current-saturation voltage, $V_{\mathrm{DS}_{-}\mathrm{SAT}}(> 12\mathrm{V})$ (Fig. 2) [2]–[4]. Herein, we investigate the cause of this abnormality and report a significant reduction in $\mathrm{V}_{\mathrm{DS}_{-}\mathrm{SAT}}(5\mathrm{V})$ .

$\beta$ -Ga 2 O 3 has captured attention in recent years for power electronics. Opportunities also exist for $\beta$ -Ga 2 O 3 transistors to operate as radio-frequency amplifiers. For highly-scaled devices, strong confinement of the channel is critical for mitigating short-channel effects. In this work, a depletion-mode $n$ -channel $\beta$ -Ga 2 O 3 MOSFET with a back-barrier formed by implantation of deep nitrogen acceptors was demonstrated. Despite being fabricated on a conductive base material, the device delivered a drain current density of 103 mA/mm commensurate with the channel charge density and a large output current on/off ratio of $4\times 10^{9}$ , both of which attested to the efficacy of back-barrier isolation. Pulsed current-voltage measurements revealed the presence of electron trapping under the gate manifested as a threshold voltage shift. The dominant charge trapping effect was mitigated instead of exacerbated by applying a large reverse gate bias - a behavior consistent with field-assisted trap emission. These results indicate a need for further process optimization to improve the speed and reliability of the device.

The advent of acceptor-type doping of β-Ga2O3 through ion-implantation of nitrogen has opened a new design space for junction-type devices with estimated breakdown voltages in excess of a few kVs. However, the presence of deep states due to intrinsic defects in β-Ga2O3 and implantation damage could be detrimental to the performance and reliability of such devices. We give a phenomenological description and experimental demonstration of the effects of nitrogen implantation in a buried blocking layer on the performance of transistors. The partial activation of acceptor-like states in the buried implanted region has been revealed and estimated to be ∼20% through a junction spectroscopic technique involving substrate-bias and sub-bandgap illumination, which remains elusive to standard characterization techniques. The characterization technique, along with a space-charge model of the channel and band model of the buried implanted layer, has revealed the presence of photosensitive mid-bandgap (∼2.47 eV below the conduction band) and tail states near the valence band edge of nitrogen-implanted β-Ga2O3.

Gallium oxide (Ga2O3) has emerged as a new competitor to SiC and GaN in the race toward next-generation power switching and harsh environment electronics by virtue of the excellent material properties and the relative ease of mass wafer production. In this proceedings paper, an overview of our recent development progress of Ga2O3 metal-oxide-semiconductor field-effect transistors and Schottky barrier diodes will be reported.

β-Ga 2 O 3 is being actively pursued for power devices owing to its wide bandgap of 4.5 eV and the availability of melt-grown native substrates for high quality epitaxy. Depletion and enhancement mode Ga 2 O 3 metal-oxide-semiconductor field-effect transistors (MOSFETS) reported to date have been implemented as lateral devices. For high voltage and high power ratings, vertical topologies are preferred since chip area utilization is more efficient and device operation is insensitive to surface effects. This paper presents the first experimental demonstration of a vertical Ga 2 O 3 MOSFET, wherein the source was electrically isolated from the drain by a current blocking layer (CBL) except at an aperture opening through which drain current (I DS ) was conducted [1]. Modulation of I DS was effected by gating a channel above the CBL. Similar to Si and SiC technologies, this planar device structure was fabricated with no regrowth steps. The buried CBL, which acted as a back barrier for the channel, was formed by Mg-ion (Mg++) implantation doping in light of the anticipated deep acceptor nature of Mg in β-Ga 2 O 3 . Despite large source-drain leakage due to an unoptimized CBL, successful transistor action was realized.

We report on the investigation of the charge trapping characteristics of dielectric-gated AlGaN/GaN high electron mobility transistors (HEMTs) with atomic layer deposited HfO2 (Tetrakis-(ethylmethylamino)hafnium and H2O precursors). The impact of process development and tool contamination in an Au-free 200-mm silicon CMOS line is discussed. The interfacial GaOxNy layer is proposed to be the primary location of long time constant traps. We examine the impact of these trap states on threshold voltage engineering of the gate stack. Enhancement mode operation of HEMTs is demonstrated, and the stability of enhancement mode is discussed.

Compound semiconductors belong to the most important materials for optoelectronic applications. Many of them exhibit favorable optical properties, such as a direct energy band gap (in contrast to silicon) and high-absorption coefficients over a wide spectral range. Moreover, varying the composition of the compound or substituting some of its elements often allows for controlled band gap engineering and optimization for specific applications. Because many compound semiconductors enable efficient conversion of light into electricity and vice versa, they are commonly used materials for optoelectronic devices.

A vertical β-Ga2O3 metal–oxide–semiconductor field-effect transistor featuring a planar-gate architecture is presented. The device was fabricated by an all-ion-implanted process without requiring trench etching or epitaxial regrowth. A Mg-ion-implanted current blocking layer (CBL) provided electrical isolation between the source and the drain except at an aperture opening through which drain current was conducted. Successful transistor action was realized by gating a Si-ion-implanted channel above the CBL. Thermal diffusion of Mg induced a large source–drain leakage current through the CBL, which resulted in compromised off-state device characteristics as well as a reduced peak extrinsic transconductance compared with the results of simulations.

We present a high-performance SiN/AlGaN (cap)/GaN (channel)/AlN (barrier)/GaN (buffer) metal-insulator-semiconductor high-electron-mobility transistor grown on the N-face, in which the 2-D electron gas (2DEG) is induced at the top GaN/AlN interface. The use of AlN eliminates alloy disorder scattering to the 2DEG and provides strong back-barrier confinement of the 2DEG under high electric fields for device scaling. Devices with 0.7-mum gate length showed a current-gain cutoff frequency (fT) of 17 GHz and a power-gain cutoff frequency (f max) of 37 GHz. A continuous-wave output power density of 7.1 W/mm was measured at 4 GHz, with 58% power-added efficiency and a large-signal gain of 15.3 dB at a drain bias of 35 V.

Gallium oxide (Ga2O3) possesses excellent material properties especially for power device applications. It is also attractive from an industrial viewpoint since large-size, high-quality wafers can be manufactured by using simple methods. These two features have drawn much attention to Ga2O3 as a new wide bandgap semiconductor following SiC and GaN. In this report, we describe the recent progress in development on fundamental technologies for Ga2O3 devices, covering wafer production from melt-grown bulk single crystals, homoepitaxial thin-film growth by halide vapor phase epitaxy, as well as device processing and characterization of metal-oxide-semiconductor field-effect transistors and Schottky barrier diodes.

High-electron-mobility transistor (HEMT) structures were regrown by molecular beam epitaxy on GaN-on-SiC templates and free-standing (FS) GaN substrates with very low threading dislocation density (TDD). To ensure a high buffer breakdown voltage, the thickness of the unintentionally doped (UID) GaN buffer layer, d UID, was reduced to 200 nm for the HEMTs regrown on FS GaN. A reduction in TDD entailed an increase in the three-terminal breakdown voltage for passivated HEMTs. With a low d UID, the proximity effects of the carbon-doped GaN buffer were evident. A power-added efficiency (PAE) of 37% and continuous-wave power output (P out) of 4.2 W/mm were measured at 4 GHz with a drain bias of 40 V for a HEMT on FS GaN without a back barrier. By including a 5 nm Al0.3Ga0.7N back barrier, PAE and P out improved to 50% and 6.7 W/mm, respectively, at a drain bias of 40 V.

A current aperture vertical electron transistor (CAVET) with a Mg-ion-implanted current blocking layer (CBL) and a channel regrown by plasma assisted molecular beam epitaxy (MBE), is successfully demonstrated on bulk GaN to work as a high voltage device. The fabrication of the device combined a drift region grown by metalorganic chemical vapor deposition (MOCVD), to hold the blocking voltage, with AlGaN/GaN layers regrown by plasma-MBE to conduct current. The device registered a maximum current of 4 kA· cm-2 under direct-current operation offering a specific on-state resistance Ron - A of 2.2 mΩ·cm2. With 80 μs pulses applied to the gate, the devices showed no dispersion. The increased aperture length Lap resulted in the decrease in specific Ron, as expected. The impact of the gate overlap to aperture Lgo on the leakage current was studied, where the leakage current was found to increase with a smaller overlap.

We report enhanced dc and small-signal RF performance of enhancement-mode (E-mode) metal-oxide-semiconductor heterojunction field-effect transistors (MOS-HFETs) in N-polar GaN technology with an ultrathin 5-nm GaN channel and graded AlGaN back-barrier structure with a record on-resistance (Ron) of 0.66 Ω·mm. The device has a maximum drain current (Id) of 1.15 A/mm, a peak transconductance (gm) of 510 mS/mm, and a peak current-gain cutoff frequency (ft) of 122 GHz, with a positive threshold voltage (Vth) of 1.6 V. The device shows improved saturation and pinchoff characteristics compared to the previously reported N-polar E-mode HFETs with a maximum Ion/Ioff ratio of 2.2 × 105.

Enhancement-mode β-Ga2O3 metal–oxide–semiconductor field-effect transistors with low series resistance were achieved by Si-ion implantation doping of the source/drain contacts and access regions. An unintentionally doped Ga2O3 channel with low background carrier concentration that was fully depleted at a gate bias of 0 V gave rise to a positive threshold voltage without additional constraints on the channel dimensions or device architecture. Transistors with a channel length of 4 µm delivered a maximum drain current density (I DS) of 1.4 mA/mm and an I DS on/off ratio near 106. Nonidealities associated with the Al2O3 gate dielectric as well as their impact on enhancement-mode device performance are discussed.

A high-performance N-face GaN metal-insulator-semiconductor high-electron-mobility transistor was fabricated. A dual-AlN back-barrier scheme was developed using polarization engineering to provide a large total dipole moment, which allowed enhanced modulation doping for a higher 2-D electron gas density without parallel conduction. Devices with 0.6-mum gate length showed an fT and f max of 17 and 58 GHz, respectively. A highest power-added efficiency (PAE) of 71% at 4 GHz was measured in these devices with 20-V drain bias. At 28 V, an output power density of 6.4 W/mm with 67% PAE was achieved.

We present a systematic study of the impact of CF4 plasma treatment on GaN. It was found that CF4 plasma etches GaN at a slow rate and yields a smooth etched surface. The effect of CF4 plasma on electrical characteristics of GaN metal-semiconductor field-effect-transistor structures shows that the CF4 plasma introduces acceptors into the near surface region of the GaN, which depletes mobile electrons. It was further demonstrated that leakage current of AlGaN/GaN (or GaN) Schottky diodes can be significantly suppressed by proper CF4 plasma treatment. These unique properties of CF4 plasma can be utilized for the advanced processing of GaN transistors.

We have been proposing a new oxide compound semiconductor, gallium oxide (Ga2O3), as a promising candidate for power device applications because of its excellent material properties and suitability for mass production. The 4.8-eV bandgap and the Baliga's figure of merit of Ga2O3 are much larger than those of SiC and GaN, which will enable Ga2O3 power devices with higher breakdown voltage and efficiency than SiC and GaN devices. The other important advantage of Ga2O3 is that a single-crystal bulk can be grown by using the same melt growth method as is used for sapphire. Therefore, Ga2O3 power devices have the obvious potential to surpass SiC and GaN in not only device performance but also cost effectiveness. In this work, we fabricated and demonstrated depletion-mode Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs).

DC stressing of molecular beam epitaxy (MBE)-grown high electron mobility transistors (HEMTs) is found to degrade device performance primarily due to increased defect/trap formation. Using constant drain-current deep level optical/transient spectroscopy (CID-DLOS/DLTS) methods, a specific virtual-gate related electron trap with energy E C -0.45 eV was observed to increase in concentration following DC stressing. The enhanced formation of this defect correlates quantitatively with a stress-induced knee-walkout (performance-degradation) of the HEMT that manifests itself in the pulsed I–V measurements.

Degradation mechanisms in AlGaN/GaN high electron mobility transistors have been studied under pinch-off conditions. Sites of localized emission of electroluminescence (EL) in the form of hotspots, known to be related to gate leakage currents, are shown to be the result of the generation of non-radiative recombination centers in the AlGaN device layer during device stress. EL from the hotspot site contains both hot-carrier emission from the acceleration of charge carriers in the device channel and defect-related transitions. Gate leakage through the generated centers is the most likely mechanism for the observation of EL hotspots. Degradation mechanisms in AlGaN/GaN high electron mobility transistors (HEMTs) have been studied under pinch-off conditions. Sites of localized emission of electroluminescence (EL) in the form of hotspots, known to be related to gate leakage currents, are shown to be the result of the generation of non-radiative recombination centers in the AlGaN device layer during device stress. EL from the hotspot site contains both hot-carrier emission from the acceleration of charge carriers in the device channel, and defect-related transitions. Gate leakage through the generated centers is the most likely mechanism for the observation of EL hotspots.

GaN-based power transistors are rapidly developing as a contender for application in next generation high efficiency power electronics. They are either lateral devices like HEMTs or vertical devices of the form of the Current Aperture Vertical Electron Transistor (CAVET) [1, 2]. A CAVET (Fig.1) is a vertical device with source and gate on top and a current aperture that allows current to flow vertically down from the source to the drain. It has a current blocking layer (CBL) to block current flowing vertically through any other path but the aperture. The process flow for fabricating a CAVET is illustrated in figure 2. One way to achieve the current blocking layer is by implanting the layer with [Mg]-ion. However the difficulty in using a Mg-implanted barrier layer was the unintentional diffusion of the Mg into the overlying channel region (see Fig.3). This caused a significant threshold voltage shift in devices and in many cases the electrons in the channel were trapped or completely depleted by diffusing Mg acceptors. In this paper we report on successfully addressing this critical problem by using MBE to re-grow the channel containing the 2DEG on top of the n drift region that is grown by MOCVD resulting in devices free of dispersion (80µs pulse width) and R on less than 2.5 mΩ-cm2. Here the advantages of MBE, that of a low growth temperature and hence suppressed Mg diffusion, is combined with the advantages of MOCVD, that of a high growth rate of high purity material necessary for the thick drift region to support high voltage required in power electronics.

In summary, an N-face HEMT with good DC and RF properties was demonstrated. The use of AlN for electron confinement eliminates alloy scattering and offers a strong back barrier to mitigate short channel effects for highly scaled submicron devices. N-face devices are therefore expected to deliver excellent power density and efficiency with low leakage at microwave and mm-wave frequencies.

In this paper, we discuss recent developments in our work on N-polar GaN heterostructure transistors. While most work in GaN devices has been on Ga-polar films, the opposite direction of polarization provides advantages that could be useful for different device applications. We will first discuss implications of the reversed polarization on transistor design.

We describe the development of N-polar GaN-based high electron mobility transistors grown by N2 plasma-assisted molecular beam epitaxy on C-face SiC substrates. High mobility AlGaN∕GaN modulation-doped two-dimensional electron gas channels were grown, and transistors with excellent dc and small-signal performance were fabricated on these wafers. Large-signal dispersion was observed, and the trap states responsible for this were identified, and layer designs to remove the dispersive effects of these traps were demonstrated. Finally, an AlGaN-cap layer was used to reduce gate leakage in these devices, and a low-dispersion high breakdown voltage device was achieved. This detailed study of dispersion and leakage in N-polar GaN-based transistors establishes a technological base for further development of field effect devices based on N-polar III-nitrides.

The authors report on the integration of an Au-free contact module intended for AlGaN/GaN high-electron-mobility transistors fabricated in a 200 mm Si complementary metal–oxide–semiconductor facility. Contacts are characterized via transfer line method structures, tunneling electron microscopy, and energy-dispersive x-ray spectroscopy. Factors leading to incorrect extraction of contact resistance are discussed. The authors find that reoptimization of chemical vapor deposited silicon nitride on AlGaN/GaN substrates is required to ensure reliable determination of contact resistance, gate-to-source spacing, and gate-to-drain spacing. Additional process development is required to enable parallel processing of Si and GaN devices.

Gallium nitride (GaN) is becoming the material of choice for power electronics to enable the roadmap of increasing power density by simultaneously enabling high-power conversion efficiency and reduced form factor. This is because the low switching losses of GaN enable high-frequency operation which reduces bulky passive components with negligible change in efficiency. Commercialization of GaN-on-Si materials for power electronics has led to the entry of GaN devices into the medium-power market since the performance-over-cost of even first-generation products looks very attractive compared to today's mature Si-based solutions. On the other hand, the high-power market still remains unaddressed by lateral GaN devices. The current and voltage demand for high-power conversion application makes the chip area in a lateral topology so large that it becomes difficult to manufacture. Vertical GaN devices would play a big role alongside silicon carbide (SiC) to address the high-power conversion needs. In this paper vertical GaN devices are discussed with emphasis on current aperture vertical electron transistors (CAVETs) which have shown promising performance. The fabrication-related challenges and the future possibilities enabled by the availability of good-quality, cost-competitive bulk GaN material are also evaluated for CAVETs.

This paper reviews the progress of N-polar () GaN high frequency electronics that aims at addressing the device scaling challenges faced by GaN high electron mobility transistors (HEMTs) for radio-frequency and mixed-signal applications. Device quality (Al, In, Ga)N materials for N-polar heterostructures are developed using molecular beam epitaxy and metalorganic chemical vapor deposition. The principles of polarization engineering for designing N-polar HEMT structures will be outlined. The performance, scaling behavior and challenges of microwave power devices as well as highly-scaled depletion- and enhancement-mode devices employing advanced technologies including self-aligned processes, n+ (In,Ga)N ohmic contact regrowth and high aspect ratio T-gates will be discussed. Recent research results on integrating N-polar GaN with Si for prospective novel applications will also be summarized.

Compound semiconductor layers (e.g., GaAs) grown on elemental semiconductor substrates (e.g., Si, Ge) are vulnerable to formation of anti-phase boundary (APB) defects. We show that optical second-harmonic generation (SHG) signals from APB-rich epi-layers are orders of magnitude weaker than from APB-free samples. Moreover, scanning SHG images of APB-rich layers reveal microstructure lacking in APB-free layers. We attribute these findings to the sign reversal of the second-order nonlinear optical susceptibility χijk(2) between neighbouring anti-phase domains within the incident laser spot. In contrast, SHG is insensitive to threading dislocations. Thus, SHG can identify APBs selectively and non-invasively for advanced MOSFET device applications.

In this letter, we report on the interfacial abruptness of GaN/AlN/GaN heterostructures with pulsed laser atom probe tomography (APT). The samples were grown by plasma-assisted molecular beam epitaxy (MBE) under both metal-rich and N-rich conditions on both Ga-polar (0001) GaN templates and N-polar (0001¯) GaN substrates. An NH3 assisted MBE technique was involved to grow similar Ga-polar and N-polar structures on GaN:Fe substrates and GaN/Al2O3 templates, respectively, for a comparison study. We find in all cases the interface with net positive polarization charge was chemically abrupt, whereas the interface with net negative polarization charge was diffuse. We discuss the implications on device design and performance. These data validate the efficiency of APT in studying interfaces for better performance in devices.

High electron mobility III-V materials are strong candidates for nMOS transistors at the 11 nm technology node and beyond. Integrating III-V materials with Si (III-V/Si) is an attractive approach because it leverages the current Si-based manufacturing platform. However, the large lattice mismatch between III-V and Si leads to defects in the channel and compromises device performance and reliability. This paper explores two inline X-ray based characterization techniques, high resolution X-ray diffraction (HRXRD) and X-ray diffraction imaging (XRDI), to characterize defects in novel III-V/Si structures. The benefits and limitations of these techniques will be discussed.

Early stage degradation of AlGaN/GaN high electron mobility transistors (HEMTs) with different threading dislocation densities (TDDs) submitted to off-state voltage bias stress was studied. It was found that, for the stress conditions used, HEMTs with TDD ∼1010 cm−2 show pronounced degradation in terms of maximum drain current, gate-lag, and trap generation measured by drain current trapping characteristics, a slight degradation in gate leakage was observed also for HEMTs with TDD of ∼108 cm−2, and no significant degradation for devices with TDD in the ∼107 cm−2 range. The results illustrate the importance of TDD for degradation and reliability of AlGaN/GaN HEMTs.

AlGaN/GaN heterostructures were regrown on three semi-insulating GaN templates with threading dislocation densities of ~2×1010, ~5×108, and ~5×107 cm-2. Regrowths were carried out under Ga-rich conditions by plasma-assisted molecular beam epitaxy to determine the effects of threading dislocation density on leakage through Schottky contacts on the AlGaN/GaN heterostructures. A similar AlGaN/GaN heterostructure was directly grown on 4H-SiC under Ga-rich conditions for comparison with the regrown heterostructures. High electron mobility transistors were fabricated. Decreasing the threading dislocation density from ~2×1010 to ~5×107 cm-2 yielded up to a 45-fold decrease in the average reverse Schottky diode current at -10 V bias.

A report is presented on the X-band power performance of N-face GaN-based metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs). The use of an AlN-based back-barrier enabled low sheet resistance, eliminated alloy disorder scattering to the 2-D electron gas (2DEG), and provided carrier confinement under high electric fields for device scaling. At 10 GHz, a peak power-added efficiency of 56% with a continuous-wave output power density (Pout) of 5.7 W/mm were measured in devices with 0.7 µm gate length and 28 V drain bias. A maximum drain efficiency of 70% and saturated output power density of 6 W/mm were achieved. These results are the first demonstration of dispersion-free large-signal operation in N-face devices beyond the C-band.

High performance AlGaN/GaN high electron mobility transistors grown by plasma-assisted molecular beam epitaxy were fabricated. An integrated slant field-plate was used to suppress the DC-RF dispersion and enhance the breakdown. A recessed-gate structure was adopted to increase the cutoff frequency from 17.5 to 22 GHz. And a CF4-plasma treatment prior to gate metallization was found effective in reducing the gate leakage by one order of magnitude and improving the stability of the RF power operation. Treatment in a mixture of HF and HNO3 acid was essential to ensure the effectiveness of the CF4-plasma treatment. Combination of these technologies yielded state-of-the-art MBE grown AlGaN/GaN HEMTs with stable high-power and high-efficiency operation. At 4-GHz frequency and 48-V bias, a CW power of 12 W/mm with 64% associated efficiency was achieved.

Nonalloyed Ohmic contacts on Ga-face n+-GaN∕AlGaN∕GaN high electron mobility transistor (HEMT) structures typically have significant contact resistance to the two-dimensional electron gas (2DEG) due to the AlGaN barrier. By growing the HEMT structure inverted on the N-face, electrons from the contacts were able to access the 2DEG without going through an AlGaN layer. A low contact resistance of 0.16Ωmm and specific contact resistivity of 5.5×10−7Ωcm2 were achieved without contact annealing on the inverted HEMT structure.