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This article presents a 23.9-29.4 GHz digital LC-phase-locked loop (PLL) architecture with a low phase noise (PN) and power-efficient coupled frequency doubler for 224 Gb/s PAM-4 transmitter clocking. The proposed frequency doubler is designed with two oscillators running at 14 and 28 GHz which are coupled by a transformer. Compared to a conventional frequency doubler or a two-way coupled oscillator, the coupling between the 14 and 28 GHz oscillators provides extra PN reduction as the 14 GHz oscillator can achieve lower PN than the 28 GHz one. In addition, by stacking the two oscillators through the transformer, the current is reused and hence power consumption is reduced. To optimize the PN performance across process, voltage, and temperature (PVT), a compact and power-efficient frequency-tracking loop (FTL) is implemented. The 14 GHz oscillator output is fed to the PLL feedback divider rather than the doubled output, which enables power saving in the prescaler divider in the feedback path. The proposed PLL is fabricated in 10 nm FinFET technology and the PLL achieves a 65 fs random jitter at the transmitter output after a 1st-order 4 MHz-BW CDR filtering which enables the industry's first 224 Gb/s PAM-4 transmitter. Compared with a reference NMOS-GM LC-digitally controlled oscillator (DCO) implemented on the same die, the proposed coupled frequency doubler achieves 4.75 dB lower PN with only a 25% power consumption increase. The LC-PLL consumes 17.1 mW from a 0.8/1.0 V regulated supply and occupies an area of 0.088 mm².

This article proposes the theory and implementation of an even-harmonic class-E CMOS oscillator that displays an excellent phase noise performance. Starting from zero voltage switching (ZVS) and zero derivative switching (ZDS) conditions, expressions for drain voltage and current waveforms are derived. Based on a 1:1 transformer, a custom-designed tank is proposed, which satisfies ZVS and ZDS conditions for the core transistors, provides high-Q resonances at both fundamental and second harmonics of the oscillation frequency, and yields a passive voltage gain from the drain to the gate of the core transistors. Satisfying ZVS and ZDS conditions reduces the overlap between the voltage and current waveforms of the transistor that increases the power efficiency of the oscillator. Furthermore, it widens the flat span of the semi half-sinusoidal voltage waveform, where the impulse sensitivity function (ISF) is negligible. Therefore, the conversion of the core transistor noise to phase noise is reduced. These features improve the oscillator's figure of merit (FoM) in comparison with state-of-the-art CMOS oscillators. The prototype of the even-harmonic class-E oscillator is implemented in a 0.18-μm CMOS technology. At 4 GHz, it exhibits a phase noise of -152.75 dBc/Hz at a 10-MHz offset while providing a 10.6% tuning range. The corresponding FoM is 197.9 dBc/Hz. The circuit draws 7 mA from a 0.7-V supply, and the die area is 0.23 mm².

This paper describes the design, fabrication, and record performance of a new class of ultra-wideband wavelength tuning, ultra-low noise semiconductor laser, the Integrated Coherent Tunable Laser (ICTL). The ICTL device is designed for, and fabricated in, a CMOS foundry based Silicon Photonics platform, utilizing heterogeneous integration of III-V material to create the integrated gain section of the laser - enabling high-volume mass-market manufacturing at low cost and with high reliability. The ICTL incorporates three or more ultra-low loss micro-ring resonators, with large ring size, in a Sagnac loop reflector geometry, creating exceptional laser reflector performance, plus an extended laser cavity length that enables highly-coherent output; ultra-low linewidth and phase noise. This paper describes record integrated laser performance; 118 nm wavelength tuning, covering S-, C- and L-bands, with Lorentzian linewidth

This brief presents a class-C voltage-controlled oscillator (VCO) that ensures a robust start-up with low phase noise and high power efficiency. The proposed start-up scheme, which uses a voltage converter that operates according to the output state, relieves the start-up difficulty by supplying a timevarying bias voltage to the core transistors and allows the VCO to operate in an optimal state. The start-up circuitry is enabled only during initial operation, so power efficiency is improved without phase noise degradation. Furthermore, a capacitor array with a high quality factor is implemented by a direct capacitor connection that exhibits low series resistance. Fabricated with a 65-nm CMOS, the VCO demonstrates a frequency tuning range of 13.1% from 19.3 to 22.0 GHz. The measured minimum phase noise at a 1-MHz offset is --106.33 dBc/Hz at an oscillation frequency of 19.7 GHz, while dissipating 3.8-mW of power from a 1.0-V supply. The VCO occupies an active area of 0.064 mm2. It reveals a figureof-merit and figure-of-merit with area of --186.4 and --198.3 dBc/Hz, respectively.

We investigate on a two-fiber short-reach self-homodyne coherent transmission system without optical amplification, where the same transmission laser is used to generate a modulated signal carrying useful data and a continuous wave signal, which serves as a local oscillator at the receiver side. Target of the work is to determine by experiments and theoretical models under which conditions DFB lasers can be used instead of more expensive ECL lasers. After careful characterization of lasers phase noise in terms of linewidth as a function of the mismatch between the optical paths of the signal and of the local oscillator, the performance of two laser technologies is investigated in the proposed transmission setup, showing that commercial DFB laser can be used, provided that the optical path mismatch between the two fibers is kept below 1.8 meter for 28 GBaud PM-QPSK and 0.8 meter for PM-16QAM modulation format in combination with a soft-decision forward error correction algorithm. After an experimental demonstration, we theoretically investigate the scalability laws of the proposed systems in different configuration flavours.

Analysis and design of a tetrahedral oscillator is presented. Expressions for the startup condition and oscillation frequency are derived. A phase noise analysis of thermal and flicker noise is carried out, using the impulse sensitivity function theory. The noise contribution of each type of transistor is studied, and the dominant and negligible cyclostationary noise sources are identified. There is good agreement among the theory and Spectre simulation. Design guidelines based on the analysis are provided.

A technique to reduce the area of a low-noise sub-sampling PLL (SSPLL) is proposed. The resistor in the loop filter is eliminated. The transconductor driven by the phase detector is switched such that its output consists of a positive and negative pulse with the former wider than the latter. A low frequency zero can thus be realized with a substantially smaller capacitor. Transconductor noise is suppressed to acceptable levels by the high phase-detector gain. In applications that require low out-of-band phase noise, the capacitance can be reduced by 25x or more with typical PLL parameters. A prototype SSPLL from 24.4 GHz-29.2 GHz with a 50 MHz reference clock and bandwidth of 1MHz in 65nm LP CMOS process uses a loop filter capacitance of only 5pF. The conventional topology would require 38pF for the same integrated jitter. The in-band phase noise at 1MHz offset ranges from -90 to -95dBc/Hz, and the out-of-band phase noise at 10 MHz offset ranges from -117 to -121dBc/Hz. The jitter integrated from 10kHz to 50MHz is 330-390fs. It consumes 18.2mW, exhibiting a minimum FoM of 235dB over the frequency range. The SSPLL occupies an area of only 0.14mm².

This paper presents an ultra-lower-power (ULP) digital-to-time-converter (DTC)-assisted fractional-N all-digital phase-locked loop (ADPLL) suitable for IoT applications. A proposed hybrid time-to-digital converter (TDC) extends the vernier-TDC input range with little power overhead in order to overcome the stability issue in the conventional architectures. The hybrid TDC also facilitates a background gain calibration to achieve a stable in-band phase noise insensitive to process, voltage, and temperature (PVT) variations. The implementation of a buffer-cascaded DTC simplifies the design complexity of the fractional-N operation. The ADPLL also features a 200 μW low-phase-noise inverse-class-F (class-F⁻¹) digitally controlled oscillator (DCO) without the need of two-dimensional (2-D) capacitor tuning for frequency alignment of the fundamental and 2nd-harmonic. Fabricated in 65-nm CMOS, the ULP ADPLL prototype achieves 868 fs $ _{rms}$ jitter in a fractional-N channel when consuming only 529 μW, corresponding to a figure-of-merit (FoM) of -244 dB.

Low noise synchronization of the frequency and phase of a DFB fiber laser and two fiber ring cavities was achieved based on a two-channel optical injection lock and phase lock loop. Two-channel modulation signals of different frequencies were adopted to extract the phase noise signals of the two fiber ring cavities. Finally, the lasers from the two fiber ring cavities were coherently combined in the closed loop of the control system owing to the synchronous frequency and phase. The power stability and polarization stability of the combined laser was improved under the optical injection lock and phase lock loop. The phase noise of the two cavities was $6.56 \times 10^{-7}$ rad/Hz1/2 and $1.34 \times 10^{-6}$ rad/Hz1/2 at 10 Hz; and $7.77 \times 10^{-8}$ rad/Hz1/2 and $1.35 \times 10^{-7}$ rad/Hz1/2 at 10 kHz. The total combined power was ~580 mW in the closed loop, and the entire system oscillated under a single frequency, providing excellent power scaling ability.

We directly compare the performance of 1.55 $\mu \text{m}$ Fabry-Perot lasers using quantum well (QW) and quantum dash gain regions. Other than the gain medium the designs were identical, grown in the same growth system, and processed at the same time. The static laser performance (light-current and spectral) were similar for both gain materials but the intensity and phase noise characteristics of the dash based lasers were significantly better. This was attributed to the self mode-locking of the dash lasers that was not observed for the QW lasers. This reduction in noise allowed individual lasing lines from the Fabry-Perot dash lasers to be used for data transmission using high order modulation schemes, with quadrature phase-shift keying (QPSK) demonstrated at a symbol rate of 32GBaud. This performance could not be achieved using the equivalent QW based laser.

An all-digital phase locked loop (ADPLL)-based local oscillator (LO) of RF transceiver application such as radio-frequency identification (RFID) system has gained popularity by accessing the benefits in complementary metal-oxide semiconductor (CMOS) process technology. This paper reviews some state-of-art of the ADPLL structures based on their applications and analyses its major implementation block, which is the digital-controlled oscillator (DCO). The DCO is evaluated based on its CMOS scaling and its performance in ADPLL, such as the power consumption, the chip area, the frequency range, the supply voltage, and the phase noise. Based on the review, the reduction in CMOS scaling decreases the transistor size in ADPLL design which leads to a smaller area and a low power dissipation. The combination of the time-to-digital (TDC) and the digital-to-time converter (DTC) that is used as the phase-frequency detector (PFD) in ADPLL is proposed to reduce the power and phase noise performance due to their high linearity design. The delay cell oscillator is found to consume more power at higher operating frequency, but it has an advantage of having less complexity and consuming less power and area in the circuit compared to the LC tank oscillator. For future work, it is recommended that an ADPLL-based LO of RFID transceiver with lowest voltage supply implementation is chosen and the use of the TDC-less as the PFD is selected due to its small area. While for the DCO, the delay cell will be designed due to its simpler implementation and occupy small area.

Though Current Mode Logic has excellent features like higher switching speed and reduced crosstalk due to small output swing, there exists numerous flaws such as static power dissipation, non-suitable for power-down modes and comparably higher design complexity of load resistors. To address the aforementioned worries, this article incorporates a dynamic current mode design approach having active load and controlled current source to configure an improved (2/3) dual modulus prescaler. Simulation results of the proposed circuit using Cadence Virtuoso platform for 90 nm CMOS at 1.2 V supply depict a power consumption of 2.517 mW when driven by a high frequency of 2 GHz. The phase noise and output noise are found to be − 147.001 dBc/Hz and − 181.7 dB at 1 MHz offset while it reads a self-oscillation frequency of 5 GHz. The variation tolerance of the design is proved via 5% skew-based simulation at all corners; whereas the correct functionality at 28 nm UMC justifies its scalability.

Fractional and reference spurs appear at the output of a fractional PLL along with the carrier. In the proposed architecture, two PLLs are conjunctly implemented for spur reduction—one fractional and other integer—with their control voltages summed together for dual control. A very low value (1/100) of the fractional frequency division ratio is considered. A fractional sampler is introduced that places bandstop notches at very low frequencies and hence, loop bandwidth of the fractional PLL has to be lower than the first spur frequency. To alleviate the issue of high area requirement by the second-order loop filter capacitors in the fractional PLL, the charge pump is divided into two parts with high and low values of pump currents. The charge pump with the low pump current drives the loop filter network segment with the resistor; thus, the area of the capacitor in this network can be reduced. By simulation in 180 nm CMOS technology, it is observed that the largest fractional spurs are reduced from $$+19.2$$ to $$-66.2$$ dBc, and the reference spurs from $$-28.5$$ to $$-67.8$$ dBc. Monte Carlo simulations show best and worst case spurs at $$-73$$ and $$-69$$ dBc, respectively. The architecture shows the phase noise characteristics of the integer PLL when identical oscillators are used in both the loops.

A 12-GHz transformer feedback Class-F2,3 voltage-controlled oscillator (VCO) using noise circulating is proposed in this letter. Transformer feedback is utilized in the proposed VCO to achieve Class-F2,3 resonant impedance control at the VCO output and tail current transistor input. Also, the noise contribution of the tail current transistor is further reduced by partially circulating its noise into itself. The proposed VCO is fabricated in 40-nm CMOS process with 0.04-mm2 core area. Experimental results show that the frequency tuning range of the VCO is 11.74–12.63 GHz. The VCO achieves phase noise of −120.2 dBc/Hz at 1-MHz offset frequency at 12 GHz with figure of merit (FoM) of 190.5 dBc/Hz and FoM $_{T}$ of 187.8 dBc/Hz, and consumes 13.23 mW from a 1.1-V supply.

The trend toward a higher degree of automation in modern cars demands radar sensors providing a significantly increased angular resolution. This is achieved by increasing the number of transmit and receive channels, which is most commonly done by cascading several radar monolithic microwave integrated circuits (MMICs). As for single MMIC radar solutions, the phase noise (PN) contained in the transmit signal is one of the most dominant signal distortions limiting detection sensitivity and range also in cascaded radar systems. In this work, we present a novel method to estimate the mean PN power spectral density (PSD) of two radar MMICs in operation. This estimation result is used to detect whether the frequency-generating circuit of the involved MMICs generate PN out of specification. Different to most of the existing methods, the proposed approach is based on an application relevant frequency modulated continuous wave (FMCW) signal, which is actually used to perform a radar measurement, instead of a continuous wave (CW) signal. Finally, the presented concept is verified based on simulations and with the help of measurement data.

This article presents a fully integrated terahertz (THz) comb/pulse radiator and a broadband frequency-comb heterodyne receiver for sensing and imaging applications. The chipset is fabricated in the GlobalFoundries 90-nm SiGe BiCMOS process. The comb radiator utilizes p-i-n diode sharp reverse recovery to generate THz frequency comb/pulses. The repetition rate of the radiated pulses is locked to a stable off-chip source, which can be adjusted to as high as 15 GHz. By using a low-phase noise off-chip source rather than an on-chip oscillator, low phase noise and high-frequency stability are achieved. The phase noise of 405-GHz tone is −82 dBc at a 10-kHz offset frequency. The radiated tones are characterized from 220 GHz up to 1.1 THz using VDI SAX modules with the measured EIRP of −11, −15, and −36 dBm at 405, 500, and 750 GHz, respectively. In addition, a THz frequency comb detector using a Schottky barrier diode passive mixer is presented. The detector uses a broadband comb as LO for heterodyne detection of any arbitrary spectrum in mm-wave/THz band by adjusting the spacing of the LO comb from 100 s of MHz up to 15 GHz with a resolution of 2 Hz. The receiver chip is characterized from 220 up to 500 GHz with the measured NF of 24.5, 36, and 44 dB at 270, 405, and 495 GHz, respectively. Moreover, a dual-comb technique using the radiator and receiver chips is demonstrated, promising a compact low-cost solution for dual-comb sensing applications. The radiator and receiver chips consume a dc power of 40 and 38 mW, respectively.

A 670-GHz terahertz source array is implemented in 40-nm bulk CMOS technology. To increase the frequency and power of the source, a compact and 1-D scalable oscillator–radiator topology that works on the third harmonic is proposed. In order to avoid the gate transistor node from loading the tank at the output frequency, a filtering feedback network is used to feed through the fundamental signal while filtering the third harmonic. The source consists of $4\times 2$ oscillator cells with different common- and differential-mode coupling mechanisms that are built into the slotline resonant tanks. These slotlines build up an $E$ -field pattern that radiates the signal to the far-field. The chip is assembled on a hyperhemispherical lens that suppresses substrate modes and further increases the directivity of the source. The full array and pads have a die size of $0.75\times 1$ .15 mm2. The source can be tuned in the range of 660.8–676.6 GHz. It has a maximum measured EIRP of 7.4 dBm and −16.1 dBm radiated output power while consuming only 99.7 mW. The source also has a measured phase noise at 1- and 10-MHz offsets of −69 and −93 dBc/Hz, respectively.

Phase noise, lock range, lock time, and power consumption are becoming the dominant performance parameters in a charge pump phase locked loop (CP-PLL) especially at high frequencies. Though the PLL is having several blocks, the voltage-controlled oscillator (VCO) is the most impactful block considering the above parameters. Hence, it has been a call for better designing using the MOSFETs of a VCO circuit for an efficient PLL for several decades. In this work a VCO circuit is designed which uses the sleepy stack transistors to reduce the leakage current and later the new VCO is incorporated the PLL. With a wide lock range, this novel PLL architecture promises to offer better phase noise lock time and power consumption. This is possible due to the low leakage current that is produced by the stack transistors in the VCO. To support the above claims, the PLL using current starved stack VCO is designed and simulated in 90 nm CMOS technology. The simulation results shows that the VCO exhibits a phase noise of −78.28 dBc/Hz @1 MHz offset frequency while the PLL incorporating the same VCO has a lock range of 1.3GHz–1.5GHz. The power dissipation of the PLL is 46.05 μW, and the figure of merit (FOM) of the PLL is calculated to be −91.75 dBc/Hz.

Recent studies have shown that the self-coherent systems, including the bi-directional, the Stokes-vector-modulation direct-detection (SVM-DD), and the Kramers-Kronig (KK) schemes, have the potential to reduce the cost of short-reach networks. One of the most attractive features of the self-coherent systems is that they may eliminate the necessity of a narrow-linewidth laser, which is mandatory in the conventional full coherent systems employing high-order quadrature-amplitude-modulation (QAM) formats. On the other hand, it is also recognized that the laser phase noise may have a significant impact on the system performance if there exists a large length mismatch between the signal and the CW tone in the transmission paths. In this paper, we analyze the impact of laser phase noise on the self-coherent systems numerically and experimentally by considering the bi-directional system as an example case. As a result, we show that the performance of the self-coherent system can be described efficiently by using a limited number of normalized parameters. We then reveal the existence of a distinctive threshold on the path length mismatch that influences the bit-error-rate (BER) performance; the penalty increases in a stepwise manner as the length mismatch exceeds the threshold and converges to a constant value. Based on the results, we suggest the feasibility of employing high-order QAM formats to transmit >800 Gb/s signals per polarization using a 10-MHz-linewidth laser. Finally, proof-of-concept experimental results are presented to verify the theoretical and numerical analyses.

A tunable dual-wavelength Brillouin-bismuth fiber laser with a triple-Brillouin frequency spacing of ∼37.8 GHz was demonstrated by employing modular structures. The modular designs can be divided into two main cavities, whereby cavity 1 consisted of a 2-km single-mode fiber (SMF) and a loop mirror that was able to generate a single-spaced Brillouin shift, while cavity 2 comprised of 10-km dispersion compensating fiber (DCF) that was able to produce a double-spaced Brillouin shift. Based on this design, a stable dual-wavelength lasing was established with a low peak power fluctuation of 0.13 dB and 0.6 dB for the Brillouin pump (BP) and third Brillouin Stokes line (BS3), respectively. By varying the center wavelength of the Brillouin pump, the dual-wavelength laser can be tuned across a 40 nm span, ranging from 1300 nm to 1340 nm. The frequency spacing of the Brillouin-bismuth fiber laser can also be easily switched between ∼12.6 GHz, ∼25.2 GHz, and ∼37.8 GHz by utilizing these modular structures. The proposed dual-wavelength laser has a promising potential for application as a low phase noise source for microwave generation.

In this study, we demonstrate laser phase noise measurement with a 0.8-s period and an 800-ps temporal resolution. An optical carrier is received by heterodyne detection, and the detected electrical signals are acquired using field programmable gate array circuits with 1.25-GSample/s analog-to-digital converters and 1-GByte memory. The laser phase noise is visualized using a field spectrogram and a very wide FM noise spectrum from near the DC, which is constructed using our proposed phase-compensating interleaved fast Fourier transformation. We compare the phase noise characteristics of an external cavity laser with those of a distributed feedback semiconductor laser.

This letter presents a voltage-controlled oscillator (VCO) with an extra cross-coupling path realized by a novel transformer-based resonator. The extra cross-coupling can enhance the negative $G_{m}$ and loop gain of the cross-coupled pair. The triode time of the active device during the oscillation will be reduced, resulting in better phase noise (PN) and shorter startup time than the conventional $LC$ -VCO. Fabricated in a CMOS 65-nm process, the proposed VCO consumes 0.9 mW average dc power under a voltage supply of 0.38 V. The 1-MHz offset PN can reach −107.15 dBc/Hz at 8.38 GHz, and the corresponding figure of merit (FoM) is −186.75 dBc/Hz. The VCO’s bandwidth is 34.1% ranging from 6.26 to 8.84 GHz, which corresponds an FoMT of −197.41 dBc/Hz. Thanks to the compact layout of the transformer, the VCO occupies only 0.055 mm2 core area, resulting in a −199.35 dBc/Hz FoMA.

Two RF CMOS voltage-controlled oscillators (VCOs) with source damping resistors to suppress 1/ ${f}$ noise up-conversion are presented in this letter. Two important parameters: the phase deviation from the first harmonic term of the ideal impulse sensitivity function (ISF), and the initial phase of the first harmonic term of channel current, dominate the 1/ ${f}$ noise up-conversion. Based on the outcome, the effects of the source damping resistors on the two phases are analyzed and two VCO prototypes are designed. Implemented in Taiwan Semiconductor Manufacturing Company 180 nm RF CMOS process, the VCOs achieve 64.7% and 50% frequency tuning range at 2.3–4.5 and 3–5 GHz, respectively, and perform phase noise (PN) of −131.03, −129.28, and −124.98 dBc/Hz at 1 MHz offset from output frequencies of 2.33, 3.057, and 4.57 GHz separately.

Phase noise of PLLs is one of the critical issues in high-performance transceivers. Especially, in-band noise is troublesome because the phase noise inside a loop bandwidth is hard to be filtered out due to low-pass characteristic of most PLL components. The in-band noise of PLLs is mainly caused by charge-pumps (CPs), so that large-size transistors are used to improve in-band noise of CPs. Due to this trade-off between inband noise and occupied area, a large area is needed for CPs in high-performance transceivers. In this paper, we propose a noise-canceling CP to improve in-band noise. The prototype of the proposed CP embedded in a 28-GHz LC-PLL was fabricated using 16nm FinFET process and 1.2-dB improvement of single sideband (SSB) integrated phase noise is achieved. As the results of in-band noise improvement, occupied area for the CP can be reduced to 22%.

This work presents a very compact self-biasing dynamic startup circuit for class-C voltage-controlled oscillators (VCOs). Using a referenceless nonlinear inverting stage, the solution has been implemented in a 28-nm CMOS technology 14-GHz oscillator, leading to a VCO startup time better than 20 ns, at par with the fastest startup circuits in literature, with an extremely compact area of 0.003 mm2.

The comparison of optical oscillators is used both to determine their spectral characteristics and to perform fundamental research. To describe each individual laser system, it is necessary to compare at least three independent laser oscillators. Three ultrastable lasers with wavelengths of 1140, 1550, and 871 nm located in different laboratories at the Lebedev Physical Institute have been compared. A femtosecond frequency comb has been used to transfer stability between different spectral ranges. A fractional frequency instability has been obtained with the three-cornered hat method and phase noise of each laser has been analyzed. Using this method, it has been shown that the characteristics of the laser system at a wavelength of 871 nm are appropriate to control the quantum state of an optical qubit on a quadrupole transition in an ytterbium ion with a n-atural width of 3.1 Hz.

An ultrawideband millimeter-wave (mm-Wave) and subterahertz (sub-THz) signal generator is proposed leveraging a varactor-less quad-band voltage-controlled oscillator (QB-VCO), a dual-mode injection-locked frequency divider (DM-ILFD), a power-efficient injection-locked oscillator (ILO) as a driver, and self-mixing-based frequency multipliers for frequency extension. A switched-quadruple-coil transformer is proposed to vary the inductances of the resonant coils in the transformer tank to improve the frequency tuning range of the varactor-less QB-VCO. Besides, a locking-range-enhancement technique is proposed for the DM-ILFD. Implemented in a 65-nm CMOS process, the proposed mm-Wave and sub-THz signal generator achieves a record frequency tuning range from 58.8 to 275.6 GHz with 10-MHz offset phase noise from −115.8 to −89.2 dBc/Hz, while consuming 54 mW and occupying a core area of 0.65 mm2, corresponding to a FoM $_{T}$ of −190.4 dBc/Hz.

A photonic approach to generating an optoelectronic oscillator (OEO) based on an integrated mutually coupled (IMC) distributed feedback (DFB) laser is reported. Compared with the traditional construction of an OEO, the IMC-DFB has functions of the laser source, intensity modulator, and microwave photonic filters (MPFs), which could simplify the OEO scheme. An optical feedback loop (O-Loop) and an optoelectronic feedback loop (OE-Loop) are used simultaneously in the proposed scheme. The optical loop was used to reduce the optical linewidth of the IMC-DFB to improve the quality of the laser source in the OE loop. The IMC laser consisted of two distributed feedback (DFB) laser sections with a semiconductor optical amplifier (SOA) section in between. The optical linewidth of the IMC-DFB is reduced from 5.86 MHz to 3.94 kHz due to the feedback of the optical loop. By tuning the current of the SOA and DFB sections, tunable microwaves ranging from 24.9 to 46.5 GHz with single-sideband (SSB) phase noise below −110 dBc/Hz at a 10 kHz offset from the carrier were realized.

A new technique to measure phase noise properties of highly coherent lasers based on delayed self-heterodyne interferometer (DSHI) is suggested where the Allan variance of the beat note frequency is obtained via digital signal processing and then used to determine laser linewidth and phase noise properties. This method is capable of determining both white frequency noise and flicker-noise contributions and has been used to characterize various types of lasers. A simple numerical model generalizing previous analytical results has been developed and verified. The corresponding requirements imposed on the DSHI optical delay are consistent with numerical modeling results. The measurement results are in agreement with our previous experiments based on direct heterodyning of the same lasers. The technique is particularly suitable for real-time monitoring of the laser phase noise over long periods of time, which is useful for testing and engineering of highly coherent lasers.

This work presents the design of a 24-GHz digitally controlled oscillator (DCO) in an advanced 28-nm bulk CMOS technology for short-range frequency-modulated continuous-wave radar system-on-chip for mobile and Internet-of-Things devices. The power minimization is therefore the primary focus. The oscillator consumes a record low power of 1.2 mW at a 0.65-V supply voltage. It achieves a very large frequency tuning range (TR) of 5.8 GHz (27%) and a 150 kHz resolution without significantly degrading the phase noise (PN). The proposed design methodology results in a state-of-the-art -193 dBc/Hz FoM(T).

A system phase noise model is proposed in this paper for frequency-modulated (FM) gyroscopes, which gives us a clearly guidance for different noise and how to improve the final performance. The author here introduces a mathematical calculation method to deal with the time domain noise and transforms the time-varying noise into phase modulation paths to analyze the frequency noise effect. Meanwhile, the proposed model reveals the relationships about mechanical vibration noise mechanical additional loop noise and performance indicators. In this way, combing frequency spectrum and Allan variance curves, the weight of each noise can be determined. Here, we get different physical noise sources from actual circuit chip by the proposed phase noise decomposition method and analyze the whole noise contribution. After that, we can clearly understand the performance indicators required to design the circuit. Finally, this work offers a whole theory instructions to quantitate different frequency noise for FM gyroscopes.

This brief presents a bidirectional nonlinearly coupled quadrature voltage-controlled oscillator (BNC-QVCO) incorporating passive phase interpolation for the generation of multiphase signals. In addition, to generate multiphase signals, the proposed bidirectional nonlinearly coupling network improves the phase noise performance of the QVCO by producing approximate-in-phase injection-coupling currents into the LC tank. Moreover, to balance the amplitude of eight-phase signals, an additional passive amplitude division circuit is implemented with capacitor banks for calibration. For verification, a BNC-QVCO incorporating passive phase interpolation is implemented in a 40-nm CMOS technology with a core area of 0.13 mm2. The measured multiphase signals achieve a phase noise of −116.57 dBc/Hz at 1-MHz offset from 4.32 GHz. The power consumption without buffers is 10.2 mW under 1-V supply voltage and a 20% frequency tuning range from 4 to 4.8 GHz is achieved with the implemented digitally controlled capacitor banks.

A high-power subterahertz (THz) push–push oscillator topology is proposed. Adopting Hartley oscillator topology with transformer as its resonator, the proposed oscillator reduces the effective parasitic capacitance of transistors; therefore, a larger size transistor can be adopted, which increases the output power while still maintaining the same oscillation frequency. The adoption of the transformer also improves the LC resonator’s $Q$ -factor, further improving the output power and dc-to-RF efficiency. Implemented in 65-nm CMOS technology, the measured output power of the proposed single oscillator is 2.3 dBm at 264 GHz with 2.76% dc-to-RF efficiency and −96.8 dBc/Hz of the phase noise at a 10-MHz offset.

Microwave photonics offers transformative capabilities for ultra-wideband electronic signal processing and frequency synthesis with record-low phase noise levels. Despite the intrinsic bandwidth of optical systems operating at ~200 THz carrier frequencies, many schemes for high-performance photonics-based microwave generation lack broadband tunability, and experience tradeoffs between noise level, complexity, and frequency. An alternative approach uses direct frequency down-mixing of two tunable semiconductor lasers on a fast photodiode. This form of optical heterodyning is frequency-agile, but experimental realizations have been hindered by the relatively high noise of free-running lasers. Here, we demonstrate a heterodyne synthesizer based on ultralow-noise self-injection-locked lasers, enabling highly-coherent, photonics-based microwave and millimeter-wave generation. Continuously-tunable operation is realized from 1-104 GHz, with constant phase noise of -109 dBc/Hz at 100 kHz offset from carrier. To explore its practical utility, we leverage this photonic source as the local oscillator within a 95-GHz frequency-modulated continuous wave (FMCW) radar. Through field testing, we observe dramatic reduction in phase-noise-related Doppler and ranging artifacts as compared to the radar’s existing electronic synthesizer. These results establish strong potential for coherent heterodyne millimeter-wave generation, opening the door to a variety of future applications including high-dynamic range remote sensing, wideband wireless communications, and THz spectroscopy., Photonics-based radars offer intriguing potential but face tradeoffs in tunability, complexity, and noise. Here the authors present microwave generation in a photonics platform by heterodyning of two low-noise, self-injection-locked lasers, and demonstrate its advantages in an FMCW radar system.

A new sub-1V and low power multiphase voltage-controlled oscillator (QVCO) with current-reused structure is proposed. The proposed core oscillator consists of two N-metal oxide semiconductor (NMOS) and P-metal oxide semiconductor (PMOS) transistors and an additional NMOS-only cross-coupled pair that enhances the effective negative transconductance and facilities the start-up condition at sub-1V supply voltages in modern nm CMOS technologies. In the proposed coupling scheme, the gate of cross-coupled transistors is used for coupling in an ‘in-phase−anti-phase’ manner. Parallel capacitors to the drain-source of transistors have been used for further enhancement of effective transconductance and thus lower power consumption; though the increase of parallel capacitors reduces the tuning range, indicating a trade-off in the proposed QVCO. The proposed quadrature oscillator is designed and simulated in a standard 0.18 μm RF-CMOS technology. The results of the simulation show that the QVCO has a 9% tuning range from 5.35 GHz to 5.88 GHz, and the phase noise is −119.6 dBc/Hz at 1-MHz offset from the 5.7 GHz carrier while consumes only 1.4 mW from a 0.85-V supply voltage; yielding an excellent figure-of-merit (FOM) of −193.3 dBc that is amongst the best FOMs. Several Monte Carlo and PVT analyses verify the robust performance of the QVCO.

We report on the design, growth, and fabrication of InAs/InP quantum dash (QD) gain materials and their use in lasers for optical network applications. A noise performance comparison between QD and quantum well (QW) Fabry–Perot (F-P) lasers has been made. By using the QD gain material we have successfully developed and assembled C-band coherent comb laser (CCL) modules with an electrical fast feedback loop control system to ensure a targeted mode frequency spacing. The frequency spacing was maintained within ±100 ppm and the operation wavelengths locked on the desired ITU grid within 0.01 nm over a period of several months. We also investigated a 25-GHz C-band QD CCL with an external cavity self-injection feedback locking (SIFL) system to reduce the optical linewidth of each individual channel to below 200 kHz in the wavelength range from 1537.55 nm to 1545.14 nm. The RF mode beating signal 3-dB bandwidth was also reduced from 9 kHz to approximately 500 Hz with this SIFL system. These QD CCLs with ultra-low relative intensity noise (RIN), ultra-narrow optical linewidth, and ultra-low timing jitter are excellent laser sources for multi-terabit optical networks. Using a 34.2 GHz QD CCL we demonstrate 10.8 Tbit/s (16QAM 48 × 28 GBaud PDM) coherent data transmission over 100 km of standard single mode fiber (SSMF) and 5.4 Tbit/s (PAM-4 48 × 28 GBaud PDM) aggregate data transmission capacity over 25 km of SSMF with error-free operation.

Microwave photonics is a field that studies the interaction between microwave and optical waves for the generation, transmission, processing, and measurements of microwave signals by means of photonics, to take advantage of the high speed and broad bandwidth offered by modern photonics. Microwave photonic sensors are one of the active sub-fields that uses microwave photonic techniques to achieve high-speed and high-resolution measurements. In this article, microwave photonic techniques for optical sensing demonstrated in the past few years will be reviewed including high-speed and high-resolution sensing based on heterodyne beating of two optical wavelengths, the use of an optoelectronic oscillator to translate the optical wavelength shift to a microwave frequency change, and the use of wavelength-to-time mapping to translate the sensing information from the optical wavelength domain to the microwave frequency domain, to increase the interrogation speed and resolution. The use of photonic integrated circuits to achieve high-speed and high-resolution microwave photonic sensing will also be discussed.

Fiber-optic distributed acoustic sensor (DAS) is one of the most attractive and promising fiber-optic sensing technologies in the recent decade. It can simultaneously detect and retrieve multiple vibrations over a long distance, and the high sampling rate provides abundant information of the environment. This article reviews the principles involved in DAS system, including three types of reflectometry to locate the Rayleigh backscattering (RBS) along the fiber, and the methods to recover the vibration waveform by the phase or spectrum of RBS. The technologies and recent progresses on DAS systems are introduced, and two kinds of typical applications of DAS are reviewed. Finally, the possible research trends are discussed.

Regular perturbation is applied to the Manakov equation and motivates a generalized correlated phase-and-additive noise model for wavelength-division multiplexing over dual-polarization optical fiber channels. The model includes three hidden Gauss-Markov processes: phase noise, polarization rotation, and additive noise. Particle filtering is used to compute lower bounds on the capacity of multi-carrier communication with frequency-dependent powers and delays. A gain of 0.17 bits/s/Hz/pol in spectral efficiency or 0.8 dB in power efficiency is achieved with respect to existing models at their peak data rate. Frequency-dependent delays also increase the spectral efficiency of single-polarization channels., Comment: Published in JLT (http://dx.doi.org/10.1109/JLT.2021.3069686)

In the paper, various noise sources in delay-line optoelectronic oscillators (OEOs) with all-optical gain are analyzed. It is shown that mutual conversion of amplitude and phase noises occurs in OEO due to its non-linear time-variant dynamics. The correlation between amplitude and phase fluctuations influences the noise power spectrum density of the OEO output signal. Methods for reducing the amplitude and phase noise mutual conversion in OEOs and consequential phase noise performance improving are proposed.

Sensitivity and performance of homodyne radar are notably improved if the phase noise terms of transmit and receive signals are correlated and canceled out by the receiver. However, in a bistatic setup with separate oscillators, this correlation is inherently not given. To achieve a good carrier phase and phase noise coherency, it is required to transmit a radio frequency (RF) reference, e.g., by using high-quality RF cables, optical fibers, or wireless point-to-point links. All these options are complex, costly, and prone to distortions and signal delay variations. Sharing a clock signal is also barely helpful since even small distortions of this reference are converted to notable uncorrelated phase noise in the radar signal synthesizers. In this article, a novel full-duplex system concept and signal processing scheme is presented that solves the above-mentioned problems completely. This concept allows for coherent measurements within a bistatic radar setup, even if the two radar stations are only loosely coupled employing a simple clock-rate adjustment. By theory and experimental results with bistatic frequency-modulated continuous-wave radar, it is shown that our concept allows for bistatic measurements with the same sensitivity and performance that is usually only known from homodyne radar systems. To the authors’ best knowledge, this is the first time that phase noise coherent measurements in a bistatic multiple-input multiple-output radar setup are shown. This concept paves the way for advanced netted radar setups, e.g., in automotive radar and applications with large apertures or baselines or multiperspective coherent tomographic measurements.

High-fidelity photodetection enables the transfer of the low noise inherent to optical oscillators to the microwave domain. However, when photodetecting optical signals of the highest timing stability, photodiode flicker (1/f) noise can dominate the resulting timing jitter at timescales longer than ∼1 ms. With the goal of improving femtosecond-level timing fidelity when transferring from the optical to microwave domain, we vary the duty cycle of a train of optical pulses and show that the photodetector flicker phase noise on a photonically generated 1 GHz microwave signal can be reduced by ∼10 dB under ultrashort pulse illumination, reaching as low as −140/f dBc/Hz. In addition, a strong correlation between amplitude and phase flicker noise is found, implying a single baseband noise source can modulate both quadratures of the microwave carrier. These findings expand the limits of the ultimate timing stability that can be transferred from optics to electronics.

A rotary traveling-wave oscillator (RTWO) has an ability to generate multiple phases at millimeter-wave (mmW) frequencies while achieving low phase noise (PN). Unfortunately, due to the practically unavoidable transmission line (TL) dispersion, which causes the higher-order harmonics to travel faster than the fundamental, RTWOs suffer from flicker noise upconversion. In this article, we propose a “distributed stubs” technique to mitigate this mechanism in which tuning capacitors placed on the TL stubs away from the maintaining amplifiers will slow down the travel speed of higher-order harmonics relative to the fundamental, thus lowering the phase shifts due to the TL dispersion. We further provide a comprehensive analysis of the flicker noise upconversion mechanism due to the TL dispersion. The proposed 26.2–30-GHz RTWO is implemented in 22-nm fully depleted silicon-on-insulator (FD-SOI) CMOS with eight differential phases. At 30 GHz, it achieves PN of −107.6 and −128.9 dBc/Hz at 1- and 10-MHz offsets, respectively. This translates into figures-of-merit (FoMs) of 184.2 and 185.4 dB, respectively, for a single phase. The proposed architecture consumes 20 mW from 0.8-V supply. It achieves a flicker PN corner of 180 kHz, which is an order-of-magnitude better than currently achievable by state-of-the-art mmW RTWOs.

Polarization variations in optical fibers are complex and would severely affect the performances of polarization-sensitive signal distribution systems. Owing to advances in experimental techniques and theoretical tools, we observe the effect of polarization variations in the optical fibers and we demonstrate that polarization mode dispersion (PMD) dominates the free-running fiber noise. Ultrahigh correlation, over 99%, is found between the phase fluctuation induced by polarization variation and the temperature fluctuation impacted on the optical fibers. By means of a polarization scrambling technique, the polarization variations in the optical fiber are averaged and the phase perturbations are minimized. It provides a promising solution for suppressing the random disturbances of polarization in the fiber-based optical frequency transfer system and quantum key distribution (QKD) system.

The advantages of optical fiber as a transmission medium for microwave signals have led to an increasing interest in the implementation of RF/photonic links in radar frontends. Such applications often require a large dynamic range that is beyond the reach of conventional intensity modulation-direct detection (IM-DD) fiber-optic links. For a solution, a coherent fiber-optic link employing an optical phase-locked loop (OPLL) demodulation has been proposed promising enhanced spurious-free dynamic range (SFDR) performance. Under the ideal condition, the link should be shot-noise limited. However, the phase modulated (PM) link was shown to be penalized by the presence of other noise sources and environmental perturbations. In this work, we present a detailed analysis of the phase modulated link's different noise sources, their impact to dynamic range performance, and ways of mitigation.

This letter proposes a low-phase-noise high-efficiency power oscillator with digitally controlled output power and frequency. The transformer-based matching network resonator is implemented to balance the quality factor and matching efficiency. The active core and the transformer are jointly optimized to achieve the required output power while achieving the low phase noise and high power efficiency. Besides, the digitally controlled cross-coupled pair array is utilized to tune the output power. To verify the mechanism mentioned above, the power oscillator is fabricated using conventional 40-nm CMOS technology with an active area of 0.19 mm2. The proposed power oscillator exhibits a 21.7% tuning range from 2.30 to 2.86 GHz. The maximum output power is 4.5 dBm with a peak system efficiency of 25.1%. Meanwhile, the measured phase noise at a 3-MHz offset is −140.36 dBc/Hz at 2.79 GHz. The corresponding figure of merit (FoM) is 189.2 dBc/Hz, and FoMT is 196 dBc/Hz.

To satisfy the requirements for multi-standard frequency generation, mode-switching oscillators are developed to increase the frequency tuning range without incurring considerable phase noise penalty. However, this improvement in the tuning range is often limited by the parasitics of the circuitry for mode selection and tuning. To address this challenge, this work presents a dual-core octave-tuning VCO using a switch-less tertiary magnetic coupling loop. The design employs the benefits of transformer-switching without incurring switch loss and quality factor degradation and also the benefits of mode switching without the parasitics from the mode selection and tuning network. The VCO employs a non-constant $RC$ scaling for the capacitors’ bank, across the tuning bits, and positive feedback dc-coupled inductive-degenerated output buffer to maximize the tuning range. Implemented in 22 nm fully depleted silicon-on-insulator (FDSOI), the dual-core VCO achieves a 72% tuning at 8–17 GHz and a figure-of-merit-tuning ( $\text {FoM}_{T}$ ) of 208.8 dBc/Hz at 11 GHz. The chip operates from a 0.45 V supply with a power consumption of 17–33 mW and a core area of 0.39 mm2. To the best of our knowledge, the VCO achieves the highest $\text {FoM}_{T}$ and lowest supply for designs over 10 GHz.

An automotive 77-GHz long-range radar (LRR) with an 8-channel receiver (RX) and a 3-channel transmitter (TX) in 40-nm CMOS technology is presented. It integrates a 38.5-GHz phase-locked loop (PLL), a transmitter power detector (DET) and power calibration loop, a crystal oscillator (XO), built-in-self-test (BIST) circuits, an SRAM, an eFuse, a temperature compensation calibration loop with a lookup table (LUT) and a temperature sensor, a serial peripheral interface (SPI), and a multiple-input multiple-output (MIMO) control logic. The receiver shows a noise figure (NF) of 8.7 dB and input-referred 1-dB compression point (IP1-dB) of −7.4 dBm. The NF and IP1-dB under the worst conditions are 14 dB and −10 dBm, respectively. The transmitter shows output power of 14.1 dBm and phase noise of −116 dBc/Hz at a 12.5-MHz offset frequency, which corresponds to the frequency of 250-m objects for the fast-chirp frequency-modulated continuous wave (FMCW) radar. The proposed radar module utilizes two transmitter channels for horizontal detection. A 2 $\times $ 8 time-division-multiplexing MIMO (TDM-MIMO) technique provides a detection range of 250 m.