Search

Thermal test structures and ring oscillators (ROs) are fabricated in 0.18-μm three-dimensional (3-D)—SOI technology. Measurements and electrothermal simulations show that thermal and parasitic effects due to 3-D packaging have a significant impact on circuit performance. A physical thermal model is parameterized to provide better prediction of circuit performance in 3-D technologies. Electrothermal simulations using the thermal model show good agreement with measurement data; the model is applicable for different circuits designed in the 3-D—SOI technology. By studying the phase noise of ROs, the device noise properties of 3-D—SOI technology are also characterized and compared with conventional bulk CMOS technology. [ABSTRACT FROM AUTHOR]

The performance of monolithically integrated metal-semiconductor-metal/high electron-mobility transistor (MSM/HEMT) and p-i-n/HEMT photoreceivers is reported. p-i-n/HEMT photoreceivers have been designed and fabricated, resulting in measured transimpedances of 700 Ω, an 8.3-GHz bandwidth, and measured sensitivities of -17.7 dBm at 10 Gb/s and -15.8 dBm at 12 Gb/s for a 231 - 1 pattern length pseudorandom bit sequence at a bit error rate of 10-9. Low-noise MSM-based pbotoreceivers have also been designed and fabricated, and frequency response, noise, and sensitivity measurements have been performed. Sensitivities of -16.9, -13.1, and -10.7 dBm were obtained at 5, 8, and 10 Gb/s, respectively. A direct comparison of p-i-n- and MSM-based photoreceivers is undertaken on photoreceivers with matched responsivity and bandwidth. Measurement and theoretical analysis of circuit and device noise indicates an anomalous sensitivity penalty in MSM-based receivers that arises due to intersymbol interference [ABSTRACT FROM PUBLISHER]