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Only a handful of devices are available to serve the limited U.S. North American Presentation Level Protocol Syntax (NAPLPS) market. The standard provides efficient coding for communications and storage of graphics data. Among the first chips was the Rockwell Model R6549 color video display generator. Demand for videotex has produced faster chips with higher resolution. Communications support for NAPLPS is provided by the Advanced Micro Devices Am7911 modem integrated circuit. While the NAPLPS standard provides better communications and some chip sets are available, manufacturers are hesitant to develop videotex chips.

A programmable logic device (PLD) is nearly ideal for implementing secret-code or access-key protection schemes. PLDs are compact, inexpensive, and furnish a high level of security. The design included uses an AmPAL22V10 PAL device. The secret code programmed in the PAL can be accessed only by using the correct sequence of input variables and internal states. A block diagram illustrates the PAL device. A logic diagram for an AmPAL22V10 device is also included.

A superset of the industry standard 74138-139, the HPL-82C339 CMOS programmable chip-select decoder is suitable for both memory and I-O chip select applications. The I-O device features 50 nanosecond maximum propagation delay and 35 nanosecond access time. Its address inputs are field programmable for either high or low true address decoding. The device can be optimized for either eight or sixteen bit microprocessors. The HPL-82C339 is priced from $11.85 to $43.27 depending on grade. A block diagram of the decoder is included.

A RAM based EPROM simulator that allows a microprocessor such as the 8085 to switch between memory banks uses a flip-flop and an octal buffer. The circuit can switch between two memory banks, each consisting of both ROM and RAM addresses. A circuit diagram of the simulator is included.

High- and low-order address decoding are combined in the Plessey Semiconductors 74HCT515 addressable decoder-demultiplexer. The high-speed, TTL-compatible CMOS chip can replace separate PLA and decoder devices. The circuit is illustrated by a diagram, and the enable truth table is provided. It is priced at one British pound sterling when ordered in quantities of 1,000.

By packing 8K bytes of ROM onto a single chip, the first step in putting an operating system on a chip has been taken. The S83 from American Microsystems Inc. is just such a device, and was built using 3 micrometer technology and a clever adaptation of CP-M. The Z80-based device also features decoding logic as well as control logic for data buses and external RAM. All of this fits onto a chip less than 40,000 mils square and smaller than current microprocessors having 4-kbytes of ROM. The device can also serve as an auxiliary controller, connected as a slave to a host.

AM radio systems require front-end (antenna-RF-IF detector) redesign to receive high-quality stereo signals. The LM1863 chip provides a complete AM-stereo-ready receiver front-end with an RF AGC output, tuning meter circuit, valid station detector, and a low-phase-noise local oscillator. A single IC decoder can handle all AM-stereo encoding schemes. Circuit diagrams illustrate the front-end systems described.

The interface between Ethernet and data generating or receiving equipment can be handled by two chips from Advanced Micro Devices. They are the AM7990 and the AM7991. Ethernet must overcome a number of error sources such as noise, attenuation, or signal skew. The design of the Manchester encoder-decoder used, as well as that of the chips, takes these factors into consideration quite well.

The complexity and cost of EPROM-based micro controller systems can be reduced by using 32K and 64K RAM and EPROM chips together. Two 32K-byte RAM and two 32K-byte EPROM chips allow for 64K-byte memory in which the RAM-EPROM boundary can be set near the highest EPROM location. A conventional system's boundary is determined by the chip size, which can create unusable address space.