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III-V materials can be a very good channel candidate for monolithic 3D (M3D) integration due to the potential of high-performance and lower process temperature as compared with Si, since a low process temperature is crucial to avoid degradation of bottom devices. For III-V M3D integration, material transfer techniques are important, and such processes should be enabled by low process costs on a large wafer scale. In this study, we propose an InGaAs channel transfer technique by wafer bonding, epitaxial lift-off and III-V layers grown on Si substrate. Effective mobility of fabricated MOS HEMTs using transferred InGaAs layer was 1.3 times higher than that of Si MOSFETs. The proposing channel transfer technique would be useful for M3D integration because it provides wafer scalability, cost-effectiveness, back-gate biasing, and etc. [ABSTRACT FROM AUTHOR]

A development of high quality In x Ga 1 − x As epitaxial layers on Si substrates is essential for high-performance logic transistors due to the low fabrication cost and high compatibility with a conventional Si technology. We investigate the surface of In 0.53 Ga 0.47 As epitaxial layers grown by metal-organic chemical vapor deposition on a Si substrate (with InP/GaAs buffer layers) to obtain a high capacitance using high-k films (HfO 2 /Al 2 O 3 bilayer). The high-k films were grown on In 0.53 Ga 0.47 As epitaxial layers by atomic layer deposition (ALD). The interface between the high-k bilayer and the In 0.53 Ga 0.47 As epitaxial layer was analyzed depending on a surface treatment of the In 0.53 Ga 0.47 As epitaxial layer, and the surface treatment of the In 0.53 Ga 0.47 As epitaxial layer using trimethylaluminum (TMA) enhanced the electrical performances of Pt/high-k film/In 0.53 Ga 0.47 As capacitors. The TMA was introduced on the In 0.53 Ga 0.47 As epitaxial layer in the ALD chamber, which reduced native oxides (such as gallium and arsenic oxides) of the In 0.53 Ga 0.47 As surface and minimized a formation of interfacial layers between the high-k film and In 0.53 Ga 0.47 As layer. A capacitance equivalent thickness (CET) of ~ 1.5 nm was achieved with a low leakage current (~ 10 − 4 A/cm 2 at 1 V). A CET as low as ~ 1.3 nm and a capacitance > 2.5 μF/cm 2 was attained by optimizing the high-k/In 0.53 Ga 0.47 As interface. The TMA treatment on the In 0.53 Ga 0.47 As epitaxial layer is compatible with the conventional Si technology and provides promising opportunities for the development of state-of-the-art field-effect transistor technology using In x Ga 1 − x As epitaxial layers. [ABSTRACT FROM AUTHOR]

• Surface morphology and structural property of metastable InGaAs as relaxation. • Effect of growth temperature on the structural properties of metastable InGaAs. • Intuitive results to grow highly strained InGaAs/AlInAs superlattice. In this study, the metastability of In 0.68 Ga 0.32 As layers on InP substrates was investigated at various growth temperatures. The thickness of each metastable In 0.68 Ga 0.32 As layer was 40 nm, which is four times the critical thickness of the stable lattice with a stress of approximately 1%. The surface morphologies and roughness of the metastable In 0.68 Ga 0.32 As layers were highly sensitive to the growth conditions. Cross-hatches were observed on their surfaces when they were grown at various growth temperatures, and over this range, the surface roughness varied from 0.11 nm to 0.16 nm. The lowest surface roughness of 0.11 nm was achieved at 770 °C, and the metastable In 0.68 Ga 0.32 As layer showed a flat surface morphology with terraces parallel to the step edges. These results corresponded to those of the strain relaxation analysis of the metastable In 0.68 Ga 0.32 As layers using X-ray diffraction spectra. The In 0.68 Ga 0.32 As layer grown at 770 °C was almost fully strained, whereas those grown at other growth temperatures were relieved by approximately 10%. The flat surface morphologies and almost fully strained lattices suggested that the growth conditions were suitable for preparing high-quality superlattices with well-defined interfaces. The intuitive results of the metastable In 0.68 Ga 0.32 As single layers were utilized to grow high-quality In 0.67 Ga 0.33 As/Al 0.64 In 0.36 As superlattices with a reduction in the misfit dislocation by 41.8%. The results obtained herein suggest that the growth conditions for superlattices can be easily and efficiently optimized using the metastability of the materials. [ABSTRACT FROM AUTHOR]