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Abstract: The crystal structure of a material has a large impact on the electronic and material properties such as band alignment, bandgap energy, and surface energies. Au‐seeded III–V nanowires are promising structures for exploring these effects, since for most III–V materials they readily grow in either wurtzite or zinc blende crystal structure. In III–Sb nanowires however, wurtzite crystal structure growth has proven difficult. Therefore, other methods must be developed to achieve wurtzite antimonides. For GaSb, theoretical predictions of the band structure diverge significantly, but the absence of wurtzite GaSb material has prevented any experimental verification of the properties. Having access to this material is a critical step toward clearing the uncertainty in the electronic properties, improving the theoretical band structure models and potentially opening doors toward application of this material. This work demonstrates the use of InAs wurtzite nanowires as templates for realizing GaSb wurtzite shell layers with varying thicknesses. The properties of the axial and radial heterointerfaces are studied at the atomic scale by means of aberration‐corrected scanning transmission electron microscopy, revealing their sharpness and structural quality. The transport characterizations point toward a positive offset in the valence bandedge of wurtzite compared to zinc blende. [ABSTRACT FROM AUTHOR]

In this paper, we report on the development of a vertical wrap-gated field-effect transistor based on epitaxially grown InAs nanowires. We discuss some of the important steps involved in the growth and processing, such as nanowire position control, in situ doping, high-k dielectric deposition, spacer layer formation, and metal wrap-gate fabrication. In particular, we compare a few alternative methods for deposition of materials onto vertical structures and discuss their potential advantages and limitations. Finally, we also present a comparison of transistor performance for nanowires grown using two different epitaxial techniques. [ABSTRACT FROM AUTHOR]

We report on InAs enhancement-mode held-effect transistors integrated directly on Si substrates. The transistors consist of vertical InAs nanowires, grown on Si substrates without the use of metal seed particles, and they are processed with a 50-nm-long metal wrap gate and high-κ gate dielectric. Device characteristics showing enhancement-mode operation are reported. The output characteristics are asymmetric due to the band alignment and band bending at the InAs/Si interface. The implemented transistor geometry can therefore also serve as a test structure for investigating the InAs/Si heterointerface. From temperature-dependent measurements, we deduce an activation energy of about 200 meV for the InAs/Si conduction band offset. [ABSTRACT FROM AUTHOR]

We present results on fabrication and dc characterization of vertical InAs nanowire wrap-gate field-effect transistor arrays with a gate length of 50 nm. The wrap gate is defined by evaporation of 50-nm Cr onto a 10-nm-thick HfO2 gate dielectric, where the gate is also separated from the source contact with a 100-nm SiOx, spacer layer. For a drain voltage of 0.5 V, we observe a normalized transconductance of 0.5 S/mm, a subthreshold slope around 90 mV/dec, and a threshold voltage just above 0 V. The highest observed normalized on current is 0.2 A/mm, with an off current of 0.2 mA/mm. These devices show a considerable improvement compared to previously reported vertical InAs devices with SiNx gate dielectrics. [ABSTRACT FROM AUTHOR]

Although zinc-blende (ZB) and wurtzite (WZ) structures differ only in the atomic stacking sequence, mixing of crystal phases can strongly affect the electronic properties, a problem particularly common to bottom up-grown nanostructures. A lack of understanding of the nature of electronic transport at crystal phase junctions thus severely limits our ability to develop functional nanowire devices. In this work we investigated electron transport in InAs nanowires with designed mixing of crystal structures, ZB/WZ/ZB, by temperature-dependent electrical measurements. The WZ inclusion gives rise to an energy barrier in the conduction band. Interpreting the experimental result in terms of thermionic emission and using a drift-diffusion model, we extracted values for the WZ/ZB band offset, 135 ± 10 meV, and interface sheet polarization charge density on the order of 10-3 C/m2. The extracted polarization charge density is 1-2 orders of magnitude smaller than previous experimental results, but in good agreement with first principle calculation of spontaneous polarization in WZ InAs. When the WZ length is reduced below 20 nm, an effective barrier lowering is observed, indicating the increasing importance of tunneling transport. Finally, we found that band-bending at ZB/WZ junctions can lead to bound electron states within an enclosed WZ segment of sufficient length, evidenced by our observation of Coulomb blockade at low temperature. These findings provide critical input for modeling and designing the electronic properties of novel functional devices, such as nanowire transistors, where crystal polytypes are commonly found. [ABSTRACT FROM AUTHOR]

We report the observation of a thermoelectricpower factor in InAsnanowires that exceeds that predicted by a single-band bulk modelby up to an order of magnitude at temperatures below about 20 K. Weattribute this enhancement effect not to the long-predicted 1D subbandeffects but to quantum-dot-like states that form in electrostaticallynonuniform nanowires as a result of interference between propagatingstates and 0D resonances. [ABSTRACT FROM AUTHOR]

Abstract: In this work, the nucleation and growth of InAs nanowires on patterned SiO2/Si(111) substrates is studied. It is found that the nanowire yield is strongly dependent on the size of the etched holes in the SiO2, where openings smaller than 180nm lead to a substantial decrease in nucleation yield, while openings larger than promote nucleation of crystallites rather than nanowires. We propose that this is a result of indium particle formation prior to nanowire growth, where the size of the indium particles, under constant growth parameters, is strongly influenced by the size of the openings in the SiO2 film. Nanowires overgrowing the etched holes, eventually leading to a merging of neighboring nanowires, shed light into the growth mechanism. [Copyright &y& Elsevier]

We report electrical characterization of quantum dots formed by introducing pairs of thin wurtzite (WZ) segments in zinc blende (ZB) InAs nanowires. Regular Coulomb oscillations are observed over a wide gate voltage span, indicating that WZ segments create significant barriers for electron transport. We find a direct correlation of transport properties with quantum dot length and corresponding growth time of the enclosed ZB segment. The correlation is made possible by using a method to extract lengths of nanowire crystal phase segments directly from scanning electron microscopy images, and with support from transmission electron microscope images of typical nanowires. From experiments on controlled filling of nearly empty dots with electrons, up to the point where Coulomb oscillations can no longer be resolved, we estimate a lower bound for the ZB-WZ conduction-band offset of 95 meV. [ABSTRACT FROM AUTHOR]