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In this study, we describe a low-noise complementary metal-oxide semiconductor (CMOS) image sensor (CIS) with a 10/11-bit hybrid single-slope analog-to-digital converter (SS-ADC). The proposed hybrid SS-ADC provides a resolution of 11 bits in low-light and 10 bits in high-light. To this end, in the low-light section, the digital-correlated double sampling method using a double data rate structure was used to obtain a noise performance similar to that of the 11-bit SS-ADC under low-light conditions, while maintaining linear in-out characteristics. The CIS with the proposed 10/11-bit hybrid SS-ADC was fabricated using a 110 nm 1-poly 4-metal CIS process. The measurement results showed that dark random noise was reduced by 8% in low light when using the proposed hybrid SS-ADC, compared with the existing 10-bit ADC. Additionally, in the case of high brightness, when using a 10-bit resolution, the dynamic power consumption decreased by approximately 31%, compared to the 11-bit ADC. The total power consumption is 3.9 mW at 15 fps when the analog, pixel, and digital supply voltages are 3.3 V, 3.3 V, and 1.5 V, respectively. [ABSTRACT FROM AUTHOR]

Recently, there have been significant developments in the designs of CMOS image sensors to achieve high-resolution sensing capabilities. One of the fundamental factors determining the sensor's ability to capture high-resolution images is its efficiency in focusing the visible light onto the photosensitive region of the submicron scale. In most CMOS imaging technologies, this is typically achieved through microlenses. Light collection under diverse conditions can be significantly improved through the efficient design of microlenses. While the optimization of microlenses appears to be imperative, achieving efficient designs of microlenses for high-density pixels under various conditions remains a significant challenge. Therefore, a systematic optimization approach is required to accelerate the development of efficient microlenses with enhanced optical performance. In this paper, we present an approach to optimize the shape of CMOS microlenses through adjoint sensitivity analysis (ASA). A novel figure of merit (FOM) is developed and incorporated into the optimization process to enhance the light collection. The gradient of the FOM is computed iteratively using two field simulations only. The functionality and robustness of the optimization framework are thoroughly evaluated. Furthermore, the performance of the optimized CMOS microlenses is compared to that of the conventional microlenses. The adjoint-assisted optimization framework presented here can be further used to develop efficient optical devices that perform optical manipulation such as concentrating, bending, or dispersing light in compact imaging systems. [ABSTRACT FROM AUTHOR]

Complementary Metal-Oxide-Semiconductor (CMOS) image sensors (CISs), known for their high integration, low cost, and superior performance, have found widespread applications in satellite and space exploration. However, the readout circuits of pixel arrays are vulnerable to functional failures in complex or intense radiation environments, particularly due to transient γ radiation. Using Technology Computer-Aided Design (TCAD) device simulations and Simulation Program with Integrated Circuit Emphasis (SPICE) circuit simulations, combined with a double-exponential current source fault injection method, this study investigates the transient dose rate effect (TDRE) on a typical readout circuit of CISs. It presents the variations in the photoelectric signal under different dose rates and at different occurrence moments of the TDRE. The results show that, under low dose rates, the CIS readout circuit can still perform data acquisition and digital processing, with the photoelectric signal exhibiting some sensitivity to the occurrence moment. At high dose rates, however, the photoelectric signal not only remains sensitive to the occurrence moment but also shows significant discreteness. Further analysis of the CIS readout circuit sequence suggests that the occurrence moment is a critical factor affecting the circuit's performance and should not be overlooked. These findings provide valuable insights and references for further research on the TDRE in circuits. [ABSTRACT FROM AUTHOR]

Silicon is the dominant material in complementary metal-oxide-semiconductor (CMOS) imaging devices because of its outstanding electrical and optical properties, well-established fabrication methods, and abundance in nature. However, with the ongoing trend toward electronic miniaturization, which demands smaller pixel sizes in CMOS image sensors, issues, such as crosstalk and reduced optical efficiency, have become critical. These problems stem from the intrinsic properties of Si, particularly its low absorption in the long wavelength range of the visible spectrum, which makes it difficult to devise effective solutions unless the material itself is changed. Recent advances in optical metasurfaces have offered new possibilities for solving these problems. In this study, we propose color arrestor pixels (CAPs) as a new class of color image sensors whose composite spectral responses directly mimic those of the human eye. The key idea is to employ linearly independent combinations of standardized color matching functions. These new basis functions allow our device to reproduce colors more accurately than the currently available image sensors with red-green-blue filters or other metasurface-based sensors, demonstrating an average CIEDE2000 color difference value of only 1.79 when evaluating 24 colors from the Gretag-Macbeth chart under standard illuminant D65. Owing to their high fidelity to the human eye response, CAPs consistently exhibit exceptional color reproduction accuracy under various spectral illumination compositions. With a small footprint of 860 nm height and 221 nm full-color pixel pitch, the CAPs demonstrated high absorption efficiencies of 79 %, 81 %, and 63 % at wavelengths of 452 nm, 544 nm, and 603 nm, respectively, and good angular tolerance. With such a high density of pixels efficiently capturing accurate colors, CAPs present a new direction for optical image sensor research and their applications. [ABSTRACT FROM AUTHOR]

The resolution of Si complementary metal–oxide–semiconductor field-effect transistor (C-MOSFET) image sensors (CISs) has been intensively enhanced to follow the technological revolution of smartphones, AI devices, autonomous cars, robots, and drones, approaching the physical and material limits of a resolution increase in conventional Si CISs because of the low quantum efficiency (i.e., ~40%) and aperture ratio (i.e., ~60%). As a novel solution, a hybrid organic–Si image sensor was developed by implementing B, G, and R organic photodiodes on four n-MOSFETs for photocurrent sensing. Photosensitive organic donor and acceptor materials were designed with cost-effective small molecules, i.e., the B, G, and R donor and acceptor small molecules were Coumarin6 and C_60, DMQA and MePTC, and ZnPc and TiOPc, respectively. The output voltage sensing margins (i.e., photocurrent signal difference) of the hybrid organic–Si B, G, and R image sensor pixels presented results 17, 11, and 37% higher than those of conventional Si CISs. In addition, the hybrid organic–Si B, G, and R image sensor pixels could achieve an ideal aperture ratio (i.e., ~100%) compared with a Si CIS pixel using the backside illumination process (i.e., ~60%). Moreover, they may display a lower fabrication cost than image sensors because of the simple image sensor structure (i.e., hybrid organic–Si photodiode with four n-MOSFETs). [ABSTRACT FROM AUTHOR]

In this study, we developed and demonstrated a millimeter-wave electric field imaging system using an electro-optic crystal and a highly sensitive polarization measurement technique using a polarization image sensor, which was fabricated using a 0.35-µm standard CMOS process. The polarization image sensor was equipped with differential amplifiers that amplified the difference between the 0° and 90° pixels. With the amplifier, the signal-to-noise ratio at low incident light levels was improved. Also, an optical modulator and a semiconductor optical amplifier were used to generate an optical local oscillator (LO) signal with a high modulation accuracy and sufficient optical intensity. By combining the amplified LO signal and a highly sensitive polarization imaging system, we successfully performed millimeter-wave electric field imaging with a spatial resolution of 30 × 60 µm at a rate of 1 FPS, corresponding to 2400 pixels/s. [ABSTRACT FROM AUTHOR]

CMOS image sensor (CIS) plays a crucial role in diverse optical applications by facilitating the capture of images in the visible and near-infrared spectra. The enhancement of image resolution in CIS by an increase in pixel density is becoming more significant and realizable with the recent progress of nanofabrication. However, as pixel size decreases towards the diffraction limit, there is an inevitable trade-off between the scale-down of pixel size and the enhancement of optical sensitivity. Recently, to overcome this, an entirely new concept of spectral sensing using a nanophotonic-based color router has been proposed. In this work, we present a metasurface-based spectral router to effectively split the spectrum from visible to near-infrared and redirect through the four optical channels to the targeted pixel surfaces. We optimize the metasurface that simultaneously controls the phases of the transmitted light of targeted spectra, i.e. red (R), green (G), blue (B), and near-infrared (NIR), which is the largest number of channels reported based on a single layered metasurface and has an optical efficiency that surpasses the efficiency of conventional color filter systems. [ABSTRACT FROM AUTHOR]

With the electromagnetic environment becoming increasingly complex, it is crucial to address the risk posed by electromagnetic pulse, which critically impairs the performance and reliability of electronic systems based on complementary metal oxide semiconductor (CMOS) image sensors. In this context, research on the failure types of CMOS image sensors in a high-power electromagnetic environment, caused by strong electromagnetic pulses and the rapid evaluation method of interference immunity, has garnered significant interest. This paper conducts electromagnetic pulse simulation experiments on CMOS image sensors to first study their failure types, such as image abnormalities and functional interruption, and then identify the corresponding failure criteria. Furthermore, this study builds on the small sample test evaluation method to investigate the interference threshold of functional interruptions in CMOS image sensors by calculating the failure probability at different field strengths. The obtained data were combined with the Weibull distribution function for fitting, the results of which found the interference threshold to be at 40.4 kV/m. The findings of this study provide a basis for evaluating the survivability of CMOS image sensors and their associated reinforcement technology in high-power electromagnetic environments. [ABSTRACT FROM AUTHOR]

Image sensors such as single-photon avalanched diode (SPAD) arrays typically adopt in-pixel quenching and readout circuits, and the under-illumination first-stage readout circuits often employs high-threshold input/output (I/O) or thick-oxide metal-oxide-semiconductor field-effect transistors (MOSFETs). We have observed reliability issues with high-threshold n-channel MOSFETs when they are exposed to strong visible light. The specific stress conditions have been applied to observe the drain current (Id) variations as a function of gate voltage. The experimental results indicate that photo-induced hot electrons generate interface trap states, leading to Id degradation including increased off-state current (Ioff) and decreased on-state current (Ion). The increased Ioff further activates parasitic bipolar junction transistors (BJT). This reliability issue can be avoided by forming an inversion layer in the channel under appropriate bias conditions or by reducing the incident photon energy. [ABSTRACT FROM AUTHOR]

We present a 2D-stitched, 316MP, 120FPS, high dynamic range CMOS image sensor with 92 CML output ports operating at a cumulative date rate of 515 Gbit/s. The total die size is 9.92 cm × 8.31 cm and the chip is fabricated in a 65 nm, 4 metal BSI process with an overall power consumption of 23 W. A 4.3 µm dual-gain pixel has a high and low conversion gain full well of 6600e- and 41,000e-, respectively, with a total high gain temporal noise of 1.8e- achieving a composite dynamic range of 87 dB. [ABSTRACT FROM AUTHOR]

Optical and electrophysiological measurements help us understand mouse brain functions. One type of device available for optical measurements is an implantable complementary metaloxide-semiconductor (CMOS) image sensor (ICIS). However, an ICIS alone cannot directly measure the electrical signals emitted by mouse brain neurons. Considering this limitation, we have developed an implantable multimodal sensor that can simultaneously make optical and electrophysiological measurements of the neural activity in the brains of mice. The proposed device integrates a CMOS image sensor and a neural amplifier with a recording electrode into a single chip, making it no more invasive than a conventional implantable CMOS image sensor. The proposed device is based on a 0.35-µm CMOS standard process and occupies an area of 0.50 × 5.0 mm2. Furthermore, a hybrid filter is fabricated on the imaging pixel array to remove the excitation light and selectively detect fluorescence. From electrophysiological measurements, we confirm that the neural amplifier features a mid-band gain of 39 dB from 500 mHz to 4 kHz, which is the bandwidth that includes local field and action potentials. Crosstalk noise is observed because of the digital signal used to control the image sensor. However, in vivo experiments demonstrate that the device is capable of simultaneously measuring and processing optical and electrophysiological signals when the amplitude spectrum has a peak of less than 1 µV. [ABSTRACT FROM AUTHOR]

A stochastic model for characterizing the conversion gain of Active Pixel Complementary metal–oxide–semiconductor (CMOS) image sensors (APS), assuming stationary conditions was recently presented in this journal. In this study, we extend the stochastic approach to non-stationary conditions. Non-stationary conditions occur in gated imaging applications. This new stochastic model, which is based on fundamental physical considerations, enlightens us with new insights into gated CMOS imaging, regardless of the sensor. The Signal-to-Noise Ratio (SNR) is simulated, allowing optimized performance. The conversion gain should be determined under stationary conditions. [ABSTRACT FROM AUTHOR]

Summary: In this paper, a 256 × 256 CMOS image sensor is introduced in which the pixel signals are read and converted into digital data in a completely differential mode. This technique helps to obtain pixel signals with higher linearity and accuracy compared with conventional methods. Improving the linearity and accuracy of the image sensor has a direct impact on increasing the quality of the generated images. The simulation results of the proposed pixel readout circuit show that the THD, SINAD, SNR, and SFDR are 0.45%, 47 dB, 66 dB, and 46 dB, respectively. The voltage gain of the proposed readout circuit is about 1, causing it to read the photodetector signals more accurately than the conventional methods. A full differential single‐slope ADC with a working frequency of 50 Mhz has the task of converting the pixel signal to 10 bits of digital data. The total power consumption of a column of sensors is about 80 μW. All the circuits are designed and implemented using 0.18‐μm CMOS technology in Virtuoso and simulated by the SPECTRE. [ABSTRACT FROM AUTHOR]

The nuclear industry and other high-radiation environments often need remote monitoring equipment with advanced cameras to achieve precise remote control operations. CMOS image sensors, as a critical component of these cameras, get exposed to γ-ray irradiation while operating in such environments, which causes performance degradation that adversely affects camera resolution. This study conducted total ionizing dose experiments on CMOS image sensors and camera systems and thoroughly analyzed the impact mechanisms of the dark current, Full Well Capacity, and quantum efficiency of CMOS image sensors on camera resolution. A quantitative evaluation formula was established to evaluate the impact of Full Well Capacity and quantum efficiency of the CMOS image sensor on camera resolution. This study provides a theoretical basis for the evaluation of the radiation resistance of cameras in environments with strong nuclear radiation and the development of radiation-resistant cameras. [ABSTRACT FROM AUTHOR]

A lateral overflow integration capacitor (LOFIC) complementary metal oxide semiconductor (CMOS) image sensor can realize high-dynamic-range (HDR) imaging with combination of a low-conversion-gain (LCG) signal for large maximum signal electrons and a high-conversion-gain (HCG) signal for electron-referred noise floor. However, LOFIC-CMOS image sensor requires a two-channel read-out chain for LCG and HCG signals whose polarities are inverted. In order to provide an area-efficient LOFIC-CMOS image sensor, a one-channel read-out chain that can process both HCG and LCG signals is presented in this paper. An up/down double-sampling circuit composed of an inverting amplifier for HCG signals and a non-inverting attenuator for LCG signals can reduce the area of the read-out chain by half compared to the conventional two-channel read-out chain. A test chip is fabricated in a 0.18 μ m CMOS process with a metal–insulator–metal (MIM) capacitor, achieving a readout noise of 130 μ V rms for the HCG signal and 1.19 V for the LCG input window. The performance is equivalent to 103 dB of the dynamic range with our previous LOFIC pixel in which HCG and LCG conversion gains are, respectively, 160 μ V / e − and 10 μ V / e − . [ABSTRACT FROM AUTHOR]

Star sensors are widely used by satellites for their precise pointing accuracy. However, protons in space will cause cumulative effects and single-event transients in the imaging systems of star sensors. These effects will affect the success rate of star map recognition of star sensors. In this paper, proton irradiation experiments and field tests were carried out in turn, and three typical star recognition algorithms were used to recognize the star maps. The results showed that cumulative effects led to a decrease in the number of identifiable stars, which greatly affected the recognition success rate of the grid algorithm. Hot pixels caused by displacement damage effects increased the star centroid positioning error, leading to a decrease in the recognition success rate of the triangle algorithm and pyramid algorithm. Single-event transients produced by protons hitting the image sensor are similar to the grayscale value and shape of a star, and were recognized as "false stars", which had a significant impact on the success rate of the three recognition algorithms. In general, the pyramid algorithm was more effective than the other two algorithms in identifying the affected star map, and the recognition success rate of the grid algorithm was significantly reduced. [ABSTRACT FROM AUTHOR]

In this paper, a 32 × 32 ToF image sensor with a spike-based lock-in pixel is presented. The pixel has an in-pixel background light suppression circuit which converts the infrared light into spike number and realizes self-suppression of the background light without filter. This pixel structure can realize 2D and 3D synchronous imaging. This ToF image sensor is implemented in a 110 nm one-poly four-metal CMOS technology with a size of 3903 μm × 3330 μm. The lock-in pixel as the key part of this sensor has a size of 27.5 μm × 27.5 μm. Measurement results show that this ToF image sensor can image in the range of 20 cm–45 cm under the background light range of 0–12000 lux without filter and the maximum relative error is 3.6 %. Therefore, this ToF image sensor with the proposed lock-in pixel can suppress background light effectively without filter and realize 2D and 3D synchronous imaging. [ABSTRACT FROM AUTHOR]

This paper demonstrates that cut-off pnp Bipolar Junction Transistors (BJTs) can induce visible dark current to their nearby CMOS (Complementary Metal Oxide Semiconductor) image sensor pixels, supported with experimental results. Previously, it has been shown that active BJTs and forward-biased PN junctions can incur dark shading to nearby CMOS image sensor pixels through electroluminescence (EL). However, in our experiments, when the BJTs are in their cut-off region, they can induce dark current to nearby image pixels at a similar distance but the dark current level declines much faster. To figure out the causes of dark current induced by the cut-off BJTs, the thermal coefficient of their nearby image pixels has been measured and the current is found to double for every 5 °C temperature rise. This indicates the cut-off BJT induced dark current is mainly due to the diffusion current generated from the silicon neutral regions in the pinned photodiodes (PPDs). This is in contrast to the hot pixels' dark current incurred by thermal generation, that doubles for every 10 °C increase in temperature, or EL that has a very small thermal coefficient. • A 10μm × 10 μm cut-off BJT can induce increased level of dark current to its nearby 7 image sensor pixels, or 77 μm away. •The causes of the cut-off BJT induced dark current is the diffusion current generated from the silicon neutral regions in the PPD. •By keeping the image pixel array enough distances from the cut-off BJTs, the dark current increase could be prevented. [ABSTRACT FROM AUTHOR]

Background:In the diagnosis and primary health care of an individual, estimation of the pulse rate and blood oxygen saturation (SpO 2 ) is critical. The pulse rate and SpO 2 are determined by methods including photoplethysmography (iPPG), light spectroscopy, and pulse oximetry. These devices need to be compact, non-contact, and noninvasive for real-time health monitoring. Reflection-based iPPG is becoming popular as it allows non-contact estimation of the heart rate and SpO 2 . Most iPPG methods capture temporal data and form complex computations, and thus real-time measurements and spatial visualization are difficult. Method:In this research work, reflective mode polarized imaging-based iPPG is proposed. For polarization imaging, a custom image sensor with wire grid polarizers on each pixel is designed. Each pixel has a wire grid of varying transmission axes, allowing phase detection of the incoming light. The phase information of the backscattered light from the fingertips of 12 healthy volunteers was recorded in both the resting as well as the excited states. These data were then processed using MATLAB 2021b software. Results: The phase information provides quantitative information on the reflection from the superficial and deep layers of skin. The ratio of deep to superficial layer backscattered phase information is shown to be directly correlated and linearly increasing with an increase in the SpO 2 and heart rate. Conclusions: The phase-based measurements help to monitor the changes in the resting and excited state heart rate and SpO 2 in real time. Furthermore, the use of the ratio of phase information helps to make the measurements independent of the individual skin traits and thus increases the accuracy of the measurements. The proposed iPPG works in ambient light, relaxing the instrumentation requirement and helping the system to be compact and portable. [ABSTRACT FROM AUTHOR]

A stochastic model for characterizing the conversion gain of Active Pixel Complementary metal–oxide–semiconductor (CMOS) image sensors (APS) with at least four transistors is presented. This model, based on the fundamental principles of electronic noise, may provide a reliable calibration of the gain conversion, which is one of the most important parameters of CMOS Image Sensor pixels. The new model revisits the "gold standard" ratio method of the measured variance of the shot noise to the mean value. The model assumes that shot noise is the dominant noise source of the pixel. The microscopic random time-dependent voltage of any shot noise electron charging the junction capacitance C of the sensing node may have either an exponential form or a step form. In the former case, a factor of 1/2 appears in the variance to the mean value, namely, q/2C is obtained. In the latter case, the well-established ratio q/C remains, where q is the electron charge. This correction factor affects the parameters that are based on the conversion gain, such as quantum efficiency and noise. The model has been successfully tested for advanced image sensors with six transistors fabricated in a commercial FAB, applying a CMOS 180 nm technology node with four metals. The stochastic modeling is corroborated by measurements of the quantum efficiency and simulations with advanced software (Lumerical). [ABSTRACT FROM AUTHOR]

The surveillance cameras we focus on target the volume zone, and area reduction is a top priority. However, by simplifying the ADC comparator, we face a new RUSH current issue, for which we propose a circuit solution. This paper proposes two novel techniques of column-ADC for surveillance cameras to improve low-light characteristics. RUSH current compensation reduces transient current consumption fluctuations during AD conversion and utilizing timing shift ADCs decreases the number of simultaneously operating ADCs. These proposed techniques improve low-light characteristics because they reduce the operating noise of the circuit. In order to support small signal measurement, this paper also proposes a high-accuracy evaluation system that can measure both small optical/electrical signals in low-light circumstances. To demonstrate these proposals, test chips were fabricated using a 55 nm CIS process and their optical/electrical characteristics were measured. As a result, low-light linearity as optical characteristics were reduced by 63% and column interference (RUSH current) as an electrical characteristic was also reduced by 50%. As for the high-accuracy evaluation system, we confirmed that the inter-sample variation of column interference was 0.05 LSB. This ADC achieved a figure-of-merit (FoM) of 0.32 e-·pJ/step, demonstrating its usefulness for other ADC architectures while using a single-slope-based simple configuration. [ABSTRACT FROM AUTHOR]

In this article, We demonstrated an image sensor for detecting changes in polarization with high sensitivity. For this purpose, we constructed an optical system with a two-layer structure, comprising an external polarizer and polarizers on a pixel array. An external polarizer is used to enhance the polarization rotation while reducing the intensity to avoid pixel saturation of the image sensor. Using a two-layer structure, the two polarizers can be arranged under optimal conditions and the image sensor can achieve high polarization-change detection performance. We fabricated the polarization image sensor using a 0.35- $\mu \text{m}$ CMOS process and, by averaging 50 ${\times }\,\,50$ pixels and 96 frames, achieved a polarization rotation detection limit of 5.2 ${\times }\,\,10^{-4^{\circ}} $ at a wavelength of 625 nm. We also demonstrated the applicability of electric-field distribution imaging using an electrooptic crystal (ZnTe) for weak-polarization-change distribution measurements. [ABSTRACT FROM AUTHOR]

Multi-path interference causes depth errors in indirect time-of-flight (ToF) cameras. In this paper, resolving multi-path interference caused by surface reflections using a multi-tap macro-pixel computational CMOS image sensor is demonstrated. The imaging area is implemented by an array of macro-pixels composed of four subpixels embodied by a four-tap lateral electric field charge modulator (LEFM). This sensor can simultaneously acquire 16 images for different temporal shutters. This method can reproduce more than 16 images based on compressive sensing with multi-frequency shutters and sub-clock shifting. In simulations, an object was placed 16 m away from the sensor, and the depth of an interference object was varied from 1 to 32 m in 1 m steps. The two reflections were separated in two stages: coarse estimation based on a compressive sensing solver and refinement by a nonlinear search to investigate the potential of our sensor. Relative standard deviation (precision) and relative mean error (accuracy) were evaluated under the influence of photon shot noise. The proposed method was verified using a prototype multi-tap macro-pixel computational CMOS image sensor in single-path and dual-path situations. In the experiment, an acrylic plate was placed 1 m or 2 m and a mirror 9.3 m from the sensor. [ABSTRACT FROM AUTHOR]

A 1.2-Mpixel indirect time-of-flight (ToF) CMOS image sensor is presented to lower peak current and to cancel out multi-user interference. The proposed 4-tap 3.5- $\mu \text{m}$ demodulation pixel is optimally designed to improve quantum efficiency (QE) and demodulation contrast (DC). A new “multiple-interleaving” scheme is proposed to reduce the peak current and self-compensate fixed-pattern phase noise (FPPN) with the minimal side effect of DC imbalance. To cancel out interference from the other ToF sensors, a multi-user interference cancellation (MUIC) scheme based on pseudorandom modulation is adopted. From the measurement results, we achieve a high QE of 38% at 940 nm and a high DC of 96% and 80% at 100- and 200-MHz modulation frequencies, respectively. With the superior pixel performance, the depth noise of <0.92% and <0.3% is achieved at the full and 2 $\times $ 2 binning modes, respectively. The multiple-interleaving scheme suppresses the peak current to less than 0.9 A and removes the column FPPN with constant DC for the whole pixel array. The proposed MUIC proves that at least two interferers can be successfully rejected. The sensor chip is fabricated in a two-stack process with 65 nm for the top die and 65 nm for the bottom die. [ABSTRACT FROM AUTHOR]

This paper presents a power-efficient CMOS image sensor (CIS) for always-on object detection by using 1-bit log-gradient feature extraction in analog current domain. Compared with traditional image sensors with high-resolution ADCs, the proposed CIS extracts gradients in ratio form and generates feature maps at 1-bit resolution, which eliminates unnecessary background information and illumination-related data, and reduces the data computation in the later detector. The system containing the proposed CIS and back-end ANN detector is modeled with python and the simulation achieves an accuracy of 93.2 % for person detection. The CIS employs current mode divider and comparator to compute the gradient ratios. An accurate and configurable muti-input and muti-output (MIMO) current divider is proposed, composed of two cascaded modified second generation current controlled conveyors (M-CCCIIs). The proposed CIS was fabricated in a 0.18 μm standard CMOS process and realized a frame rate of 170 fps and an energy efficiency of 337 pJ/pixel in a power consumption of 1.1 mW. Experimental results show that the proposed CIS can realize the function of extracting log-gradients. [ABSTRACT FROM AUTHOR]

This paper presents a low-light-level CMOS image sensor featuring a novel correlated double sampling (CDS) technique based on the capacitive transimpedance amplifier (CTIA) pixel circuit. In order to achieve high sensitivity for low-light-level imaging, we employ the CTIA pixel circuit with a small integration capacitor. To effectively eliminate pixel noise, we propose an innovative analog CDS structure based on the CTIA pixel, which utilizes only one capacitor for sampling and holding the reset signal within each pixel. By implementing this architecture in the column, we are able to perform subtraction between the reset signal and integration signal. As a result of this proposed CDS design, both pixel reset noise and part of the fixed-pattern noise (FPN) can be significantly reduced. We have fabricated a test chip using this method with a 128 × 128 pixel array in a standard 0.35 μm CMOS process. Experimental results demonstrate that our CIS employing the proposed CDS based on CTIA is capable of reducing temporal noise from 504.2μVrms to 213.6μVrms. Furthermore, at a frame rate of 5fps, our low-light-level CMOS image sensor equipped with this novel CDS technique is able to capture recognizable images even under illumination as low as 0.05lux. [ABSTRACT FROM AUTHOR]

In this study, we propose a complementary-metal-oxide-semiconductor (CMOS) image sensor with a self-resetting system demonstrating a high signal-to-noise ratio (SNR) to detect small intrinsic signals such as a hemodynamic reaction or neural activity in a mouse brain. The photodiode structure was modified from N-well/P-sub to P+/N-well/P-sub to increase the photodiode capacitance to reduce the number of self-resets required to decrease the unstable stage. Moreover, our new relay board was used for the first time. As a result, an effective SNR of over 70 dB was achieved within the same pixel size and fill factor. The unstable state was drastically reduced. Thus, we will be able to detect neural activity. With its compact size, this device has significant potential to become an intrinsic signal detector in freely moving animals. We also demonstrated in vivo imaging with image processing by removing additional noise from the self-reset operation. [ABSTRACT FROM AUTHOR]

This letter reports a 16.7 Mpixel, 3D-stacked backside illuminated Quanta Image Sensor (QIS) with 1.1 $\mu \text{m}$ -pitch pixels which achieves 0.19 e- rms array read noise and 0.12 e- rms best single-pixel read noise under room temperature operation. The accurate photon-counting capability enables superior imaging performance under ultra-low-light conditions. The sensor supports programmable analog-to-digital convertor (ADC) resolution from 1–14 bits and video frame rates up to 40 fps with $4096\times4096$ resolution and 600 mW power consumption. [ABSTRACT FROM AUTHOR]

Summary: A complementary metal oxide semiconductor (CMOS) image sensor with a resolution of 128 × 128 pixels is presented in this paper in which pixel signal readout, noise suppression, and comparing operations are performed by one circuit during two steps: reading and conversion. The main idea of this work is to combine three main operations of an image sensor in one circuit. This method helps to decrease power consumption, silicon area, total noise, and imaging time. The total power consumption of the imager is 11 mW with a 2.5‐V power supply and 40‐fps frame rate. The pixel layout size is 10 × 10 μm2 with a fill‐factor of 81%. The analog to digital converter (ADC) resolution is 10 bits, and the error resulted from the proposed circuit is about ±0.5 least significant bit (LSB). The proposed CMOS image sensor was designed based on Taiwan Semiconductor Manufacturing Company (TSMC) 0.18‐μm CMOS technology and was simulated by CADENCE SPECTRE circuit simulator. This circuit can be proposed for a CMOS imager with highly accurate and efficient power consumption. [ABSTRACT FROM AUTHOR]

The imaging of wood samples using X-rays for the study of dendrochronology and densitometry is predominantly conducted through analog films subsequently digitized or, in more advanced instances, with expensive flat-panel systems characterized by resolutions on the order of tenths of microns. For this reason, this work proposes as an alternative the utilization of Commercial-Off-The-Shelf (COTS) complementary metal–oxide–semiconductor (CMOS) image sensors as affordable direct detectors for the acquisition of 10.2 μ m resolution radiographic images, which represents sufficient resolution to observe the small structures formed by wood cells called tracheids. The raw images are subsequently processed to mitigate the impact of non-uniformities inherent in pixel response, including the total dose effects, and artifacts present in the image generated by irregularities and defects in the materials utilized to support the wood samples. Moreover, an exhaustive study of the sensor response over different x-ray tube voltage was performed, comparing the results obtained with a simple calculation model and finding a negligible contribution of the photons above the 20 keV. The model was developed based on diverse analyses of geometry and composition of the sensor, such as Focus Ion Beam, Scanning Electron Microscopy, and Time-of-Flight Secondary Ion Mass Spectrometry, and takes into account the X-ray beam attenuations and the photon interaction with the sensor. Finally, this model enables the estimation of the transmission based on the density and thickness of the wood samples. • Applications of COTS CMOS image sensor as direct X-ray detectors • 10 μ m resolution radiographic images for wood dendrochronology and densitometry • Model developed to contrast results and simplify current wood densitometric methods [ABSTRACT FROM AUTHOR]

A dual-mode low-power column parallel single-slope (SS) ADC incorporating Minimum Voltage Feedback (MVF) is proposed for CMOS image sensors. When it works in low-power mode, the ADC utilizes a minimum voltage feedback approach and a dynamic bias structure to minimize the power consumption after the ramp signal surpasses the minimum voltage of a row. In its acceleration mode, it uses the minimum voltages extracted by the MVF circuit to improve the conversion speed. A 10-bit SS ADC with MVF was designed in a 0.18 μm CMOS process. The simulations have been performed to validate the proposed idea. The simulation results show that DNL and INL of the ADC are +0.124/-0.126 LSB and +0.15/-0.12 LSB, respectively. Moreover, the SNDR achieves 61.4 dB, the SFDR is 72.04 dB and the ENOB is 9.9 bit. Under the clock frequency of 100 MHz and the power supply of 3.3 V/1.8 V in the low-power mode, the simulated power consumption of the ADC ranges between 28.9 and 38.8 μW/column, with the column parallel comparator and ramp generator contributing to power reductions of up to 33.0 % and 53.5 %, respectively. The conversion time experiences a notable decrease of up to 65.4 % in the acceleration mode. The power consumption of the added MVF circuit is only 0.15 μW/column. [ABSTRACT FROM AUTHOR]

A backside-illuminated complementary metal-oxide-semiconductor (CMOS) image sensor with 4.0 μm voltage domain global shutter (GS) pixels has been fabricated in a 45 nm/65 nm stacked CMOS process as a proof-of-concept vehicle. The pixel components for the photon-to-voltage conversion are formed on the top substrate (the first layer). Each voltage signal from the first layer pixel is stored in the sample-and-hold capacitors on the bottom substrate (the second layer) via micro-bump interconnection to achieve a voltage domain GS function. The two sets of voltage domain storage capacitor per pixel enable a multiple gain readout to realize single exposure high dynamic range (SEHDR) in the GS operation. As a result, an 80dB SEHDR GS operation without rolling shutter distortions and motion artifacts has been achieved. Additionally, less than −140dB parasitic light sensitivity, small noise floor, high sensitivity and good angular response have been achieved. [ABSTRACT FROM AUTHOR]

This paper presents a high-linearity pixel readout circuit and a 10-bit ADC for using in CMOS image sensor. Nonlinearity, total input referred noise power, and power consumption of the proposed readout circuit are − 60 dB, 411 nV2, and 68 µW, respectively. The proposed pixel readout circuit is suitable for use in precision CMOS imagers. All circuits have been designed using TSMC 0.18 µm 1-poly 6-metal standard CMOS process. [ABSTRACT FROM AUTHOR]

This article presents an application-optimized QVGA image sensor for low-power, always-on object detection using histograms of oriented gradients (HOG). In contrast to conventional CMOS imagers that feature linear and high-resolution ADCs, our readout scheme extracts logarithmic intensity gradients at 1.5 or 2.75 bits of resolution. This eliminates unnecessary illumination-related data and allows the HOG feature descriptors to be compressed by up to $25\times $ relative to a conventional 8-bit readout. As a result, the digital backend-detector, which typically limits system efficiency, incurs less data movement and computation, leading to an estimated $3.3\times $ energy reduction. The imager employs a column-parallel readout with analog cyclic-row buffers that also perform arbitrary-sized pixel-binning for multi-scale object detection. The log-digitization of pixel gradients is computed using a ratio-to-digital converter (RDC), which performs successive capacitive divisions to its input voltages. The prototype IC was fabricated in a 0.13- $\mu \text{m}$ CIS process with standard 4-T 5- $\mu \text{m}$ pixels and consumes 99 pJ/pixel. Experiments using a deformable parts model (DPM) detector for three object classes (persons, bicycles, and cars) indicate detection accuracies that are on par with conventional systems. [ABSTRACT FROM AUTHOR]

In this study, a lens-free dual-color bio-imaging system is developed. This system utilizes a small CMOS image sensor chip as the imager. By coupling alternate lines of blue and yellowgreen filters coated on photodiodes, we can simultaneously detect cyan and yellow fluorescent lights using the device. By equipping the device with a hybrid filter made of a bandpass interference filter, a fiber optic plate (FOP), and a pale-yellow absorption filter, we can achieve an excitation light extinction ratio of approximately -57 dB. By using fluorescent beads of two different colors, we can confirm the operation of the image sensor. Individual images from the cyan and yellow channels can be obtained after data processing, and subsequently the yellow-tocyan image ratio can also be determined. The results show that our device can be used to study Förster resonance energy transfer (FRET) and can thus be applied to investigate the progression of diseases such as cancer. [ABSTRACT FROM AUTHOR]

A light field image sensor is fabricated on a standard complementary metal–oxide-semiconductor (CMOS) process. The sensor uses two grating layers of various layer-to-layer distances to take advantage of Talbot effect. The horizontal placement of the upper grating relative to the lower one has three types of configurations. By shifting the upper grating to the left or right or aligned position relative to the lower grating, light incident from left, right, and center can be differentiated. Furthermore, color selectivity is analyzed by varying grating slit spacing to favor a particular color’s wavelength to reach Talbot depth. We designed photodiodes each having area of $14\times15\,\,\mu {\mathrm{ m}}^{2}$. We used a 180-nm five-metal CMOS process and achieved an angle differentiation accuracy error within 1.8° for the direct incidence on aligned configuration and within 3.6° of the expected angle for the left- and right-shifted configurations. In addition, we experimented with applying various wavelengths of light even to sensor structures favoring other wavelengths to analyze their effects. Combining these sensor characteristics, we show that red, green, and blue lights, clustered together at three different locations, can be recognized by a set of light field sensors. The sensor set can differentiate 6 different combinations of 3 different color blink sequences per cluster location, thus totaling 18 types of spatial temporal signals. Moreover, repeated measurements showed good immunity to noise. The standard deviation of the measured results between each repetition was less than 5 mV. [ABSTRACT FROM AUTHOR]

This paper demonstrates the simultaneous imaging of multiple wavelengths through realizing a filter-free wavelength image sensor and imaging system. The sensor can identify the center wavelength of the spectrum based on the current ratio using the optical absorption characteristics of silicon at different wavelengths and the potential peak formed at depth. A wavelength imaging system was fabricated and calibrated by evaluating the light intensity and wavelength characteristics of each pixel. First, an experiment was conducted assuming that fluorescence was emitted in part of the pixel region of the image sensor. The system successfully identified different fluorescence wavelengths only in the region irradiated by light corresponding to the fluorescence using the current ratio. Finally, experiments were conducted using fluorescent beads on actual cells and pathogen clusters. Red and green fluorescent beads were placed separately on the sensor, and we succeeded in simultaneously imaging the wavelengths of the three regions where only the excitation light and different fluorescence signals were emitted. These results suggest that multiplexed fluorescence imaging, which considers the interactions between sites or targets, can provide new insights into the biomedical [Display omitted] • Identified wavelength by centroid of spectrum for multiple fluorescences. • Calibration of the realized wavelength-imaging system for intensity and wavelength. • Demonstration of wavelength imaging of the excitation light and fluorescence. • Simultaneous imaging of wavelength differences for two types of fluorescent beads. [ABSTRACT FROM AUTHOR]

A CMOS time-of-flight (TOF) image sensor with in-pixel background light (BGL) cancellation and demodulation lock-in pixel is developed for both indoor and outdoor depth imaging applications. The proposed polarity switching integration technique using p+/n-well diode realizes the in-pixel BGL cancellation up to 180 klx. In addition, the developed phase-shift readout (PSR) effectively reduces the inherent correlated noise and column fixed-pattern noise (FPN) as well with sensitivity improvement. A prototyped pulse-modulation-based TOF sensing chip with a $64 \times 64$ pixel array, $20\mu \text {m} \times 20\mu \text{m}$ pixel pitch, and 33% fill factor has been fabricated in TSMC standard 0.18- $\mu \text{m}$ CMOS process and verified. The achieved depth sensing capability ranges from 0.75 to 7.5 m with a linearity error below 1.1%, and the measured relative precision is 4.2% at a 7.5-m target distance. [ABSTRACT FROM AUTHOR]

This brief presents a low-power compression-based CMOS image sensor for wireless vision applications. The sensor implements low-bit-depth imaging with planned sensor distortion (PSD) to effectively compress both data bandwidth and processing power while maintaining high reconstruction image quality. Accordingly, a column-parallel microshift-guided successive-approximation-register (SAR) ADC is proposed to enable 3-bit PSD imaging based on a ${3\times 3}$ pattern. To support normal imaging with low area overhead, the circuit is reconfigurable as an 8-bit SAR/single-slope ADC. The data bandwidth is further compressed by a customized lossless encoder based on predictive coding and run length coding. A ${256\times 216}$ prototype imaging system composed of the compression-based image sensor and the lossless encoder is fabricated in a 0.18- ${\mu }\text{m}$ standard CMOS process. Measurement results show that the image sensor achieves 3 bit/pixel (bpp) with 34.9-dB reconstruction peak signal-to-noise ratio (PSNR) and 0.91 structural similarity index (SSIM). With 1/4 spatial downsampling and lossless encoding, 0.31 bpp is obtained with 29.2-dB PSNR and 0.83 SSIM. The sensor consumes $14.8~{\mu }\text{W}$ (full resolution) and $4.3~{\mu }\text{W}$ (downsampling) at 15 fps, achieving state-of-the-art FoMs of 17.8 and 5.2 pJ/pixel $\cdot $ frame, respectively. Including the encoder, the overall system dissipates as low as $1.2~{\mu }\text{J}$ /frame, making it an attractive solution for wireless sensor networks. [ABSTRACT FROM AUTHOR]

This letter focuses on a new noise source within a pinned photodiode in complimentary metal–oxide–semiconductor (CMOS) image sensors. The noise originates from the feedforward effect, which is related to the barrier height under the transfer gate during the exposure phase. TCAD simulations using the Monte Carlo method show that the barrier height varies with CMOS process fluctuations even for the same pixel design and applied voltage. Furthermore, a model extending our previous work is proposed. The model results indicate that a larger barrier height and shorter exposure time improve the noise performance. The same conclusion can also be obtained from the measurements of a prototype image sensor that can adjust the pixel implants. [ABSTRACT FROM AUTHOR]

This paper presents a temporal noise analysis of charge-domain sampling readout circuits for Complementary Metal-Oxide Semiconductor (CMOS) image sensors. In order to address the trade-off between the low input-referred noise and high dynamic range, a Gm-cell-based pixel together with a charge-domain correlated-double sampling (CDS) technique has been proposed to provide a way to efficiently embed a tunable conversion gain along the read-out path. Such readout topology, however, operates in a non-stationery large-signal behavior, and the statistical properties of its temporal noise are a function of time. Conventional noise analysis methods for CMOS image sensors are based on steady-state signal models, and therefore cannot be readily applied for Gm-cell-based pixels. In this paper, we develop analysis models for both thermal noise and flicker noise in Gm-cell-based pixels by employing the time-domain linear analysis approach and the non-stationary noise analysis theory, which help to quantitatively evaluate the temporal noise characteristic of Gm-cell-based pixels. Both models were numerically computed in MATLAB using design parameters of a prototype chip, and compared with both simulation and experimental results. The good agreement between the theoretical and measurement results verifies the effectiveness of the proposed noise analysis models. [ABSTRACT FROM AUTHOR]

In this study, we fabricated a filter-free wavelength image sensor for the two-dimensional visualization of wavelength information, in addition to light intensity, and realized an imaging system. In this sensor, the electrons generated in silicon in different distributions at each wavelength are divided into two parts by the potential peaks. The wavelength can be identified from the current ratio, and the light intensity can be determined from the total current. In the proposed structure, the pixel current is sequentially output by controlling the rows and columns. The layout was designed based on the proposed structure and was fabricated at the Toyohashi University of Technology LSI factory. An imaging system was constructed using operational amplifiers, A/D converters, and a microcontroller. The ratio and sum of the two signals obtained from the sensor responded linearly to the wavelength and light intensity. The wavelength response was independent of changes in the light intensity. Even when the spot was narrowed down, the response was obtained only at the corresponding pixel and succeeded in the simultaneous imaging of the intensity and wavelength. The above results can be applied to cell analysis, such as multiple fluorescence staining, where multiple fluorescence signals are detected simultaneously. [Display omitted] • Current readout method and pixel structure for filter-free wavelength image sensor. • Integral-type wavelength imaging system constructed. • Linear light intensity and wavelength response confirmed using LED light sources. • Spatial imaging of light intensity and wavelength information done simultaneously. [ABSTRACT FROM AUTHOR]

In this paper, we present a new logarithmic pixel design currently under development at New Imaging Technologies SA (NIT). This new logarithmic pixel design uses charge domain logarithmic signal compression and charge-transfer-based signal readout. This structure gives a linear response in low light conditions and logarithmic response in high light conditions. The charge transfer readout efficiently suppresses the reset (KTC) noise by using true correlated double sampling (CDS) in low light conditions. In high light conditions, thanks to charge domain logarithmic compression, it has been demonstrated that 3000 electrons should be enough to cover a 120 dB dynamic range with a mobile phone camera-like signal-to-noise ratio (SNR) over the whole dynamic range. This low electron count permits the use of ultra-small floating diffusion capacitance (sub-fF) without charge overflow. The resulting large conversion gain permits a single photon detection capability with a wide dynamic range without a complex sensor/system design. A first prototype sensor with 320 × 240 pixels has been implemented to validate this charge domain logarithmic pixel concept and modeling. The first experimental results validate the logarithmic charge compression theory and the low readout noise due to the charge-transfer-based readout. [ABSTRACT FROM AUTHOR]

A CMOS implantable chip with 256 active pixel sensors (APSs), on-chip photovoltaic cells, and iridium-oxide (IrOx) electrodes is proposed and designed for subretinal prostheses. In the proposed chip, the on-chip electrode surface is deposited with IrOx by RF sputtering and photolithography patterning. The divisional power supply scheme (DPSS) is adopted to generate sufficient stimulation current whereas the APS is used to enhance the image sensitivity. The proposed chip consists of a 16 × 16 photodiode array with 8 DPSS divisions, control signal generator circuits, and photovoltaic cells. It is designed and fabricated into 180 nm CMOS image sensor (CIS) technology and postprocessed with an IrOx coating. From the electrical measurement results, the fabricated chip has a peak output stimulation current of 16.7 µA under the equivalent electrode impedance load. The stimulation frequency is 30.2 Hz and the amount of injected charges at each pixel is 3.5 nC. Both image light sensitivity and injection charges are significantly improved. The surface morphology, crystallinity, charge storage capacity, and biocompatibility of sputtering iridium oxide film (SIROF) were investigated. As a result, the SIROF has desirable physical and electrochemical properties that make it suitable for the neurostimulation electrodes on the 256-pixel implantable chip. The 7-month biocompatibility and charge delivery capability of the fabricated chip have been confirmed by electroretinography (ERG) measurement on a Lanyu minipig in in vivo animal tests. [ABSTRACT FROM AUTHOR]

To respond to the high demand for high dynamic range imaging suitable for moving objects with few artifacts, we have developed a single-exposure dynamic range image sensor by introducing a triple-gain pixel and a low noise dual-gain readout circuit. The developed 3 μm pixel is capable of having three conversion gains. Introducing a new split-pinned photodiode structure, linear full well reaches 40 ke-. Readout noise under the highest pixel gain condition is 1 e- with a low noise readout circuit. Merging two signals, one with high pixel gain and high analog gain, and the other with low pixel gain and low analog gain, a single exposure dynamic rage (SEHDR) signal is obtained. Using this technology, a 1/2.7", 2M-pixel CMOS image sensor has been developed and characterized. The image sensor also employs an on-chip linearization function, yielding a 16-bit linear signal at 60 fps, and an intra-scene dynamic range of higher than 90 dB was successfully demonstrated. This SEHDR approach inherently mitigates the artifacts from moving objects or time-varying light sources that can appear in the multiple exposure high dynamic range (MEHDR) approach. [ABSTRACT FROM AUTHOR]

This paper describes an RGB-infrared (IR) organic CMOS image sensor with electrically controllable IR sensitivity. The sensitivities of all the pixels in the image sensor, which has the structure of two directly stacked organic layers with a high resistance ratio, are simultaneously controlled by changing the applied voltage to the organic films. The fabricated image sensor, with a pixel pitch of 3~\mu \textm , has 2.1 Mpixels (1920 $\times $ 1080) in both the RGB and IR regions. The sensor can switch between color imaging and IR imaging modes frame by frame without requiring a mechanically retractable IR-cut filter. [ABSTRACT FROM AUTHOR]

This paper proposes a new solution of an ultra-low-energy analog comparator, dedicated to slope analog-to-digital converters (ADC), particularly suited for CMOS image sensors (CISs) featuring a large number of ADCs. For massively parallel imaging arrays, this number may be as high as tens-hundreds of thousands ADCs. As each ADC includes an analog comparator, the number of these comparators in CIS is always high. Detailed analysis shows that power dissipation of a comparator contributes significantly to a total power consumption of an ADC. Thus, minimization of the comparator energy consumption during the analog-to-digital (A/D) conversion of an image frame is crucial for design of CMOS image sensors. Compared to classical dynamic or continuous-time comparators operating in the slope ADC, under the same bias conditions, the proposed comparator shows a 2-3 orders of magnitude reduction of the power consumption. In addition, the proposed topology shows a simple and compact layout and does not require a power-down mechanism. The circuit has been simulated in detail for a 0.18- $$\upmu $$ m CMOS technology under two different power supply voltages of 1.8 and 1 V. While implemented in a 12-bit slope ADC of a massively parallel CIS, operating at a speed 1000 fps, the energy required for A/D conversion is 0.5 pJ. [ABSTRACT FROM AUTHOR]

In this paper, we present a 4-Mpixel high dynamic range (DR), low dark noise CMOS image sensor. The pixel design is based on a 4-T PPD structure, with one dedicated High Dynamic Range transistor added in serial with the reset transistor for changing the conversion factor during readout to enhance the DR. A low-power ramp counting Analog to Digital Convertor array is implemented to suppress the structure noise and decrease the power consumption. Measurement results show that when the sensor is operated at a full speed of 47 fps, DR of 87 dB, and dark noise of less than 2e− can be achieved. Also the proposed low-power counting method has a dramatic reduction in the current consumed by the column counters during the ADC operation compared with previous documented methods. [ABSTRACT FROM PUBLISHER]

Multilevel transmission of the CMOS image sensor-based visible light communication to improve the data capacity causes some problems, such as increasing the transmitter (Tx) complexity, indicating the nonlinearity at Tx, and creating the requirement for a precise thresholding method in the receiver. We propose an optical pulse width modulated multilevel transmission scheme based on binary-level signaling in the Tx to relax these problems. We experimentally demonstrated nine kbps error-free light-emitting diodes visible light wireless transmission using a CMOS image sensor and binary-level Tx in the proposed schemes. [ABSTRACT FROM PUBLISHER]