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Wie können Vakuum- und Dünnschichttechnologien zur Entwicklung von smarten, energiesparenden Wearables beitragen? Forschende am Fraunhofer FEP nutzen Rolle-zu-Rolle-Verfahren, Präzisionsbeschichtung, organische Elektronik und cleveres IC-Design für vielfältige Aspekte rund um tragbare Elektronik der Zukunft.

ISBN: 0818675454; Fault tolerance has become a major concern in the design of VLSI systems. It is especially needed in finite state machines (FSMs) where a failure can have huge consequences on the whole circuit behavior. Several methods have been proposed in the last few years to implement such features in FSMs synthesized on standard cells. At the same time, considering circuit cost, performances and design efficiency, it has been shown that large controllers should rather be synthesized on a particular ROM-based architecture. The work presented here has consisted in studying, implementing and evaluating fault tolerance methods in FSMs in a ROM-based synthesis flow.

ALFA (America-Latina Formacion Academica) is a programme of the European Community started in 1994 with the aim of improving the potential in scientific, technologic and academic domains in Latin American countries, by means of high level training actions and knowledge transfer, promoting education and research. This short paper presents the activities performed by a network of five institutions within the frame of the ALFA program from the European Community. This network, called HUERTA, focuses, with training and research, on design, synthesis and test of integrated circuits and systems.

International audience; Thermal issues are becoming increasingly serious with the scaling down of integrated circuits and the increasing density brought in by advanced packaging techniques. Consequently, thermal issues need to be considered during both design and test. The present paper addresses thermal testing, and more specifically thermal transient testing.

FPGAs today displace ASICs programmed by the semiconductor manufacturer in many cases. Besides low initial costs especially the possibility of simple changes offers advantages against ASICs. However, there are a lot of applications where at least for volume production a switch over to mask programmed ASICs should be considered.

The purpose of this document is to look at different facets of the development of integrated circuits and systems: CAD from industrial and research viewpoints, and manufacturing cost and its consequences on the development of packaging techniques. Dependability evolution and trends are developed with respect to design verification, production testing and concurrent testing. Also trends in design and technology are addressed, as well as semiconductor technology vs. architecture and European perspectives. A conclusion summarizes the main issues.

Die Verwendung von ASIC in neuentwickelten Produkten mittelständischer Unternehmen hat bisher nur zögernd stattgefunden. Die Gründe für dieses Verhalten sind bekannt. Jetzt werden neue Wege angeboten, um diese Zurückhaltung der Unternehmen zu überwinden. Damit soll die Akzeptanz und die Anwendung von ASIC bei kleinen und mittleren Unternehmen gesteigert und die Wettbewerbsfähigkeit Europas erhalten bzw. verbessert werden.

Moderne Systeme sind gekennzeichnet durch Kompaktheit, hohe Leistungsfähigkeit und Zuverlässigkeit. Ein wesentlicher Grund hierfür ist der Einsatz anwendungsspezifischer integrierter Schaltungen (ASICs) wie Gate Arrays und Zellen-ICs, die dem Entwickler erlauben, für die jeweilige Anwendung optimierte integrierte Schaltungen zu entwickeln. Die Vor- und Nachteile kundenspezifischer integrierter Schaltungen und ihre Eigenschaften, die zur Verfügung sehenden Entwurfswerkzeuge und Technologien sowie der Entwurfsablauf sind Gegenstand zahlreicher Veröffentlichungen, die in dem Artikel kurz zusammengefaßt werden.

ISSN: 0143-7089; An approach to state functional diagnoses when testing complex integrated circuits is presented. Such an approach can lead in some cases to low-level fault localisation. Experiments using the capabilities of a realised test system (GAPT test program generator, specific tester), illustrating the efficiency of this approach, are presented.