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Multilevel Inverters (MLIs) are becoming more and more popular in medium and high power applications. This is due to several inherent advantages of MLI over two-level inverters such as high-quality output, lower device ratings, and several others. While the classical topologies are still having applications in most of the key areas, there is a growing interest in newer multilevel topologies with an objective of reducing power semiconductor device count, gate drivers and/or isolated DC sources. In this paper, a comprehensive review of some of the recently proposed newer multilevel inverter topologies with the abovementioned objectives is presented. In this article, a detailed investigation in terms of total power semiconductor switch count, number of DC sources, passive component requirement, highest switch voltage rating, total standing voltage etc. has been presented.

In recent years, piezoelectric materials have been widely investigated for harvesting energy from ambient vibrations. A vibrating piezoelectric device (PD) generates alternating current (AC), which needs to be converted into direct current (DC) for powering electronic devices or for storage. A traditional full-wave bridge rectifier (FBR) interface circuit serves this purpose, but it suffers from high power loss due to the presence of high forward voltage across the diodes. In this article, an improved H-Bridge rectifier circuit is proposed as the AC-DC rectifier circuit to reduce power loss for high frequency and low amplitude application. The performance of the proposed rectifier circuit was experimentally studied, analysed and discussed. Two different testing scenarios for high frequency, namely, varying input power with fixed excitation frequency and varying excitation frequency with fixed input voltage were considered. Applicability of the circuit at low frequency range was also investigated. The outcome shows that the proposed circuit notably increases the voltage and the power produced from the PD when compared to traditional FBR circuits.

This paper proposes a new topology of the switched-capacitor multilevel inverter (SCMLI) for photovoltaics system, which can eliminate the leakage current. In the proposed topology, the capacitors are employed as a virtual DC power supply to boost the input voltage. Here, all capacitors are charging equal to DC source, thus, just one DC source is needed to achieve the staircase waveform. In this structure in order to make the negative levels, the capacitors are connected to the output in reverse polarity. Thus, the H-bridge circuit which is used in traditional SCMLI to build zero and negative voltage levels and leads a variable common mode voltage is removed. Due to the direct connection of the neutral terminal of the grid to the negative polarity of the PV; then this topology can eliminate the leakage current. In addition, the topology has an excellent ability to path the reverse current as well as an acceptable output waveform spectrum. The operating states of all components and loss calculations are analyzed and formulated accurately as well as simulated by using MATLAB-SIMULINK software. To confirm the performance of the proposed topology; a 500 W prototype is built and experimental results are presented.

An inverter circuit is promoted in this paper, using series-connected switched dc sources along with an H-bridge circuit with optimized circuit elements like switching devices and diode clamped (DC) sources. This configuration uses DC supplies that can be strung together in series to create a significant voltage level. This topology consists of two parts, namely: 1) level production part and 2) polarity production part. The combination of some of the dc sources and switching devices completes the level production part. The H-bridge in the presented structure produces the polarity generation part. The DC-link capacitors are not needed in this design. There is a full presentation of the operating modes and modeling process of the proposed converter. Finally, in the MATLAB/SIMULINK setting the proposed topology is simulated and output current and voltage results have been examined.

SGS-2021-021 A new universal multi H-bridge converter is introduced in this paper. The main purpose of proposed universal converter is simple testing of modular multilevel topologies as CHB and M2LC topology. The whole converter is designed to fit a standard 2U height 19” rack mount enclosure. The converter consists of four 5 kW power cards with H-bridge IGBT modules. There are front and back panels in the converter construction dedicated to connecting a control unit, necessary quantities signaling, and enabling different and modular topology configurations using power terminals interconnection. The converter is also equipped with inevitable protections and measurements

In this paper, we propose a new control algorithm for a novel fully digital-controlled H-bridge DC-DC converter, which can output the power in both boost and buck mode by only rewriting three digital codes: input voltage, output voltage, and maximum load current. In addition, the proposed algorithm improves the transient response.

The difference in power cell irradiances in cascaded multilevel converters results in different duty cycles among those cells when maintaining the maximum power point tracking (MPPT). However, the difference in cell duty cycles is undesired since it is proportional to the output voltage and current distortions. To this regard, a multilevel topology for photovoltaic (PV) applications is proposed, where an H6 bridge power cell is used instead of an H-bridge one. In case of solar irradiance mismatch among the power cells, the proposed converter injects power with lower voltage from the shaded cells without altering the PV voltage; hence maintaining the MPPT operation. This modification allows us to retain an equal duty cycle in all the power cells whatever the meteorological conditions are present; consequently, maintaining good output voltage and current waveform qualities. To test the effectiveness of the proposed solution, a detailed simulation model as well as an experimental prototype is built. The obtained results show that the proposed topology provides significantly improved output voltage and current qualities compared to the cascaded H-bridge one. The performance of the proposed topology compared to one offering improved harmonics performance, according to the European efficiency, has been also compared, where an enhancement of 2.64% has been registered.

WOS: 000429409200010, In this paper, a novel four-level flying capacitor inverter and its comparison with the conventional flying capacitor topology in terms of THD analysis are proposed. This new topology have some advantages over conventional one as following: The blocking voltages are the same for all switches used in the configuration, there is no need for capacitor midpoint connection and this eliminates low frequency current which circulate in dc-link capacitors, and the number of flying capacitor is reduced as compared with conventional form of it. The operation of the topology, modulation strategy, simulation results, and THD analysis for the output waveforms are presented in this paper., Aksaray University [2016-031], This work has been supported by Research Fund of the Aksaray University. Project Number: 2016-031.

This article presents a carrier-based pulse-width modulation (PWM) template for a 5-level, H bridge-based cascaded multilevel inverter (MLI). The developed control concept generates adequate modulation template for this inverter topology wherein a sinusoidal modulating waveform is modified to fit in a single triangular carrier signal range. With this modulation approach, classical multiplicity and synchronization of the triangular carrier signals criterion for the extension of sinusoidal pulse-width modulation, SPWM, to several cascaded 5-level, H-bridge-based MLI topology are removed. The proposed template can be used on the inverter configuration of any level with no further control modification. Nearly even distribution of switching pulses and equalized individual cascaded cell output power were achieved with the proposed modulation scheme. Three 5-level, H-bridge-based MLI units were cascaded for 1-phase, 13-level inverter operation; simulation and experimental results are adequately presented.

In this paper, the compensation of voltage sags and swells using a dynamic voltage restorer (DVR) based on a bi-directional AC/AC converter is presented for stabilizing single-phase AC line voltage. The H-bridge AC/AC converter with bi-directional switches and without bulk capacitor is adopted as the power topology of the proposed system. The proposed novel topology of DVR is adopted to compensate both voltage sag and swell conditions. Additionally, the power factor is closed to unity because a bulk capacitor is not required. The inner and outer loop control is proposed to improve the response with gain scaling, gain control is adopted to reduce the overshoot. Finally, a 2 kVA prototype has been implemented to verify the performance and accuracy of the control method for the DVR system. The peak efficiency of the system is up to 94%, and it can compensate 50% voltage swells and 25% voltage sags.

This paper presents a MATLAB/Simulink model for a 9-level cascaded H-bridge multilevel inverter with mismatched DC voltage sources. The impact of mismatched DC voltage sources on the performance of the 9-level CHBMI is investigated. Due to the mismatched voltages among DC voltage sources, the output fundamental voltage is different from the input reference voltage. To address this problem, a switching-angle calculation technique that accounts for mismatched as well as varying DC voltage sources is demonstrated. The switching angles obtained using this technique is able to produce the desired output fundamental voltage for a wide range of input reference voltages. Since this switching-angle calculation technique does not require complex iterative computation, it has the potential for real-time implementation.

This paper presents a grid connected multilevel topology for photovoltaic (PV) systems. Usually, multilevel converters for PV application suffer from a distorted output current and voltage when the submodules are not subjected to an even solar irradiance. The difference in submodules irradiance results in different submodules duty cycles when maintaining the maximum power point tracking (MPPT). The distortion of the output current is proportional with the difference of the cells duty cycles. To this regard, a multilevel topology for PV applications is proposed along with a control and modulation strategy. In this proposed topology, H6 bridge-based cell is used instead of an H-bridge one. In case of solar irradiance mismatch, the proposed converter injects power with less voltage from the shaded cells without altering the PV voltage, and hence, the MPPT. This modification allows retaining a tantamount duty cycle in all cells whatever the meteorological conditions are present. To test the effectiveness of the proposed idea, a detailed simulation model was set up. The results show that the proposed concept provides a significantly improved output current quality compared to the cascaded H-bridge topology.

Multilevel inverters are proficient in achieving a high-quality staircase output voltage waveform with a lower amount of harmonic content. In this paper, a new hybrid multilevel inverter topology based on the T-type and H-bridge module is presented. The proposed topology aims to achieve a higher number of levels utilizing a lower number of switches, direct current (dc) voltage sources, and voltage stresses across different switches. The basic unit of the proposed single T-type and double H-bridge multilevel inverter (STDH-MLI) produces 15 levels at the output using three dc voltage sources. The proposed topology can be extended by connecting a larger number of dc voltage sources in the T-type section. The nearest level control (NLC) switching technique is used to generate gate pulses for switches to achieve a high-quality output voltage waveform. In addition, a simplified way to achieve NLC is also described in the paper. A detailed comparison with other similar topologies is provided to set the benchmark of the proposed topology. Finally, experimental work is carried out to validate the performance of the proposed topology.

A novel single-phase nine-level boost inverter is proposed in this paper. The proposed inverter has an output voltage which is higher than the input voltage by switching capacitors in series and in parallel. The maximum output voltage of the proposed inverter is determined by using the boost converter circuit, which has been integrated into the circuit. The proposed topology is able to invert the multilevel voltage with the high step-up output voltage, simple structure and fewer power switches. In this paper, the circuit configuration, the operating principle, and the output voltage expression have been derived. The proposed converter has been verified by simulation and experiment with the help of PSIM software and a laboratory prototype. The experimental results match the theoretical calculation and the simulation results.

This paper deals with a “learn by doing” approach applied to teach power electronics. A full-Bridge converter is used as a workbench for the laboratory activities of the power electronics class. In the proposed paper, the H-Bridge is the fundamental building block to explain the most important power electronics topics in several operative conditions and with different topologies. An H-Bridge with an LCL load is considered, to realize, rearranging the topology, basic DC-DC converter solutions such as Buck, Boost and Buck-Boost. A user-friendly software and hardware set-up is realized to investigate both switching performances and control technique of several converter topologies. The proposed experimental teaching system allows an effective method to acquire the most important power electronics notions through a learn by doing method.

This paper presents a multilevel topology of photovoltaic (PV) system with integrated energy storage system (ESS). In this proposed topology, half of the cells are connected to PV panels, the rest are connected to batteries. The sum of the cells are connected in series to form a dc-link, which is then connected to an H-bridge to convert the dc voltage to an ac one. The advantage of the proposed topology compared to the modular multilevel converter (MMC) as well as compared to the cascaded H-bridge converter is that less active switches are needed here. More switches are saved as the level of the output voltage increases, which results to a cheaper and less sizable converter. A local maximum power point tracking (MPPT) algorithm is proposed for this converter, which requires the voltage and current of each sub-module. Hence, there are no losses related to partial shading effect here. The excess of power in case of high irradiation levels is stored in the batteries, and is recovered when needed. A detailed simulation program has been built to test the effectiveness of the proposed converter; the obtained results are shown in the paper.

This paper presents a design methodology for a dc-dc power conversion system (PCS) for battery packs. The methodology provides with an optimal design of the PCS and the associated inductive-capacitive filter interfacing the battery pack with the PCS. The PCS adds superior capability over conventional designs, which is performing current and voltage perturbations at the battery terminals for the so-called electrochemical impedance spectroscopy (EIS). This technique is an option for battery state-of-charge (SoC) and state-of-health (SoH) assessment. The design is optimal in the sense that it minimizes volume and system power losses. Such multi-objective optimization is addressed adopting the theory of weighted sum and Pareto front. The methodology is tested through a case study, addressing a lithium-ion battery pack. The offered analyses permit to identify the impact in system performance of diverse design variables such as dc-link voltage for the PCS and its switching frequency.

This paper discusses the impact of small dc capacitance in a motor drive using a floating capacitor H-bridge topology. The proposed topology is intended for applications where variable frequency control is not required. Special attention is paid on investigating the second-order dc capacitor voltage ripples, whose influence on the induction motor as well as on the motor drive itself is of importance. This issue is addressed in this paper through rigorous mathematical formulations. It is found that by inverting the second-order dc ripple voltage using the conventional SVPWM, no harmful harmonics will be generated in the motor line voltage. This demonstrates the possibility of drastically reducing the dc capacitance of the proposed system. Induction motor as well as H-bridge performance with respect to different dc capacitance values is demonstrated by experiments, which lays the foundation for cost reduction and reliability enhancement of the proposed system.

Designing a switched-mode power supply includes the calculation of the loss in all of the different components: inductor, transformer, switches and capacitors.By combining all of the loss calculations, and providing a graphical user interface to the designer, the designer is able to get an understanding of the loss distribution and thereby the influence of each component on the complete design.

International audience; In this paper, an open-switch fault diagnosis method for five-level H-Bridge Neutral Point Piloted (HB-NPP) or T-type converters is proposed. While fault tolerant operation is based on three steps (fault detection, fault localization and system reconfiguration), a fast fault diagnosis, including both fault detection and localization, is mandatory to make a suitable response to an open-circuit fault in one of the switches of the converter. Furthermore, fault diagnosis is necessary in embedded and safety critical applications, to prevent further damage and perform continuity of service.In this paper, we present an open-switch fault diagnosis method, based on the switches control orders and the observation of the converter output voltage level. In five-level converters such as HB-NPP and T-type topologies, some switches are mostly 'on' at the same time. Therefore, the fault localization is quite complicated. The fault diagnosis method we proposed is capable to detect and localize an open-switch fault in all cases. Computer simulations are carried out by using Matlab Simulink and SimPowerSystem toolbox to validate the proposed approach.

Single-stage H-bridge grid-connected inverters are considered as a simple, compact, and economic topology compared with double-stage converters. A maximum power point tracking (MPPT) control is necessary in photovoltaic (PV) generation system to extract maximum power from the PV arrays. Many MPPT techniques have been proposed and discussed in the literature. Among them, the ripple correlation control (RCC) algorithm is fast and effective, particularly suitable for single-phase configurations since it uses as perturbation the embedded oscillation of dc current and dc voltage at twice of grid frequency (e.g., 100 Hz). The main drawback of this method is the unstable behavior during sudden variation of sun irradiance, where the conventional RCC gives wrong estimation of the power derivative (dP/dV), causing wide dc voltage and dc current overshoots. To overcome this problem, a hybrid RCC-constant voltage regulator algorithm combined to a high-peformance dq grid current controller is proposed to improve the transient performance. The whole grid-connected photovoltaic generation scheme has been implemented numerically by MATLAB/Simulink, verifying steady-state and dynamic performances under different sun irradiance transients. The comparison with the corresponding behavior of a standard RCC algorithm emphasized the effectiveness of the proposed hybrid RCC controller.

In this paper the complete analysis of the dc-link voltage ripple is given for single-phase H-bridge PWM inverters. The dc voltage ripple amplitude is analytically determined as a function of the modulation index and the load phase angle, considering both the switching frequency component and the double fundamental frequency component (i.e. 100 Hz). Peak-to-peak distribution, maximum amplitude, and rms values of the voltage switching ripple over the fundamental period are analytically determined and numerically verified by numerical simulations carried out by Matlab/Simulink. Simple and effective guidelines to design the dc-link capacitor are given on the basis of the dc-voltage ripple requirements.

The increasing integration of large solar PV and wind farms into the power grid has fueled, over the past two decades, growing demands for high-power, high-voltage, utility-scale inverters. Multilevel inverters have emerged as the industry’s choice for megawatt-range inverters because of their reduced voltage stress, capability for generating an almost-sinusoidal voltage, built-in redundancy and other benefits. This paper presents a novel switched-source multilevel inverter (SS MLI) architecture. This new inverter shows superior capabilities when compared to existing topologies. It has reduced voltage stress on the semiconductor, uses fewer switches (i.e., reduced size/weight/cost) and exhibits increased efficiency. The proposed SS MLI is comprised of two voltage sources ( V 1 , V 2 ) and six switches. It is capable of generating five-level output voltage in symmetric mode (i.e., V 1 = V 2 ) and seven-level output voltage in asymmetric mode (i.e., V 1 ≠ V 2 ). We present simulations results (using MATLAB®/Simulink®) for five- and seven-level output voltages, and they strongly support the validity of the proposed inverter. These positive results are further supported experimentally using a laboratory prototype.

This paper presents and compares control strategies for three-phase open-end winding drives operating in the flux-weakening region. A six-leg inverter with a single dc link is associated with the machine in order to use a single energy source. With this topology, the zero-sequence circuit has to be considered since the zero-sequence current can circulate in the windings. Therefore, conventional overmodulation strategies are not appropriate when the machine enters in the flux-weakening region. A few solutions dealing with the zero-sequence circuit have been proposed in the literature. They use a modified space vector modulation or a conventional modulation with additional voltage limitations. This paper describes the aforementioned strategies, and then, a new strategy is proposed. This new strategy takes into account the magnitudes and phase angles of the voltage harmonic components. This yields better voltage utilization in the dq frame. Furthermore, inverter saturation is avoided in the zero-sequence frame, and therefore, zero-sequence current control is maintained. Three methods are implemented on a test bed composed of a three-phase permanent-magnet synchronous machine, a six-leg inverter, and a hybrid digital signal processor /field-programmable gate array controller. Experimental results are presented and compared for all strategies. A performance analysis is conducted as regards the region of operation and the machine parameters.

In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topol- ogy is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamen- tal) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This fea- ture improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor.

This paper proposes a single leg switched or a hybrid PWM (HPWM) method for three-phase three-level HBridge Voltage Source Converters (3L-HB-VSCs). By means of the proposed modulation, a 3L-HB-VSC can generate the same output as a three-level neutral point clamped (3L-NPC) VSC with phase disposition (PD) PWM provided that the outputs of 3L-HBVSC are isolated by transformers or connected to open winding machines. Thus, the proposed method is called PD-HPWM. Moreover, it is emphasized that 3L-HB-VSC with HPWM utilizes its switches similar to 3L-NPC-VSC. Compared to 3L-NPC-VSCs, 3L-HB-VSCs (without neutral point clamping diodes) have simpler, more modular, and more reliable 2L circuit structure. Therefore, this method encourages the use of 3L-HB-VSCs in the applications utilizing transformers such as grid-side converters of multi-MW wind turbines. The proposed PWM method’s performance is demonstrated by the simulations of a 6MW wind turbine’s grid connection and experimentally verified via a smallscale prototype.

Global warming is already having significant and costly effects on our communities, our health, and our climate. Nowadays, In developing countries (G20) around the world, decisions are being considered and a shifting of our dependence from fossil fuels to renewable energy sources (RES). Among RES solar energy, specially photovoltaic system (PV) play a key role in this challenge, thus, this paper provides a comparative study on the performances of three transformer-less inverters for photovoltaic applications (H-Bridge, H5, HERIC and NPC inverters) in terms of power losses, considering the use of different kinds of switches. Silicon (Si) and Silicon Carbide (SiC) diodes have been combined with two topologies of IGBTs in the performed tests. Simulation results have been obtained for each of the systems in different operating conditions by using PLECS software. Power losses and European Efficiency (EE) have been calculated for all the topologies, taking into account the real characteristics of the switches by using the thermal models provided by the software library.