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Quantum mechanical calculations for material modeling using Kohn–Sham density functional theory (DFT) involve the solution of a nonlinear eigenvalue problem for N smallest eigenvector-eigenvalue pairs, with N proportional to the number of electrons in the material system. These calculations are computationally demanding and have asymptotic cubic scaling complexity with the number of electrons. Large-scale matrix eigenvalue problems arising from the discretization of the Kohn–Sham DFT equations employing a systematically convergent basis traditionally rely on iterative orthogonal projection methods, which are shown to be computationally efficient and scalable on massively parallel computing architectures. However, as the size of the material system increases, these methods are known to incur dominant computational costs through the Rayleigh–Ritz projection step of the discretized Kohn–Sham Hamiltonian matrix and the subsequent subspace diagonalization of the projected matrix. This work explores the potential of polynomial expansion approaches based on recursive Fermi-operator expansion as an alternative to the subspace diagonalization of the projected Hamiltonian matrix to reduce the computational cost. Subsequently, we perform a detailed comparison of various recursive polynomial expansion approaches to the traditional approach of explicit diagonalization on both multi-node central processing unit and graphics processing unit architectures and assess their relative performance in terms of accuracy, computational efficiency, scaling behavior, and energy efficiency. [ABSTRACT FROM AUTHOR]

When performing high-resolution imaging with ground-based synthetic aperture radar (GB-SAR) systems, the data collected and processed are vast and complex, imposing higher demands on the real-time performance and processing efficiency of the imaging system. Yet a very limited number of studies have been conducted on the real-time processing method of GB-SAR monitoring data. This paper proposes a real-time imaging scheme based on parallel processing models, optimizing each step of the traditional  ω K imaging algorithm in parallel. Several parallel optimization schemes are proposed for the computationally intensive and complex interpolation part, including dynamic parallelism, the  G r o u p - N s t r e a m  processing model, and the  F t h r e a d - G r o u p - N s t r e a m  processing model. The  F t h r e a d - G r o u p - N s t r e a m  processing model utilizes  F t h r e a d ,  G r o u p , and  N s t r e a m  for the finer-grained processing of monitoring data, reducing the impact of the nested depth on the algorithm's performance in dynamic parallelism and alleviating the issue of serial execution within the  G r o u p - N s t r e a m  processing model. This scheme has been successfully applied in a synthetic aperture radar imaging system, achieving excellent imaging results and accuracy. The speedup ratio can reach 52.14, and the relative errors in amplitude and phase are close to 0, validating the effectiveness and practicality of the proposed schemes. This paper addresses the lack of research on the real-time processing of GB-SAR monitoring data, providing a reliable monitoring method for GB-SAR deformation monitoring. [ABSTRACT FROM AUTHOR]

In this paper, a numerical model coupling the smoothed particle hydrodynamics (SPH) with peridynamics (PD) is developed to solve the problem of the hydroelastic water entry. By combining the geometric nonlinear peridynamics with the weakly compressible SPH, the proposed model can efficiently simulate the nonlinear deformation of the structure and the deformation of a fluid free surface. The transmission of information between the fluid and solid phases is implemented by a dummy particle boundary treatment method. By simulating benchmark tests, the ability of the proposed model to solve nonlinear fluid–structure coupling problems is verified. In order to improve the computational efficiency, the graphics processing unit parallel acceleration scheme is applied to the SPH-PD model. Compared with the serial scheme, the speedup effect of the parallel scheme in large-scale computation is verified. As an application of the numerical model, the water entry of the flexible panel at a constant entry velocity is studied. The mechanism of hydroelastic effect is explained by analyzing the variations in the fluid pressure field, slamming force, and panel deformation during water entry. In addition, the influences of plate rigidity, impact velocity, and deadrise angle on the hydroelastic effect are investigated. [ABSTRACT FROM AUTHOR]

Numerical radiation-hydrodynamics (RHD) for non-relativistic flows is a challenging problem because it encompasses processes acting over a very broad range of time-scales, and where the relative importance of these processes often varies by orders of magnitude across the computational domain. Here, we present a new implicit–explicit method for numerical RHD that has a number of desirable properties that have not previously been combined in a single method. Our scheme is based on moments and allows machine-precision conservation of energy and momentum, making it highly suitable for adaptive mesh refinement applications; it requires no more communication than hydrodynamics and includes no non-local iterative steps, making it highly suitable for massively parallel and Graphics Processing Unit (GPU)-based systems where communication is a bottleneck; and we show that it is asymptotically accurate in the streaming, static diffusion, and dynamic diffusion limits, including in the so-called asymptotic diffusion regime where the computational grid does not resolve the photon mean-free path. We implement our method in the GPU-accelerated RHD code quokka and show that it passes a wide range of numerical tests. [ABSTRACT FROM AUTHOR]

DNA methylation analysis has become an important topic in the study of human health. In previous work, we developed a suite of tools to perform this analysis. It includes HPG-Dhunter, a web-based tool for automatic detection of differentially methylated regions (DMRs) between different samples. The back-end of that tool receives an undefined number of simultaneous requests to detect DMRs on different datasets. Currently, simultaneous requests are queued and processed one at a time. This paper proposes a parallel architecture where multiple daemons serve requests simultaneously. Daemons can also share the same physical GPUs. A scheduler manages requests and forwards them to daemons. The number of daemons per GPU is configurable, thus adapting the architecture to the available hardware. Results show that the proposed parallel architecture hugely reduces the execution time. Furthermore, the speedup increases proportionally to the number of available GPUs (up to 7.47x in our experimental setup). [ABSTRACT FROM AUTHOR]

In the domain of data mining, the extraction of frequent patterns from expansive datasets remains a daunting task, compounded by the intricacies of temporal and spatial dimensions. While the Apriori algorithm is seminal in this area, its constraints are accentuated when navigating larger datasets. In response, we introduce an avant-garde solution that leverages parallel network topologies and GPUs. At the heart of our method are two salient features: (1) the use of parallel processing to expedite the realization of optimal results and (2) the integration of the cat and mouse-based optimizer (CMBO) algorithm, an astute algorithm mirroring the instinctual dynamics between predatory cats and evasive mice. This optimizer is structured around a biphasic model: an initial aggressive pursuit by the cats and a subsequent calculated evasion by the mice. This structure is enriched by classifying agents using their objective function scores. Complementing this, our architectural blueprint seamlessly amalgamates dual Nvidia graphics cards in a parallel configuration, establishing a marked ascendancy over conventional CPUs. In amalgamation, our approach not only rectifies the inherent shortfalls of the Apriori algorithm but also accentuates the extraction of association rules, pinpointing frequent patterns with enhanced precision. A comprehensive evaluation across a spectrum of network topologies explains their respective merits and demerits. Set against the benchmark of the Apriori algorithm, our method conspicuously outperforms in terms of speed and effectiveness, heralding a significant stride forward in data mining research. [ABSTRACT FROM AUTHOR]

Graphics Processing Units (GPUs) are employed for their parallel processing capabilities, which are essential to train deep learning (DL) models with large datasets within a reasonable time. However, the diverse GPU architectures exhibit variability in training performance depending on DL models. Furthermore, factors such as the number of GPUs for distributed training and batch size significantly impact training efficiency. Addressing the variability in training performance and accounting for these influential factors are critical for optimising resource usage. This paper presents a scheduling policy for DL training tasks in a heterogeneous GPU cluster. It builds upon a model-similarity-based scheduling policy by implementing a round-based mechanism and job packing. The round-based mechanism allows the scheduler to adjust its scheduling decisions periodically, whereas job packing optimises GPU utilisation by fitting additional jobs into a GPU that trains a small model. Results show that implementing a round-based mechanism reduces the makespan by approximately 29%, compared to the scenario without it. Additionally, integrating job packing further decreases the makespan by 5%. [ABSTRACT FROM AUTHOR]

Glioma brain tumour is one of the life‐threatening diseases in the world. Tumour substructure segmentation by physicians is a time‐consuming task with the magnetic resonance imaging (MRI) technique due to the size of clinical data. An automatic and well‐trained method is essential to detect and segment the tumour which increase the survival of the patients. The proposed work aims to produce high accuracy on glioma substructures segmentation with less computation time using deep learning. From the literature survey, the following challenges are found: (i) computing complex spatial boundaries between normal and tumour tissues, (ii) feature reduction and (iii) overfitting problems. Hence, we proposed a fully automatic glioma tumour segmentation using a residual‐inception block (RIB) with a modified 3D U‐Net (RIBM3DU‐Net). It includes three phases: pre‐processing, modified 3D U‐Net segmentation and post‐processing. From the results, RIB with U‐Net enhances the segmentation accuracy. GPU parallel architecture reduces the computation time while training and testing. For quantitative analysis, comprehensive experiment results were computed and compared with state‐of‐the‐art methods. It achieves better Dice scores on enhancing tumour, tumour core and complete tumour of 87%, 87% and 94%, respectively. GPU speedup folds yield up to 48× when compared with CPU. Quantitatively, 3D glioma volume is rendered from the obtained segmented results and estimated using the Cavalieri estimator. [ABSTRACT FROM AUTHOR]

The graphics processing unit (GPU) plays a crucial role in boosting application performance and enhancing computational tasks. Thanks to its parallel architecture and energy efficiency, the GPU has become essential in many computing scenarios. On the other hand, the advent of GPU virtualization has been a significant breakthrough, as it provides scalable and adaptable GPU resources for virtual machines. However, this technology faces challenges in debugging and analyzing the performance of GPU-accelerated applications. Most current performance tools do not support virtual GPUs (vGPUs), highlighting the need for more advanced tools. Thus, this article introduces a novel performance analysis tool that is designed for systems using vGPUs. Our tool is compatible with the Intel GVT-g virtualization solution, although its underlying principles can apply to many vGPU-based systems. Our tool uses software tracing techniques to gather detailed runtime data and generate relevant performance metrics. It also offers many synchronized graphical views, which gives practitioners deep insights into GVT-g operations and helps them identify potential performance bottlenecks in vGPU-enabled virtual machines. [ABSTRACT FROM AUTHOR]

The digital era brings up on one hand massive amounts of available data and on the other hand the need of parallel computing architectures for efficient data processing. String similarity evaluation is a processing task applied on large data volumes, commonly performed by various applications such as search engines, biomedical data analysis and even software tools for defending against viruses, spyware, or spam. String similarities are also used in musical industry for matching playlist records with repertory records composed of song titles, performer artists and producers names, aiming to assure copyright protection of mass-media broadcast materials. The present paper proposes a novel GPU-based approach for parallel implementation of the Jaro–Winkler string similarity metric computation, broadly used for matching strings over large datasets. The proposed implementation is applied in musical industry for matching playlist with over 100k records with a given repertory which includes a collection of over 1 million right owner records. The global GPU RAM memory is used to store multiple string lines representing repertory records, whereas single playlist string comparisons with the raw data are performed using the maximum number of available GPU threads and the stride operations. Further on, the accuracy of the Jaro–Winkler approach for the string matching procedure is increased using both an adaptive neural network approach guided by a novelty detection classifier (aNN) and a multiple-features neural network implementation (MF-NN). Thus, the aNN approach yielded an accuracy of 92% while the MF-NN approach achieved an accuracy of 99% at the cost of increased computational complexity. Timing considerations and the computational complexity are detailed for the proposed approaches compared with both the general-purpose processor (CPU) implementation and the state-of-the-art GPU approaches. A speed-up factor of 21.6 was obtained for the GPU-based Jaro–Winkler implementation compared with the CPU one, whereas a factor of 3.72 was obtained compared with the existing GPU implementation of string matching procedure based on Levenstein distance metrics. [ABSTRACT FROM AUTHOR]

Cardiac CINE, a form of dynamic cardiac MRI, is indispensable in the diagnosis and treatment of heart conditions, offering detailed visualization essential for the early detection of cardiac diseases. As the demand for higher-resolution images increases, so does the volume of data requiring processing, presenting significant computational challenges that can impede the efficiency of diagnostic imaging. Our research presents an approach that takes advantage of the computational power of multiple Graphics Processing Units (GPUs) to address these challenges. GPUs are devices capable of performing large volumes of computations in a short period, and have significantly improved the cardiac MRI reconstruction process, allowing images to be produced faster. The innovation of our work resides in utilizing a multi-device system capable of processing the substantial data volumes demanded by high-resolution, five-dimensional cardiac MRI. This system surpasses the memory capacity limitations of single GPUs by partitioning large datasets into smaller, manageable segments for parallel processing, thereby preserving image integrity and accelerating reconstruction times. Utilizing OpenCL technology, our system offers adaptability and cross-platform functionality, ensuring wider applicability. The proposed multi-device approach offers an advancement in medical imaging, accelerating the reconstruction process and facilitating faster and more effective cardiac health assessment. [ABSTRACT FROM AUTHOR]

Ice-sheet flow models capable of accurately projecting their future mass balance constitute tools to improve flood risk assessment and assist sea-level rise mitigation associated with enhanced ice discharge. Some processes that need to be captured, such as grounding-line migration, require high spatial resolution (under the kilometer scale). Conventional ice flow models mainly execute on central processing units (CPUs), which feature limited parallel processing capabilities and peak memory bandwidth. This may hinder model scalability and result in long run times, requiring significant computational resources. As an alternative, graphics processing units (GPUs) are ideally suited for high spatial resolution, as the calculations can be performed concurrently by thousands of threads, processing most of the computational domain simultaneously. In this study, we combine a GPU-based approach with the pseudo-transient (PT) method, an accelerated iterative and matrix-free solution strategy, and investigate its performance for finite elements and unstructured meshes with application to two-dimensional (2-D) models of real glaciers at a regional scale. For both the Jakobshavn and Pine Island glacier models, the number of nonlinear PT iterations required to converge a given number of vertices (N) scales in the order of O(N1.2) or better. We further compare the performance of the PT CUDA C implementation with a standard finite-element CPU-based implementation using the price-to-performance metric. The price of a single Tesla V100 GPU is 1.5 times that of two Intel Xeon Gold 6140 CPUs. We expect a minimum speedup of at least 1.5 times to justify the Tesla V100 GPU price to performance. Our developments result in a GPU-based implementation that achieves this goal with a speedup beyond 1.5 times. This study represents a first step toward leveraging GPU processing power, enabling more accurate polar ice discharge predictions. The insights gained will benefit efforts to diminish spatial resolution constraints at higher computing performance. The higher computing performance will allow for ensembles of ice-sheet flow simulations to be run at the continental scale and higher resolution, a previously challenging task. The advances will further enable the quantification of model sensitivity to changes in upcoming climate forcings. These findings will significantly benefit process-oriented sea-level-projection studies over the coming decades. [ABSTRACT FROM AUTHOR]

As the volume of satellite images increases rapidly, unsupervised classification can be utilized to swiftly investigate land cover distributions without prior knowledge and to generate training data for supervised (or deep learning-based) classification. In this study, an inter-image k-means clustering algorithm (IIkMC), as an improvement of the native k-means clustering algorithm (kMC), was introduced to obtain a single set of class signatures so that the classification results could be compatible among multiple images. Because IIkMC was a computationally intensive algorithm, parallelized approaches were deployed, using multi-cores of a central processing unit (CPU) and a graphics processing unit (GPU), to speed up the process. kMC and IIkMC were applied to a series of images acquired in a PlanetScope mission. In addition to the capability of the inter-image compatibility of the classification results, IIkMC could settle the problem of incomplete segmentation and class canceling revealed in kMC. Based on CPU parallelism, the speed of IIkMC improved, becoming up to 12.83 times better than sequential processing. When using a GPU, the speed improved up to 25.53 times, rising to 39.00 times with parallel reduction. From the results, it was confirmed IIkMC provided more reliable results than kMC, and its parallelism could facilitate the overall inspection of multiple images. [ABSTRACT FROM AUTHOR]

The Craig–Bampton (CB) method is a well-known substructuring technique that reduces the size of a finite element model (FEM) using a set of vibration modes. For large FEA models, the reduction process could be computationally expensive since it requires algebra operations on FEM mode shapes and FEM system sparse matrices. In this paper, we investigate the potential of usage of GPU parallel processing to speed up solving the system of linear equations that results from the CB reduction process made for a model of cyclic structures. A Python based high-level approach, employing the CuPy, GinkGo and STRUMPACK libraries on the GPU, is compared with an optimized Fortran code. In side-to-side comparisons, employing the same inputs, the Python-GPU code is run on a single GPU device and the Fortran code is run on a multi-core compute node. The CB reduction process was split into several parts, each dealing with different kind of algebraic formulation of the problem. Performance comparisons were focused on the sparse system linear solver, since it turned out to be the most time-consuming part. The results suggest that the current GPU-based linear sparse solvers do not surpass the state-of-the-art CPU-based MKL PARDISO solver (at least up to 1M DOFs). [ABSTRACT FROM AUTHOR]

As the development of high-performance computing (HPC) is growing, exascale computing is on the horizon. Therefore, it is imperative to develop parallel systems, such as graphics processing units (GPUs) and programming models, that can effectively utilise the powerful processing resources of exascale computing. A tri-level programming model comprising message passing interface (MPI), compute unified device architecture (CUDA), and open multi-processing (OpenMP) models may significantly enhance the parallelism, performance, productivity, and programmability of the heterogeneous architecture. However, the use of multiple programming models often leads to unexpected errors and behaviours during run-time. It is also difficult to detect such errors in high-level parallel programming languages. Therefore, this present study proposes a parallel hybrid testing tool that employs both static and dynamic testing techniques to address this issue. The proposed tool was designed to identify the run-time errors of C++ and MPI + OpenMP + CUDA systems by analysing the source code during run-time, thereby optimising the testing process and ensuring comprehensive error detection. The proposed tool was able to identify and categorise the run-time errors of tri-level programming models. This highlights the need for a parallel testing tool that is specifically designed for tri-level MPI + OpenMP + CUDA programming models. As contemporary parallel testing tools cannot, at present, be used to test software applications produced using tri-level MPI + OpenMP + CUDA programming models, this present study proposes the architecture of a parallel testing tool to detect run-time errors in tri-level MPI + OpenMP + CUDA programming models. [ABSTRACT FROM AUTHOR]

Accurate robot localization and mapping can be improved through the adoption of globally optimal registration methods, like the Angular Radon Spectrum (ARS). In this paper, we present Cud-ARS, an efficient variant of the ARS algorithm for 2D registration designed for parallel execution of the most computationally expensive steps on Nvidia™ Graphics Processing Units (GPUs). Cud-ARS is able to compute the ARS in parallel blocks, with each associated to a subset of input points. We also propose a global branch-and-bound method for translation estimation. This novel parallel algorithm has been tested on multiple datasets. The proposed method is able to speed up the execution time by two orders of magnitude while obtaining more accurate results in rotation estimation than state-of-the-art correspondence-based algorithms. Our experiments also assess the potential of this novel approach in mapping applications, showing the contribution of GPU programming to efficient solutions of robotic tasks. [ABSTRACT FROM AUTHOR]

In spite of its prevalent usage for simulating the full-field process of the two-phase flow, the Euler–Lagrange method suffers from a heavy computing burden. Graphics processing units (GPUs), with their massively parallel architecture and high floating-point performance, provide new possibilities for high-efficiency simulation of liquid-jet-related systems. In this paper, a central processing unit/graphics processing unit (CPU/GPU) parallel algorithm based on the Euler–Lagrange scheme is established, in which both the gas and liquid phase are executed on the GPUs. To realize parallel tracking of the Lagrange droplets, a droplet dynamic management method is proposed, and a droplet-locating method is developed to address the cell. Liquid-jet-related simulations are performed on one core of the CPU with a GPU. The numerical results are consistent with the experiment. Compared with a setup using 32 cores of CPUs, considerable speedup is obtained, which is as high as 32.7 though it decreases to 20.2 with increasing droplets. [ABSTRACT FROM AUTHOR]

In modern information technology systems, secure storage and transmission of personal and sensitive data are recognized as important tasks. These requirements are achieved through secure and robust encryption methods. Argon2 is an advanced cryptographic algorithm that emerged as the winner in the Password Hashing Competition (PHC), offering a concrete and secure measure. Argon2 also provides a secure mechanism against side-channel attacks and cracking attacks using parallel processing (e.g., GPU). In this paper, we analyze the existing GPU-based implementation of the Argon2 algorithm and further optimize the implementation by improving the performance of the hashing function during the computation process. The proposed method focuses on enhancing performance by distributing tasks between CPU and GPU units, reducing the data transfer cost for efficient GPU-based parallel processing. By shifting several stages from the CPU to the GPU, the data transfer cost is significantly reduced, resulting in faster processing times, particularly when handling a larger number of passwords and higher levels of parallelism. Additionally, we optimize the utilization of the GPU's shared memory, which enhances memory access speed, especially in the computation of the hash value generation process. Furthermore, we leverage the parallel processing capabilities of the GPU to perform efficient brute-force attacks. By computing the H function on the GPU, the proposed implementation can generate initial blocks for multiple inputs in a single operation, making brute-force attacks in an efficient way. The proposed implementation outperforms existing methods, especially when processing a larger number of passwords and operating at higher levels of parallelism. [ABSTRACT FROM AUTHOR]

Currently, discovering subsequence anomalies in time series remains one of the most topical research problems. A subsequence anomaly refers to successive points in time that are collectively abnormal, although each point is not necessarily an outlier. Among numerous approaches to discovering subsequence anomalies, the discord concept is considered one of the best. A time series discord is intuitively defined as a subsequence of a given length that is maximally far away from its non-overlapping nearest neighbor. Recently introduced, the MERLIN algorithm discovers time series discords of every possible length in a specified range, thereby eliminating the need to set even that sole parameter to discover discords in a time series. However, MERLIN is serial, and its parallelization could increase the performance of discord discovery. In this article, we introduce a novel parallelization scheme for GPUs called PALMAD, parallel arbitrary length MERLIN-based anomaly discovery. As opposed to its serial predecessor, PALMAD employs recurrent formulas we have derived to avoid redundant calculations, and advanced data structures for the efficient implementation of parallel processing. Experimental evaluation over real-world and synthetic time series shows that our algorithm outperforms parallel analogs. We also apply PALMAD to discover anomalies in a real-world time series, employing our proposed discord heatmap technique to illustrate the results. [ABSTRACT FROM AUTHOR]

Accurate predictions of the wave-dominated region of an acoustic field in a room can be generated using wave-based computational methods. One such method is the finite element method (FEM). With presently available computing power and advanced numerical techniques, it is possible to obtain FEM predictions of sound fields in rooms with complicated geometries and complex boundary conditions in realistic time frames. The FEM has been continuously developed since its inception and attempts to provide solutions in real time using finite element-based methods are beginning to appear in the literature; these developments are especially interesting for auralization and virtual acoustics applications. To support these efforts, and provide a resource for neophytes, the use of the FEM for room acoustics is reviewed in this article. A history is presented alongside examples of the method's derivation, implementation, and solutions. The current challenges and state-of-the-art are also presented, and it is found that the most recent contributions to the field make use of one or a mixture of the following: the finite element-based discontinuous Galerkin method, extended reaction boundary conditions written in the frequency domain but solved in the time domain, and the solution of large-scale models using parallel processing and graphics processing units. [ABSTRACT FROM AUTHOR]

Nowadays, the massive use of multimedia data gives to data compression a fundamental role in reducing the storage requirements and communication bandwidth. Variable-length encoding (VLE) is a relevant data compression method that reduces input data size by assigning shorter codewords to mostly used symbols, and longer codewords to rarely utilized symbols. As it is a common strategy in many compression algorithms, such as the popular Huffman coding, speeding VLE up is essential to accelerate them. For this reason, during the last decade and a half, efficient VLE implementations have been presented in the area of General Purpose Graphics Processing Units (GPGPU). The main performance issues of the state-of-the-art GPU-based implementations of VLE are the following. First, the way in which the codeword look-up table is stored in shared memory is not optimized to reduce the bank conflicts. Second, input/output data are read/written through inefficient strided global memory accesses. Third, the way in which the thread-codes are built is not optimized to reduce the number of executed instructions. Our goal in this work is to significantly speed up the state-of-the-art implementations of VLE by solving their performance issues. To this end, we propose GVLE, a highly optimized implementation of VLE on GPU, which uses the following optimization strategies. First, the caching of the codeword look-up table is done in a way that minimizes the bank conflicts. Second, input data are read by using vectorized loads to exploit fully the available global memory bandwidth. Third, each thread encoding is performed efficiently in the register space with high instruction-level parallelism and lower number of executed instructions. Fourth, a novel inter-block scan method, which outperforms those of state-of-the-art solutions, is used to calculate the bit-positions of the thread-blocks encodings in the output bit-stream. Our proposed mechanism is based on a regular segmented scan performed efficiently on sequences of bit-lengths of 32 consecutive thread-blocks encodings by using global atomic additions. Fifth, output data are written efficiently by executing coalesced global memory stores. An exhaustive experimental evaluation shows that our solution is on average 2.6 × faster than the best state-of-the-art implementation. Additionally, it shows that the scan algorithm is on average 1.62 × faster if it utilizes our inter-block scan method instead of that of the best state-of-the-art VLE solution. Hence, our inter-block scan method offers promising possibilities to accelerate algorithms that require it, such as the scan itself or the stream compaction. [ABSTRACT FROM AUTHOR]

This paper proposes an efficient approach for simulating volumetric deformable objects using the Position-Based Dynamics (PBD) method. Volumetric bodies generated by TetGen are used to represent three-dimensional objects, which accurately capture complex shapes and volumes. However, when a large number of constraints are applied to the system to solve using serialized algorithms on central processing units (CPU), the computational cost can become a bottleneck of the simulation. To address this issue, the proposed implementation algorithm takes advantage of graphic processing unit (GPU) acceleration and parallel processing to improve the efficiency of the simulation. We propose two specific contributions: firstly, the use of the PBD method with volume constraint for tetrahedral elements to simulate volumetric deformable objects realistically; secondly, an efficient GPU-accelerated algorithm for implementing the PBD method that significantly improves computational efficiency. We also applied the node-centric and constraint-centric algorithms to solve the stretch constraint in the GPU-based algorithm. The implementation was performed using Unity3D. The compute shader feature of Unity3D was utilized to perform thousands of parallel computations in a single pass, making it possible to simulate large and complex objects in real-time. The performance of the simulation can be accelerated by using GPU-based methods with stretch and bending constraints, which provides significant speedup factors compared to using only the CPU for deformable objects such as Bunny, Armadillo, and Dragon. The constraint-centric and node-centric GPU approaches provide speedup factors of up to 8.9x and 8x, respectively, while the GPU-based methods with all types of constraints exhibit a slight decrease but still operate at real-time speeds. Overall, this approach enables the simulation of complex and irregular shapes with plausible and realistic results, while also achieving speed, robustness, and flexibility. Additionally, the proposed approach can be applied to general simulation and other game engines that support GPU-based acceleration. [ABSTRACT FROM AUTHOR]

One of the major focuses in the remote sensing community is the rapid processing of deep neural networks (DNNs) on very high resolution (VHR) aerial images. Few studies have investigated the acceleration of training and prediction by optimizing the architecture of the DNN system rather than designing a lightweight DNN. Parallel processing using multiple graphics processing units (GPUs) increases VHR image processing performance. It drives extremely large and frequent data transfers (input/output(I/O)) from random access memory (RAM) to GPU memory. As a result, the system bus congestion causes the system to hang, resulting in long latency in training/predicting. In this paper, we evaluate the causes of long latency and propose a space-to-speed (S2S) DNN system to overcome the aforementioned challenges. A three-level memory system aiming to reduce data transfer during system operation is presented. Distribution optimization with parallel processing was used to accelerate the training. Training optimizations on VHR images (such as hot-zone searching and image/ground truth queues for data saving) were used to train the VHR images efficiently. Inference optimization was performed to speed up prediction in the release mode. To verify the efficiency of the proposed system, we used aerial image labeling from the Institut National de Recherche en Informatique et en Automatique (INRIA) and benchmarks from the Massachusetts Institute of Technology Aerial Imagery for Roof Segmentation (MITAIRS) to test the system performance and accuracy. Without the loss of accuracy, the S2S system improved prediction speed on the testing dataset by eight GPUs in a normal setting in both the INRIA dataset (from 534 to 72 s) and the MITAIRS dataset (818 to 120 s). With the prediction in half-float (using float-16 data), an 8-GPU parallel processing increased the speed to 38 s in the INRIA dataset and 83 s in the MITAIRS dataset. In a pressure test, our proposed system operated on 18,000 images with a size of 5000 × 5000 from 18.2 to 1.8 h with the prediction in full-float (using float-32 data) and 43 min with the prediction in half-float, increasing the speed by a factor of 9.78 and 25.3, respectively, when compared to system runs without optimization. [ABSTRACT FROM AUTHOR]

Circuits in a graph are interesting structures and identifying them is of an important relevance for many applications. However, enumerating circuits is known to be a difficult problem, since their number can grow exponentially. In this paper, we propose fast parallel approaches for enumerating elementary circuits of directed graphs based on graphics processing unit (GPU). Our algorithms are based on a massive exploration of the graph in a breadth-first search strategy. Algorithm V-FEC explores the graph starting from different vertices simultaneously. To further reduce the search space, we present T-FEC, another algorithm that uses triplets as an initial set to start exploring. To the best of our knowledge, those are the first parallel GPU-based algorithms for finding all circuits of a given graph. In addition, they find circuits of a given length and circuits with a specific vertex or edge. The evaluation results show that the proposed approaches achieve up to 190x speed-up over Johnson's algorithm, one of the most efficient sequential algorithms for finding circuits. [ABSTRACT FROM AUTHOR]

Graphics processing units (GPUs) have become the target for high-speed and high-throughput computing in the last decade. The device provides excellent capabilities in speeding general-purpose computing in many applications. The main advantage of GPUs is the ability to process heavy parallel requests depending on thousands of parallel processing cores operating concurrently on solving numerical calculations. In this paper, the role of the GPUs in speeding up the encryption process is studied extensively. Advanced Encryption Standard (AES) algorithm is used to encrypt files in both Central Processing Units (CPUs) and GPUs. The encryption process consists of several sub-processes of which each is evaluated by both types of processors. Two different systems models were used in testing operations. Results showed that low-size encryption processes are not affected by the acceleration process and do not require GPU processing. On the other hand, large file size encryption relies heavily on the acceleration process resulting in less processing time. The analysis also showed that the acceleration speed remains constant after reaching the maximum load value. [ABSTRACT FROM AUTHOR]

This paper presents a physics-guided residual recurrent neural network (PGRRNN) and graphics processing unit (GPU)-accelerated model predictive control (MPC) framework to combat two specific challenges in artificial neural network (ANN)-based nonlinear MPC of high-rate dynamics systems, i.e., low control latency and insufficient model accuracy or generalization ability. Different from traditional ANN models, PGRRNN utilizes approximate physics-based (PB) models (with parameter uncertainty) as a backbone to impose physical constraints/guidance for future state prediction, and reconciles the difference between PB model approximation and data collected from actual systems by propagating their residuals through a multilayer recurrent neural network, hence improving its accuracy and generalization and alleviating data volume requirement. For computing acceleration, both PGRRNN and particle swarm optimization (PSO) are implemented on a GPU platform to make use of its massive parallel processing threads. Numerical experiments for MPC trajectory tracking of a quadcopter are used to examine accuracy and robustness of PGRRNN, and its performance is compared with other ANN models and approximate PB models. PGRRNN outperforms the other models in both ideal and realistic environments, exhibiting 2–3 times lower tracking error than the pure data-driven model. Furthermore, it is demonstrated that GPU-based PSO is able to synthesize control signals at a rate of greater than 50 Hz and can be a promising approach for ANN-based nonlinear MPC. [ABSTRACT FROM AUTHOR]

Neuromorphic computation is one of the axes of parallel distributed processing, and memristor-based synaptic weight is considered as a key component of this type of computation. However, the material properties of memristors, including material related physics, are not yet matured. In parallel with memristors, CMOS based Graphics Processing Unit, Field Programmable Gate Array, and Application Specific Integrated Circuit are also being developed as dedicated artificial intelligence (AI) chips for fast computation. Therefore, it is necessary to analyze the competitiveness of the memristor-based neuromorphic device in order to position the memristor in the appropriate position of the future AI ecosystem. In this article, the status of memristor-based neuromorphic computation was analyzed on the basis of papers and patents to identify the competitiveness of the memristor properties by reviewing industrial trends and academic pursuits. In addition, material issues and challenges are discussed for implementing the memristor-based neural processor. [ABSTRACT FROM AUTHOR]

The increasing complexity of modern AC/DC power systems poses a significant challenge to a fast solution of large-scale transient stability simulation problems. This paper proposes the hybrid parallel-in-time-and-space (PiT+PiS) transient simulation on the CPU-GPU platform to thoroughly exploit the parallelism from time and spatial perspectives, thereby fully utilizing parallel processing hardware. The respective electromechanical and electromagnetic aspects of the AC and DC grids demand a combination of transient stability (TS) simulation and electromagnetic transient (EMT) simulation to reflect both system-level and equipment-level transients. The TS simulation is performed on GPUs in the co-simulation, while the Parareal parallel-in-time (PiT) scheduling and EMT simulation are conducted on CPUs. Therefore, the heterogeneous CPU-GPU scheme can utilize asynchronous computing features to offset the data transfer latency between different processors. Higher scalability and extensibility than GPU-only dynamic parallelism design is achieved by utilizing concurrent GPU streams for coarse-grid and fine-grid computation. A synthetic AC/DC grid based on IEEE-118 Bus and CIGRÉ DCS2 systems showed a good accuracy compared to commercial TSAT software, and a speedup of 165 is achieved with 48 IEEE-118 Bus systems and 192 201-Level detail-modeled MMCs. Furthermore, the proposed method is also applicable to multi-GPU implementation where it demonstrates decent efficacy. [ABSTRACT FROM AUTHOR]

Hyperdimensional computing (HDC) has emerged as an alternative lightweight learning solution to deep neural networks. A key characteristic of HDC is the great extent of parallelism that can facilitate hardware acceleration. However, previous hardware implementations of HDC seldom focus on GPU designs, which were also inefficient partly due to the complexity of accelerating HDC on GPUs. In this paper, we present OpenHD, a flexible and high-performance GPU-powered framework for automating the mapping of general HDC applications including classification and clustering to GPUs. OpenHD takes advantage of memory optimization strategies specialized for HDC, minimizing the access time to different memory subsystems, and removing redundant operations. We also propose a novel training method to enable data parallelism in HDC training. Our evaluation result shows that the proposed training rapidly achieves the target accuracy, reducing the required training epochs by 4×. With OpenHD, users can deploy GPU-accelerated HDC applications without domain expert knowledge. Compared to the state-of-the-art GPU-powered HDC implementation, our evaluation on NVIDIA Jetson TX2 shows that OpenHD is up to 10.5× and 314× faster for HDC-based classification and clustering, respectively. Compared with non-HDC classification and clustering on GPUs, OpenHD-based HDC is 11.7× and 53× faster at comparable accuracy. OpenHD is available at: https://github.com/UCSD-SEELab/openhd. [ABSTRACT FROM AUTHOR]

In this paper we consider a multigrid approach for solving elliptic equations over non‐matching grids with domain decomposition methods. The domain is partitioned into subdomains with different mesh levels that do not match at the interface. The proposed algorithm searches for the global solution over different levels by projecting the residuals on the overlap region. This method is used in conjunction with a domain decomposition solver which only requires, in each iteration step, the solutions of several small local subproblems over finite element blocks. This algorithm is shown to converge to the solution of the corresponding Lagrange multiplier problem for non‐matching grids. The convergence properties of the algorithms are analyzed and numerical examples are presented. When the multigrid and domain decomposition approaches are combined, the method is shown to be reliable and easy to implement. Furthermore the local nature of the solver allows for a straightforward implementation on multiple parallel computers and graphics processing unit (GPU) clusters. [ABSTRACT FROM AUTHOR]

In this paper, we build a $TC$ T C - $Stream$ S t r e a m , a high-performance graph processing system specific for a triangle counting algorithm on graph data with up to tens of billions of edges, which significantly exceeds the device memory capacity of Graphics Processing Units (GPUs). The triangle counting problem is a broad research topic in data mining and social network analysis in the graph processing field. As the scale of the graph data grows, a portion of the graph data must be loaded iteratively. In the existing literature, graphs with billions of edges need to be done distributively, which is cost-intensive. Also, many disk-based triangle counting systems are proposed for CPU architectures, but their tackling performances are inefficient. To solve the above problem, we propose $TC$ T C - $Stream$ S t r e a m , and it focuses on three issues: 1) For power-law graphs, because the amount of tasks of each vertex or edge is inconsistent, it is bound to cause different demands of computing and memory resources for different task types. We propose a parallel vertex approach and the reordering of vertices for graph data that can be placed in the GPU device memory to ensure the maximum workload balancing; 2) A binary-search-based set intersection method is designed to achieve the maximum parallelism in GPU; 3) For the graph data that exceeds the GPU device memory capacity, we develop a novel vertical partition algorithm to guarantee the independent computing on each partition so that the three computation processes, i.e., the computation on GPU, the data transmission between main memory of CPU and SSD, and the communication between the CPU and the GPU can be perfectly overlapped. Moreover, the $TC$ T C - $Stream$ S t r e a m optimizes edge-iterator models and benefits from multi-thread parallelism. Extensive experiments conducted on large-scale datasets showed that the $TC$ T C - $stream$ s t r e a m running on a single Tesla V100 GPU performs $2.4-6\times$ 2. 4 - 6 × and $1.8-4.4\times$ 1. 8 - 4. 4 × faster than the state-of-the-art single-machine in-memory triangle counting system and GPU-based triangle counting system, respectively, and achieves $2.4\times$ 2. 4 × faster than the state-of-the-art out-of-core distributed system PDTL running on an 8-node cluster when processing the graph data with 42.5 billion edges, which demonstrates the high performance and cost-effectiveness of the $TC$ T C - $Stream$ S t r e a m . [ABSTRACT FROM AUTHOR]

The ever-increasing size of modern deep neural network (DNN) architectures has put increasing strain on the hardware needed to implement them. Sparsified DNNs can greatly reduce memory costs and increase throughput over standard DNNs, if the loss of accuracy can be adequately controlled. However, sparse DNNs present unique computational challenges. Efficient model or data parallelism algorithms are extremely hard to design and implement. The recent effort MIT/IEEE/Amazon HPEC Graph Challenge has drawn attention to high-performance inference methods for large sparse DNNs. In this article, we introduce SNIG, an efficient inference engine for large sparse DNNs. SNIG develops highly optimized inference kernels and leverages the power of CUDA Graphs to enable efficient decomposition of model and data parallelisms. Our decomposition strategy is flexible and scalable to different partitions of data volumes, model sizes, and GPU numbers. We have evaluated SNIG on the official benchmarks of HPEC Sparse DNN Challenge and demonstrated its promising performance scalable from a single GPU to multiple GPUs. Compared to the champion of the 2019 HPEC Sparse DNN Challenge, SNIG can finish all inference workloads using only a single GPU. At the largest DNN, which has more than 4 billion parameters across 1920 layers each of 65536 neurons, SNIG is up to 2.3× faster than a state-of-the-art baseline under a machine of 4 GPUs. SNIG receives the Champion Award in 2020 HPEC Sparse DNN Challenge. [ABSTRACT FROM AUTHOR]

Model predictive control (MPC) is a competitive option in modern control systems due to its ability to account for future response and incorporation of complex control objectives. As applications become more intricate, nonlinearities limit the utility of linear control strategies, thus requiring more sophisticated architectures, often at a significant computational cost. This article investigates the computational cost of solving nonlinear MPC problems and provides a framework for designing nonlinear MPC architectures compatible with real-time performance. To motivate the computational complexity associated with nonlinear MPC, the design of an automotive collision imminent steering system and the controller is considered. Various trajectory optimization strategies are examined and compared for this application, identifying multiple-shooting-based Runge–Kutta explicit integration as the most suitable. The control algorithm is then mapped into a graphics processor unit-based hardware system, where special considerations of the parallel hardware architecture are discussed. Compared to the single-shooting solution as the benchmark, multiple shootings on parallel hardware achieve three orders of magnitude improvement in wall time, supporting real-time implementation. [ABSTRACT FROM AUTHOR]

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Summary: Model checking and static analysis have been well studied for program verification. Because of the ability to describe the stack, the pushdown system (PDS) has become a perfect model that is able to accurately model procedure calls and mimic the program's stack. Thus, it is not only a good model for sequential programs but for malware detection as well. However, with the increase of the complexity of programs, the size of models becomes huge as well. Thus, the model‐checking problem is expensive to solve. The computational tree logic (CTL) is a widely used logic and its model checking problem of PDSs can be reduced to the emptiness analysis of an alternating Büchi pushdown system (ABPDS) by determining whether there is an accepting run. When the size of a PDS is huge, the computations can be time‐consuming. To overcome this limitation, we propose a parallel solution. We propose a parallel framework based on the Compute Unified Device Architecture and the corresponding parallel algorithms to solve the emptiness problem of ABPDSs. Moreover, in order to effectively utilize the graphics processing unit, we design a new data structure of variables and an algorithm of management of thread scheduling for the parallel model. We implement our algorithms in a tool and compare our tool to a CTL model checker for PDS as a benchmark. The comparison results indicate an encouraging performance speedup. [ABSTRACT FROM AUTHOR]

With the advent of the Internet of Things (IoT) and cloud computing technologies, vast amounts of data are being created and communicated in IoT networks. Block ciphers are being used to protect these data from malicious attacks. Massive computation overheads introduced by bulk encryption using block ciphers can become a performance bottleneck of the server, requiring high throughput. As the need for high-speed encryption required for such communications has emerged, research is underway to utilize a graphics processor for encryption processing based on the high processing power of the GPU. Applying bit-slicing of lightweight ciphers was not covered in the previous implementation of lightweight ciphers on GPU architecture. In this paper, we implemented PRESENT and GIFT lightweight block ciphers GPU architectures. It minimizes the computation overhead caused by optimizing the algorithm by applying the bit-slicing technique. We performed practical analysis by testing practical use cases. We tested PRESENT-80, PRESENT-128, GIFT-64, and GIFT-128 block ciphers in RTX3060 platforms. The throughput of the exhaustive search are 553.932 Gbps, 529.952 Gbps, 583.859 Gbps, and 214.284 Gbps for PRESENT-80, PRESENT-128, GIFT-64, and GIFT-128, respectively. For the case of data encryption, it achieved 24.264 Gbps, 24.522 Gbps, 85.283 Gbps, and 10.723 Gbps for PRESENT-80, PRESENT-128, GIFT-64, and GIFT-128, respectively. Specifically, the proposed implementation of a PRESENT block cipher is approximately 4× higher performance than the latest work that implements PRESENT block cipher. Lastly, the proposed implementation of a GIFT block cipher on GPU is the first implementation for the server environment. [ABSTRACT FROM AUTHOR]

In this work, we consider the problem of calculating the generalized Moore–Penrose inverse, which is essential in many applications of graph theory. We propose an algorithm for the massively parallel systems based on the recursive algorithm for the generalized Moore–Penrose inverse, the generalized Cholesky factorization, and Strassen's matrix inversion algorithm. Computational experiments with our new algorithm based on a parallel computing architecture known as the Compute Unified Device Architecture (CUDA) on a graphic processing unit (GPU) show the significant advantages of using GPU for large matrices (with millions of elements) in comparison with the CPU implementation from the OpenCV library (Intel, Santa Clara, CA, USA). [ABSTRACT FROM AUTHOR]

Owing to their high accuracy, deep convolutional neural networks (CNNs) are extensively used. However, they are characterized by high complexity. Real-time performance and acceleration are required in current CNN systems. A graphics processing unit (GPU) is one possible solution to improve real-time performance; however, its power consumption ratio is poor owing to high power consumption. By contrast, field-programmable gate arrays (FPGAs) have lower power consumption and flexible architecture, making them more suitable for CNN implementation. In this study, we propose a method that offers both the speed of CNNs and the power and parallelism of FPGAs. This solution relies on two primary acceleration techniques—parallel processing of layer resources and pipelining within specific layers. Moreover, a new method is introduced for exchanging domain requirements for speed and design time by implementing an automatic parallel hardware–software co-design CNN using the software-defined system-on-chip tool. We evaluated the proposed method using five networks—MobileNetV1, ShuffleNetV2, SqueezeNet, ResNet-50, and VGG-16—and FPGA processors—ZCU102. We experimentally demonstrated that our design has a higher speed-up than the conventional implementation method. The proposed method achieves 2.47×, 1.93×, and 2.16× speed-up on the ZCU102 for MobileNetV1, ShuffleNetV2, and SqueezeNet, respectively. [ABSTRACT FROM AUTHOR]

Summary: Massive‐enrollment computing courses often involve some practical training through programming assignments and projects that are frequent targets for plagiarism. Source code similarity detection tools are used to prevent such misbehavior. Parallel processing has recently become a viable technique for speeding up the processing of large workloads. This article examines the parallelization of a source code similarity detection method based on the greedy string tiling and Karp–Rabin algorithms. Both CPU and GPU parallelization approaches are discussed. The CPU implementation uses Pthreads, whereas the GPU implementation employs CUDA. Depending on the evaluated dataset which consists of real student assignment codes, speedups of up to seven times over the sequential version of the code are achieved. Evaluation results on both platforms are compared and discussed in detail. [ABSTRACT FROM AUTHOR]

The mean-field theory proposed by Humphreys is widely used to predict or interpret abnormal grain growth induced by nonuniform grain boundary properties. Based on this theory, the abnormal growth conditions of a specific grain can be expressed as a function of only three parameters: the size ratio, boundary energy ratio, and mobility ratio between the specific grain and its surrounding matrix grains. However, quantitative and systematic validation of this theory is not yet reported neither in experiments nor simulations. In this study, to elucidate the validity of the mean-field theory, we perform large-scale phase-field simulations for two-dimensional and three-dimensional abnormal grain growth. The multi-phase-field numerical model and parallel graphics processing unit computing are employed, which enables the accurate analyses of abnormal growth in large-scale systems with several hundreds of thousands of grains while accounting for the nonuniformity in grain boundary properties. Systematic simulations are performed while varying the size ratio, boundary energy ratio, and mobility ratio between the specific grain and matrix grains. The simulated results and theoretical predictions on the abnormal grain growth behaviors, i.e., whether or not the abnormal growth occurs and the maximum size that can be reached by an abnormally growing grain, are compared in detail. The large-scale multi-phase-field simulations reveal for the first time the agreement between the mean-field theory and numerical simulation quantitatively, demonstrating that the mean-field theory is a versatile means for describing abnormal grain growth. [ABSTRACT FROM AUTHOR]

In this article, a parallel and gradient-free strategy is presented for autonomous navigation of a quadrotor with a limited field of view (FOV). The FOV constraint is nonlinear and noncontinuous in general and involves higher order dynamics of the vehicle. Planning problems with such constraints are difficult to solve, especially with the real-time requirement. The proposed method first constructs an environment map by integrating the measurement of a limited-FOV sensor in a parallel process. Based on the map, it then selects a feasible local goal from a global path and generates a constraint-free nominal control sequence. Finally, a stochastic optimal control problem is solved to satisfy the limited FOV constraint, the dynamic constraint, and the collision-free conditions at the same time. The objective functions are nonlinear and noncontinuous and involves dynamic of MAV. A parallel-gradient-free algorithm is used to address these problems. Both the sensing and planning problems are solved parallelly on a lightweight graphics processing unit. The effectiveness of the proposed strategy is demonstrated through both simulation and real-flight experiments. [ABSTRACT FROM AUTHOR]

We present Heterogeneous Parallel Virtual Machine (HPVM), a compiler framework for hardware-agnostic programming on heterogeneous compute platforms. HPVM introduces a hardware-agnostic parallel intermediate representation with constructs for the hierarchical task, data, and pipeline parallelism, including dataflow parallelism, and supports multiple front-end languages. In addition, HPVM provides optimization passes that navigate performance, energy, and accuracy tradeoffs, and includes retargetable back ends for a wide range of diverse hardware targets, including central processing units, graphics processing units, domain-specific accelerators, and field-programmable gate arrays. Across diverse hardware platforms, HPVM optimizations provide significant performance and energy improvements, while preserving object-code portability. With these capabilities, HPVM facilitates developers, domain experts, and hardware vendors in programming modern heterogeneous systems. [ABSTRACT FROM AUTHOR]

Numerous research efforts have been proposed for efficient processing of range queries in high-dimensional space by either redesigning R-tree access structure for exploring massive parallelism on single GPU or exploring distributed framework of R-tree. However, none of the existing efforts explores the integration of the parallelization of the R-tree on a single GPU with a distributed framework for the R-tree. The problem of designing an efficient multi-GPU indexing method, which can effectively combine the parallelism maximization with distributed processing of the R-tree, remains an open challenge. In this article, we present a novel multi-GPU efficient parallel and distributed indexing method, called LBPG-tree. The rationale of the LBPG-tree is to combine the advantages of an instruction pipeline in CPU with the massive parallel processing potential of multiple GPUs by introducing two new optimization strategies: First, we exploit the GPU L2 cache for accelerating both index search and index node access on GPUs. Second, we further improve utilization of L2 cache on GPUs by compacting and sorting candidate nodes called Compact-and-Sort. Our experimental results show that the LBPG-tree outperforms G-tree, the previous representative GPU index method and effectively support multiple GPUs for providing efficient high dimensional range query service. [ABSTRACT FROM AUTHOR]

Recent years have witnessed the exponential increase in the demand for ultra high definition (UHD) video compression. The third generation of Audio Video Coding Standard (AVS3), which is also known as IEEE Standard 1857.10, is the latest audio and video coding standard developed by the China AVS working group. In AVS3, targeting for UHD videos, a series of efficient coding tools have been introduced, leading to the dramatical increase of computational burden. In this scenario, real-time decoding of UHD videos becomes extremely challenging. This paper presents an improved hybrid CPU + GPU accelerated framework for AVS3 decoding. In particular, the motion vector (MV) derivation process is extracted from entropy decoding threads on the CPU. Therefore, the dependency between threads is removed and the entropy decoding can be performed by multiple threads efficiently. Regarding the GPU, we design compact data structures for transform, prediction, and in-loop filtering to reduce the burden of data transmission. A flexible information buffer supporting multi-thread random writing is further created to coordinate the computation between CPU and GPU. Through asynchronous operations on the buffer, the computation of different computing units and the data transmission between them could be performed in parallel. With NVIDIA GeForce RTX 2080Ti GPU and Intel Core i7 8700K CPU, the proposed decoder achieves 151 frames per second (fps) for 4K videos and 55 fps for 8K videos in all intra configuration. In random access configuration, 218 fps and 74 fps are obtained for 4K and 8K videos, respectively. [ABSTRACT FROM AUTHOR]

Detecting and tracking objects in low Earth orbit is an increasingly important task. Telescope observations contribute to its accomplishment, and telescope imagers produce a large amount of data for this task. Thus, it is convenient to use fast computer-aided processes to analyze it. Telescopes tracking at the sidereal rate usually detect these objects in their imagers as streaks, their lengths depending on the exposure time and the slant range to the object. We have developed a processing pipeline to automatically detect streaks in astronomical images in real time (i.e., faster than the images are produced) by a graphics processing unit parallel processing system. After the detection stage, streak photometric information is obtained, and object candidate identification is provided through matches with a two-line element set database. The system has been tested on a large set of images, consisting of two hours of observation time, from the Tomo-e Gozen camera of the 105 cm Schmidt telescope at Kiso Observatory in Japan. Streaks were automatically detected in approximately 0.5% of the images. The process detected streaks down to a minimum apparent magnitude of +11.3 and matched the streaks with objects from the space-track catalog in 78% of the cases. We believe that this processing pipeline can be instrumental in detecting new objects and tracking existing ones when processing speed is important, for instance, when a short handover time is required between follow-up observation stations, or when there is a large number of images to process. This study will contribute to consolidating optical observations as an effective way to control and alleviate the space debris problem. [ABSTRACT FROM AUTHOR]

With the development of computer architecture, even for embedded systems, GPU devices can be integrated, providing outstanding performance and energy efficiency to meet the requirements of different industries, applications, and deployment environments. Data analytics is an important application scenario for embedded systems. Unfortunately, due to the limitation of the capacity of the embedded device, the scale of problems handled by the embedded system is limited. In this paper, we propose a novel data analytics method, called G-TADOC, for efficient text analytics directly on compression on embedded GPU systems. A large amount of data can be compressed and stored in embedded systems, and can be processed directly in the compressed state, which greatly enhances the processing capabilities of the systems. Particularly, G-TADOC has three innovations. First, a novel fine-grained thread-level workload scheduling strategy for GPU threads has been developed, which partitions heavily-dependent loads adaptively in a fine-grained manner. Second, a GPU thread-safe memory pool has been developed to handle inconsistency with low synchronization overheads. Third, a sequence-support strategy is provided to maintain high GPU parallelism while ensuring sequence information for lossless compression. Moreover, G-TADOC involves special optimizations for embedded GPUs, such as utilizing the CPU-GPU shared unified memory. Experiments show that G-TADOC provides 13.2× average speedup compared to the state-of-the-art TADOC. G-TADOC also improves performance-per-cost by 2.6× and energy efficiency by 32.5× over TADOC. [ABSTRACT FROM AUTHOR]

Evolutionary multitasking (EMT), which shares knowledge across multiple tasks while the optimization progresses online, has demonstrated superior performance in terms of both optimization quality and convergence speed over its single-task counterpart in solving complex optimization problems. However, most of the existing EMT algorithms only consider handling two tasks simultaneously. As the computational cost incurred in the evolutionary search and knowledge transfer increased rapidly with the number of optimization tasks, these EMT algorithms cannot meet today’s requirements of optimization service on the cloud for many real-world applications, where hundreds or thousands of optimization requests (labeled as large-scale EMT) are often received simultaneously and require to be optimized in a short time. Recently, graphics processing unit (GPU) computing has attracted extensive attention to accelerate the applications possessing large-scale data volume that are traditionally handled by the central processing unit (CPU). Taking this cue, toward large-scale EMT, in this article, we propose a new EMT paradigm based on the island model with the compute unified device architecture (CUDA), which is able to handle a large number of continuous optimization tasks efficiently and effectively. Moreover, under the proposed paradigm, we develop the GPU-based implicit and explicit knowledge transfer mechanisms for EMT. To evaluate the performance of the proposed paradigm, comprehensive empirical studies have been conducted against its CPU-based counterpart in large-scale EMT. [ABSTRACT FROM AUTHOR]