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Detecting a potential collision at night is a challenging task owing to the lack of discernible features that can be extracted from the available visual stimuli. To alert the driver or, alternatively, the maneuvering system of an autonomous vehicle, current technologies utilize resource draining and expensive solutions such as light detection and ranging (LiDAR) or image sensors coupled with extensive software running sophisticated algorithms. In contrast, insects perform the same task of collision detection with frugal neural resources. Even though the general architecture of separate sensing and processing modules is the same in insects and in image-sensor-based collision detectors, task-specific obstacle avoidance algorithms allow insects to reap substantial benefits in terms of size and energy. Here, we show that insect-inspired collision detection algorithms, when implemented in conjunction with in-sensor processing and enabled by innovative optoelectronic integrated circuits based on atomically thin and photosensitive memtransistor technology, can greatly simplify collision detection at night. The proposed collision detector eliminates the need for image capture and image processing yet demonstrates timely escape responses for cars on collision courses under various real-life scenarios at night. The collision detector also has a small footprint of ∼40 μm

Memristive crossbar architectures are evolving as powerful in-memory computing engines for artificial neural networks. However, the limited number of non-volatile conductance states offered by state-of-the-art memristors is a concern for their hardware implementation since trained weights must be rounded to the nearest conductance states, introducing error which can significantly limit inference accuracy. Moreover, the incapability of precise weight updates can lead to convergence problems and slowdown of on-chip training. In this article, we circumvent these challenges by introducing graphene-based multi-level (>16) and non-volatile memristive synapses with arbitrarily programmable conductance states. We also show desirable retention and programming endurance. Finally, we demonstrate that graphene memristors enable weight assignment based on k-means clustering, which offers greater computing accuracy when compared with uniform weight quantization for vector matrix multiplication, an essential component for any artificial neural network., Designing efficient and low power memristors-based neuromorphic systems remains a challenge. Here, the authors present graphene-based multi-level (>16) and non-volatile memristive synapses with arbitrarily programmable conductance states capable of weight assignment based on k-means clustering.

Bayesian networks (BNs) find widespread application in many real-world probabilistic problems including diagnostics, forecasting, computer vision, etc. The basic computing primitive for BNs is a stochastic bit (s-bit) generator that can control the probability of obtaining ‘1’ in a binary bit-stream. While silicon-based complementary metal-oxide-semiconductor (CMOS) technology can be used for hardware implementation of BNs, the lack of inherent stochasticity makes it area and energy inefficient. On the other hand, memristors and spintronic devices offer inherent stochasticity but lack computing ability beyond simple vector matrix multiplication due to their two-terminal nature and rely on extensive CMOS peripherals for BN implementation, which limits area and energy efficiency. Here, we circumvent these challenges by introducing a hardware platform based on 2D memtransistors. First, we experimentally demonstrate a low-power and compact s-bit generator circuit that exploits cycle-to-cycle fluctuation in the post-programmed conductance state of 2D memtransistors. Next, the s-bit generators are monolithically integrated with 2D memtransistor-based logic gates to implement BNs. Our findings highlight the potential for 2D memtransistor-based integrated circuits for non-von Neumann computing applications.