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Full integration of Ge-based alloys like GeSn with complementary-metal-oxide-semiconductor technology would require the fabrication of p- and n-type doped regions for both planar and tri-dimensional device architectures which is challenging using in situ doping techniques. In this work, we report on the influence of ex situ doping on the structural, electrical and optical properties of GeSn alloys. n-type doping is realized by P implantation into GeSn alloy layers grown by molecular beam epitaxy (MBE) followed by flash lamp annealing. We show that effective carrier concentration of up to 1 × 10^19 cm−3 can be achieved without affecting the Sn distribution. Sn segregation at the surface accompanied with an Sn diffusion towards the crystalline/amorphous GeSn interface is found at P fluences higher than 3 × 10^15 cm−2 and electron concentration of about 4 × 10^19 cm−3. The optical and structural properties of ion-implanted GeSn layers are comparable with the in situ doped MBE grown layers.

GeSn with quasi-direct band gap is one of the most promising semiconductor materials for light emitters integrated with CMOS technology. The equilibrium solid solubility limit (SSL) of Sn in Ge is in the range of 0.5 % and the predicted theoretical Sn concentration needed for the direct band gap formation is above 5 %. This means that GeSn with direct band gap is metastable and any related material process cannot be thermal equilibrium. Here we propose to utilize strongly non-equilibrium processing i.e. ion implantation followed by millisecond range flash lamp annealing (FLA), for doping and the formation of Ohmic contacts with low contact resistance on Ge0.95Sn0.05. The effective carrier concentration in P+ implanted Ge0.95Sn0.05 layer followed by FLA for 3 ms is above 5×10^19cm-3 with a specific contact resistance rc=4×10^-6Ωcm2. NiGe for Ohmic contact is made by Ni diffusion into GeSn during a single 3 ms long flash pulse. TEM images reveal that NiGe is polycrystalline but with an atomically sharp interface between the metal contact and GeSn. The influence of non-equilibrium processing (ion implantation and FLA) on the optical, electrical and microstructural properties of the GeSn layer grown by MBE on Si will be discussed in details.

The crystallization of silicon-on-insulator films, implanted with high doses of hydrogen ions, upon annealing with millisecond pulses is studied. Immediately after hydrogen-ion implantation, the formation of a three-phase structure composed of silicon nanocrystals, amorphous silicon, and hydrogen bubbles is detected. It is shown that the nanocrystalline structure of the films is retained upon pulsed annealing at temperatures of up to similar to 1000A degrees C. As the temperature of the millisecond annealing is increased, the nanocrystal dimensions increase from 2 to 5 nm and the fraction of the nanocrystalline phase increases to similar to 70%. From an analysis of the activation energy of crystal phase growth, it is inferred that the process of the crystallization of silicon films with a high (similar to 50 at %) hydrogen content is limited by atomic-hydrogen diffusion.

The integration of III-V semiconductor material within silicon technology is crucial for performance of advanced electronic devices. This paper presents the investigations of microstructural and opto-electronic properties of GaAs quantum dots (QDs) formed in silicon by means of sequential ion implantation and flash lamp annealing (FLA). Formation of crystalline GaAs QDs with well-defined crystal orientation and conductivity type was confirmed by high resolution transmission electron microscopy and mu-Raman spectroscopy. The influence of the post implantation millisecond-range annealing on the evolution of the nanoparticles size, shape, crystallographic orientation and doping type of GaAs QDs is discussed.

Grain enlargement of the poly silicon is a key process to improve the electronic properties of microelectronic and photovoltaic devices. We report on lateral dendritic crystal growth in thin silicon films during liquid phase crystallization (LPC) induced by high intensity flash lamp irradiation (FLA). In a series of experiments first a 140 nm SiO2 film and then amorphous silicon of 100 nm thickness were deposited on 500µm thick (100) Si wafers. After that the top silicon film was ion implanted with carbon, first, with the aim to improve the wetting properties of the underlying silicon dioxide by the liquid silicon film during the LPC process. Secondly, due its different solubility in solid and liquid silicon, carbon is responsible for the formation of a laterally depending melting temperature inducing a lateral dendritic growth process. To prove in particular this influence of carbon on the wetting and crystallization process, the flash lamp irradiated structures were studied using XTEM analysis. The pulse annealing process was carried out using the commercial flash lamp annealing tool FLA-50RD of DTF-Technology. The installed set of standard Xenon flash lamps guarantees irradiation densities up to 150 J/cm2 at a pulse length of 20 ms on preheated substrates. As expected, depending on the carbon implantation conditions and the FLA energy densities, the films show, as a result, up to several hundred micrometers extended grains having the characteristic dendritic shape.

Semiconductors quantum dots of the size in the range of the exciton Bohr radius or smaller are very attractive objects, both for research and application, due to their special optical and electrical properties. In this paper we present investigations of microstructural, electrical and optical properties of GaAs quantum dots (QDs) formed in silicon. The GaAs QDs were obtained by means of sequential ion implantation and flash lamp annealing (FLA). It is shown that the crystallographic orientation of nanocrystals (NCs) and their size can be controlled by varying the annealing parameters. Besides the crystallographic orientation the conductivity type of the GaAs NCs can be controlled as well. The influence of the post implantation millisecond-range annealing on the evolution of the nanoparticles size, shape, crystallographic orientation and doping type of GaAs QDs is discussed.

Conventionally, the integration of III-V semiconductors with silicon is based on heteroepitaxial growth of multi-layered structures on silicon. But up to now the modification of the optoelectronic properties of silicon in the microelectronic industry is based on the ion implantation method and subsequent thermal annealing. An alternative technique to the epitaxial growth of III-V nanostructures is the high fluence ion implantation followed by milliseconds range annealing. Potentially, with this method any kind of compound semiconductors can be formed in any solid substrate. InP and GaAs with a bulk band gap of 1.34 and 1.42 eV at room temperature, respectively, are most suitable for near infrared light emitters, and InAs (0.35 eV) with an extremely high electron mobility (up to 40000 cm2/Vs) seems to be the most suitable candidate for better electronic devices performance. In this paper formation of the InAs, GaAs and InP nanocrystals in silicon are presented. The optoelectronic and microstructural properties of the compound semiconductors nanostructures were investigated by means of -Raman and temperature dependent photoluminescence spectroscopy, X-ray diffraction, high-resolution transmission electron microscopy (HRTEM) and energy-dispersive X-ray spectroscopy (EDS). It is show that conductivity type, size and crystallographic orientation of the III-V nanostructures can be fully controlled by varying implantation and annealing parameters. Finally the heterojunction devices consisting of III-V NCs on a silicon finger realized by selective etching of silicon will be presented.

The defect density of the epitaxial SiC layers on Si result from the high defect density in the seeding layer formed by carbonization of the Si substrate. A method to reduce the defect density is flash lamp annealing. The recrystallisation can be improved if a three layers stack consisting of 3C-SiC/Si/3C-SiC/Si-substrate is used (iFLASiC-process). To improve the recrystallization C, Ge or both elements were added to Si. Ge and C additions to the Si and subsequent FLASiC processing l ead t o a s ubstantial increase o f t he m ass t ransfer. T he g rowth r ate r eached 1 0.0 μm/s. T he a chieved thickening of the lower layer strongly depends on the Si composition and is caused by the modification of the optical properties and the mass transport properties of the Si. Ge incorporation into Si and therefore into the Si melt enhance the mass transport from the upper SiC layer to the lower one. C incorporation into Si increases the available C contributing to SiC growth. Both elements lower the Si band gap increasing light absorption. Beside the growth modification the in plane strain in the 3C-SiC layer turns from tensile strain with a value of 0.0004 in the non buckling case to an in plane compressive strain with a strain value of - 0.0046. Non annealed layers of comparable thickness deposited under the same conditions exhibit tensile residual strain in the range of 0.002 to 0.006. FLASiC is not only able to improve the layer quality but also reduces the residual stress.

The formation of near surface SiGe layers by means of combined high dose Ge ion implantation and flash lamp annealing will be addressed. Furthermore, we show that the formation of an undesirable facetted liquid/solid in-terface, which is well known for pulse melting in the mil-lisecond time regime, is less pronounced due to the de-creasing melting temperature of Si with increasing Ge concentration at the SiGe/Si interface. A dislocation net-work, which is observed by using transmission electron microscopy, is expected to play an important role to form these thin SiGe layers. We will demonstrate the depth profiles of Ge by Rutherford backscattering spectrometry and discuss the concerned mechanism.

Recently, superconductivity was detected in heavily boron doped group IV semiconductors like diamond (cB=2.8 at%, TC=4 K) [1] and silicon (cB=1.2 at%, TC=0.34 K) [2]. These unexpected results initiated a new debate about the possibility and the mechanism of superconductivity in doped semiconductors. Theoretical calculations, based on the classical electron-phonon coupling mechanism, demonstrated that critical temperatures in diamond can clearly exceed 1 K for acceptor concentrations higher than 5 at% [3]. However, unrealistic high doping concentrations are predicted for observable superconductivity in Si or even Ge. It was an open question whether superconductivity can be achieved in doped Ge. In order to fabricate group IV semiconductors with acceptor concentrations much higher than their equilibrium solid solubility exotic doping methods like high-pressure-high-temperature synthesis [1] or gas immersion laser doping [2] were applied. We used a more conventional doping process consisting of high dose implantation and 3 ms flash lamp or 60 s rapid thermal annealing in order to form Ge layers with Ga concentrations up to 6 at%. According to Hall effect measurements the hole concentrations are in the range between 0.3x1021 and 1.4x1021 cm-3. Superconductivity was found in the Ga-doped Ge samples below critical temperatures between 0.1 and 0.5 K in dependence on the annealing conditions. References [1] E. A. Ekimov et al., Nature 428 (2004) 542 [2] E. Bustarret et al., Nature 444 (2006) 465 [3] L. Boeri, J. Kortus, O. K. Anderson, J. Phys. Chem. Solids 67 (2006) 552

Recently, superconductivity has been discovered in heavily boron-doped group IV semiconductors like diamond [1] and silicon [2]. Because theoretical studies predict only a weak tendency to superconductivity in heavy p-type doped Ge [3] investigations of the low-temperature transport behaviour in Ge are still lacking. In order to obtain superconductivity in group IV semiconductors, heavy p-type doping above the metal-insulator-transition and low lattice damage is required. The combination of both conditions make it difficult to apply ion implantation as doping technique. The challenge is to reconstruct the damaged or even amorphized crystal lattice and to activate the acceptor atoms after implantation by annealing, avoiding at the same time long range diffusion and precipitation of the acceptors in the supersaturated semiconductor. So far only in-situ doping during growth (high-temperature-high-pressure synthesis [1] and chemical vapour deposition) for boron-doped diamond and ultra-short-time laser melting of the Si surface in BCl3 atmosphere (gas immersion laser doping [2]) have met these conditions. Here an alternative process compatible with semiconductor technology is presented. Ga implantation and flash lamp annealing in the ms range enables the production of Ga supersaturated (up to 15 at%) crystalline Ge layers which become superconducting below 0.5 K. The layer structure investigated by AES, XTEM, RBS/C and the electrical transport properties at low temperatures are reported. [1] E. A. Ekimov, V. A. Sidorov, E. D. Bauer, et al. , Nature 428 (2004) 542 [2] E. Bustarret, C. Marcenat, P. Achatz, et al., Nature 444 (2006) 465 [3] L. Boeri, J. Kortus, O. K. Anderson, J. Phys. Chem. Solids 67 (2006) 552

Vortrag anlässlich eines vertraulichen Projekttreffens bei der Creavis-Degussa AG

Thin poly-crystalline silicon films are attractive for the fabrication of active matrix liquid crystal displays. We investigate the use of flash lamp annealing to crystallize amorphous silicon layers on glass substrates as a low cost manufacturing route. In this process amorphous silicon (a-Si) can be crystallized by solid phase crystallization (SPC) or in the super lateral growth (SLG) regime. We present a thermal model incorporating the phase transitions during annealing; providing a valuable tool for optimizing the process conditions. Another consideration is the evolution of stress resulting from the transient thermal loading of the substrate material. Results are presented for various substrate geometries and important scalability issues are addressed.

Sub-second annealing is one of the key issues to meet the requirements of the 45 nm technology node according to the ITRS roadmap. Therefore, over the past decade there has been great interest in techniques such as laser and flash lamp annealing (FLA). In addition, advanced ultra-fast annealing shows promise for technologies that are not directly related to Si device processing. The main reason for using FLA in alternative applications is the reduced thermal budget because of the short annealing time, which enables one to achieve high temperatures (> 500°C) in the near-surface region while keeping the substrate bulk relatively cold. This is of particularly high importance for the development of novel polymer-based electronics and flexible solar cell technologies, where the substrates cannot withstand temperatures in excess of 150°C. An overview of theoretical simulations and related results from FLA experiments for a variety of layered systems is given. The influence of the flash duration and intensity on the heat distribution and the resulting physical properties is considered. Design and performance issues of the FLA tools depending on the specific uses and technical requirements are addressed. Furthermore, topics covered include high-throughput applications e.g. for roll-to-roll production of polymer substrates. Results of a prototype tool for multi-flash processing up to a frequency of 1 Hz using a pulse duration of 1 ms are also discussed.

Flash lamp annealing of heteroepitaxial silicon carbide on silicon structures involves melting the silicon below the SiC layer but the facetted nature of the liquid-solid interface leads to unacceptable surface roughness. This paper describes a method of controlling melting by using a melt stop created at a controlled depth below the Si / SiC interface by implanting a high dose of carbon, which significantly increases the silicon melting temperature. Results confirm the effectiveness of the technique in reducing roughness.

A thermal model for flash lamp annealing of 3C-SiC/Si multilayer systems is developed.

The capabilities of plasma doping (PLAD) and flash lamp annealing (FLA) for use in ultra-shallow junction (USJ) fabrication have been evaluated. Silicon wafers have been doped in a BF3 plasma using wafer biases ranging from 0.6 to 1 kV and a dose of 4 × 1015 cm−2. The wafers so implanted have been heat-treated by FLA using pre-heating temperatures in the range of 500–700 °C, peak temperatures of 1100–1350 °C, and effective anneal times of 20 and 3 ms. Secondary ion mass spectrometry (SIMS) and sheet resistance measurements have been undertaken to determine the junction depth and the sheet resistance, respectively. Optimum processing conditions have been identified under which both high electrical activation and insignificant dopant diffusion occur compared to the as-implanted state. In this way, one can obtain combinations of junction depth and sheet resistance that meet the 45 nm technology node requirements.

Advanced Thermal Processing of Semiconducting Materials using Flash Lamp Annealing is Discussed.

Higher integration in semiconductor technology causes the need for ultra-shallow junctions. Novel techniques are necessary to achieve abrupt and sharp profiles of dopants at high activation levels without significant diffusion of dopants. Because common RTP techniques are limited in temperature ramping speed, alternative methods for ultra-short time annealing are of great interest. In this paper we report on recent results from flash lamp annealing (FLA). Si (100) wafers were implanted with 500eV B+ ions to a fluence of 1015 cm-2. FLA was carried out at temperatures in the range 1100-1200°C with a soak time of 2-20ms using a bank of xenon flash-lamps. With this technique the final temperature is reached within one millisecond. Preheating of the samples from the rear side was performed at 250, 500 and 750°C by a bank of halogen lamps. For comparison conventional RTP was performed at 1100°C and 1200°C for the shortest reliable time of 1s and longer times up to 80 s. The boron diffusion and the dopant activation were investigated by secondary ion mass spectroscopy (SIMS) and spreading resistance profiling (SRP). The activated doses after FLA were as high as 20% of the implanted dose confined in a layer of only 60nm. The mechanical deformation induced to the samples due to the heat shock was investigated with X-ray reflection. The intensity of the specularly reflected beam (CuK radiation, scattering angle = 0.8°) is detected as a function of the incidence angle. The profile width and the distances between possible subsidiary peaks give integral values of the surface waveness.

For the realization of good quality 3C-SiC films epitaxially grown on Si the perfection of the film during the early stage of growth is substantial. In this paper the beneficial role of Flash Lamp Annealing (FLA) for the elimination of the defects in the SiC film and the strain reduction at the SiC/Si interface is discussed. FLA is a highly transient process, having a flash duration of a few milliseconds. When the energy density is sufficient high, it melts the silicon at the SiC/Si interface increasing the temperature there well above the melting point of the silicon. The melted Si dissolves the 3C-SiC near the interface. Additionally, the uppermost part of the 3C-SiC film is annealed due to the heat dissipation during the flash duration and the solidification of the molten region. During the solidification of the C-rich Si melt SiC grows by liquid phase epitaxy at the annealed uppermost 3C-SiC film which act as a seed. This process results in a substantial improvement of the SiC film, eliminating also the cavities and the stress at the interface.