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In this paper, the characteristics of silicon nanocrystals used as charge trapping centers in memory devices are examined using the two-level charge pumping (CP) technique performed as a function of frequency and energy filtered transmission electron microscopy (EFTEM). The parameters extracted from the two methods such as the depth location, density and effective diameter of the nanocrystals are in good quantitative agreement. These results validate the charge pumping approach as a non-destructive powerful technique to access most of the properties of nanocrystals embedded in dielectrics and located at injection distances from the substrate surface not limited to the direct tunneling regime. [ABSTRACT FROM AUTHOR]

The effect of annealing in diluted oxygen versus inert environment on the structural and electrical characteristics of thin silicon dioxide layers with embedded Si nanocrystals fabricated by very low-energy silicon implantation (1 keV) is reported. Annealing in diluted oxygen increases the thickness of the control oxide, improves the integrity of the oxide and narrows the size distribution of the nanocrystals without affecting significantly their mean size (∼2 nm). Strong charge storage effects at low gate voltages and enhanced charge retention times are observed through electrical measurements of metal-oxide-semiconductor capacitors. These results indicate that a combination of low-energy silicon implants and annealing in diluted oxygen allows for the fabrication of improved low-voltage nonvolatile memory devices. [ABSTRACT FROM AUTHOR]

Abstract: An attractive alternative for extending the scaling of Flash-type memories is to replace the conventional floating gate (a poly-Si layer) by laterally isolated floating nodes in the form of nanoparticles. This floating-gate concept has led to the emergence of the so-called nanocrystal (NC) memories which have the potential of operating at lower voltages and higher speeds compared to the conventional non-volatile memories (NVMs) without compromising the criterion of non-volatility. NC memories also offer other advantages like a better immunity to the crosstalk effect arising from the floating-gate coupling of closely spaced adjacent cells and an increased design flexibility from which quantum confinement phenomena can be judiciously exploited for enhanced memory functionality. Among the different technological routes explored in the last few years for generating nanocrystals in the gate insulator of MOS devices, two major techniques have been utilized, namely deposition in vacuum and ion beam synthesis. During the last decade, we have extensively explored the ultra-low-energy ion-beam-synthesis (ULE-IBS) technique to produce single planes of Si-NCs in very thin (5–10nm) insulator layers. This review summarizes more than 10 years of research efforts we and other groups have dedicated to the fabrication of NCs memories using this original technique. By exploiting the flexibility of the ULE-IBS route, Si-NCs single-transistor NVM cells using “classical” gate oxides (SiO2) have been successfully realized. More recently, advanced dielectric stacks employing high-κ dielectric (HfO2) as tunnel oxide and SiN as control oxide and host matrix for Si and Ge-NCs, have been fabricated and show promising performance for low-voltage operating-NVM devices. Particular emphasis is placed herein on material science issues such as anomalous and controlled oxidation processes. While much research is still needed for making reliable and competitive NC NVMs, our systematic investigations based on the ULE-IBS option demonstrate that a tight control and understanding of the properties of NCs memory cells can be achieved, provided that deep structural characterization is coupled to electrical studies. [Copyright &y& Elsevier]

Abstract: Photoluminescence (PL) spectroscopy is demonstrated as a suitable technique to characterize silicon nanocrystals (Si-NCs)-based non-volatile memory devices. The 2D array of Si-NCs forming the floating gate is obtained by low-energy ion implantation in thin oxide followed by annealing. The electrical properties and PL emission are dramatically improved after annealing in oxidizing conditions, which are necessary conditions for oxide healing. Both these elaboration and characterization techniques are currently extended to the production and the study of nanoscale electronic devices, which exploit the Coulomb blockade effect and other quantized charging features at 300K. The fabrication of such devices requires the fine control of a small number of NCs of about 3nm in diameter. This could be achieved by 1keV Si-implantation through stencil masks with window sizes ranging from about 0.1 to 10μm2, with spacing between apertures in the 1–10μm range. After mask removal and annealing, PL spectroscopic imaging under a confocal microscope is used to detect the NCs rich areas. The image of the PL intensity is found to mimic the mask geometry. Some changes of the PL energy at maximum intensity are found, that could be attributed to different Si-NCs sizes. [Copyright &y& Elsevier]