1. Application of Deep Reinforcement Learning to Dynamic Verification of DRAM Designs
- Author
-
Hyeonsik Son, Dae Sin Kim, Changwook Jeong, Ko Jeong-Hoon, In Huh, Jung Yun Choi, Jae-hoon Jeong, Kiwon Kwon, Seung-ju Kim, Joonwan Chai, Youn-sik Park, and Choi Hyojin
- Subjects
Test vector generation ,Computer engineering ,Artificial neural network ,Linear programming ,Computer science ,Reinforcement learning ,Transfer of learning ,Gradient method ,Dram ,Euclidean vector - Abstract
This paper presents a deep neural network based test vector generation method for dynamic verification of memory devices. The proposed method is built on reinforcement learning framework, where the action is input stimulus on device pins and the reward is coverage score of target circuitry. The developed agent efficiently explores high-dimensional and large action space by using policy gradient method with A-nearest neighbor search, transfer learning, and replay buffer. The generated test vectors attained the coverage score of 100% for fifteen representative circuit blocks of modern DRAM design. The output vector length was only 7% of the human-created vector length.
- Published
- 2021
- Full Text
- View/download PDF