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Multiwalled carbon nanotubes (MWNT) were deposited via dropcasting and dried using vacuum filtration. Because of the slightly larger pore size (5–10 µm) of the paper substrate used as compared to the length of the nanotubes (0.5–2 µm), a variety of MWNT networks were formed both on the surface and through the thickness of the paper. Using a combination of impedance spectroscopy, equivalent circuit modeling, and microscopy techniques, it was possible to describe in detail how the electrical properties change as a function of how the MWNTs are distributed on the porous substrate by varying the number of deposited layers (1–20) as well as the dispersion concentration (0.1–5 mg/mL). In the in-plane, four different electrical responses were observed and modeled: (1) a substrate dominated spectrum representing unconnected MWNTs, (2) one that included bundle and junction responses as well as some inductances representing sparsely distributed MWNT networks, (3) followed by a parallel RL circuit for partially connected MWNT networks, and (4) finally a series RL circuit for fully connected MWNT networks. In the thru-plane, only two different electrical responses were observed and modeled. The results for the in-plane and thru-plane properties were used to generate percolation curves that show that electrical conductivity can change as much as 10 orders of magnitude for the same exact MWNTs. These results indicate that not only do the characteristics of the nanotubes themselves play a role but also the structure of the underlying substrate and the details of how the films are deposited.

Contribution: A didactic methodology, based on analytical expressions and experimental validation, to describe the process of abrupt current interruption in a series RL circuit, that considers real passive components and uses a toggle switch as disconnecting device. Background: In undergraduate courses, circuits adopted in transient analysis usually assume electrical switches in their ideal form, disregarding electrical impedance and its variation over time. Texts and instructors rarely point out these simplifications, so students can become confused. There is thus a need for a suitable switch model that yields a behavior consistent with real devices, while permitting a mathematical formulation of the inductor current. Intended Outcomes: That students should understand electrical component modeling, and how models can represent the physical phenomena that occur in electrical circuits. Application Design: An experiment, designed to evaluate students’ perceptions of switch modeling, modeled a switch by using three different equivalent circuits of increasing complexity, to allow a more realistic simulation. Electrical switch modeling is described, with the models being based on measurements performed on a real circuit. Findings: Student performance was evaluated qualitatively through test scores, and quantitatively through a post-class questionnaire. The results indicate that 96.15% of the students were able to propose an accurate model of the electrical switch.

In this paper, a Ku-band tunable absorptive frequency selective reflector (TAFSR) is proposed. The TAFSR has a sandwich structure: an active resistive sheet at the top layer, and PEC at the bottom layer, divided by F4B substrate. The resistive sheet layer is composed of a simple straight strip between two metallic strips with PIN diodes loaded to get the tunable reflective coefficient. PIN diodes can be equivalent to serial RL circuit. Two metallic strips and the gap between units is equivalent to serial LC circuit to control the resonant center frequency. The biased strip can be equivalent to the parallel inductance circuit as the electric structure and the biased lines simultaneously. The influence of the PIN diodes' tunable resistance is analyzed through equivalent circuit model. The measurement results show that the −10dB tunable absorptive band of the proposed TAFSR can be achieved in Ku-band from 10.3 GHz to 19.2 GHz.

This article presents a comparison between integer and non-integer order modelling of a synchronous generator, in the frequency domain as well as in the time domain. The classical integer order model was compared to one containing half-order systems. The half-order systems are represented in a Park d-q axis equivalent circuit as impedances modelled by half-order transmittances. Using a direct method based on the approximation of the half-order derivatives by the Gr&uuml, nwald&ndash, Letnikov definition, a state-space equation system was solved. For both models, a computational program written in Matlab&reg, software was used. For the purpose of time domain simulation, the machine models were connected to an electric load composed of an RL circuit. To validate and compare both models, simulation results of a three-phase short-circuit and a no-load voltage recovery were compared with corresponding measurements performed on a solid salient-pole synchronous generator of 125 kVA.

Purpose This paper aims to design a new bandgap reference circuit with complementary metal–oxide–semiconductor (CMOS) technology. Design/methodology/approach Different from the conventional bandgap reference circuit with operational amplifiers, this design directly connects the two bases of the transistors with both the ends of the resistor. The transistor acts as an amplifier to amplify the change of voltage, which is convenient for the feedback regulation of low dropout regulator (LDO) regulator circuit, at last to realize the temperature control. In addition, introducing the depletion-type metal–oxide–semiconductor transistor and the transistor operating in the saturation region through the connection of the novel circuit structure makes a further improvement on the performance of the whole circuit. Findings This design is base on the 0.18?m process of BCD, and the new bandgap reference circuit is verified. The results show that the circuit design not only is simple and novel but also can effectively improve the performance of the circuit. Bandgap voltage reference is an important module in integrated circuits and electronic systems. To improve the stability and performance of the whole circuit, simple structure of the bandgap reference voltage source is essential for a chip. Originality/value This paper adopts a new circuit structure, which directly connects the two base voltages of the transistors with the resistor. And the transistor acts as an amplifier to amplify the change of voltage, which is convenient for the feedback regulation of LDO regulator circuit, at last to realize the temperature control.

The experimental measurements clearly show electromagnetic noise patterns in a three-line circuit, which represents a two-line circuit with grounding. A new three-line circuit theory reproduces the noise patterns of an electric circuit with grounding, allowing the origin of the noise of the three-line circuit to be understood. In addition, comparing the theoretical calculations of a three-line circuit to the experimental results reveals that electric power is converted to heat over time due to the resistance in the third line. The results demonstrate the importance of reducing the common-mode noise to avoid heat generation in an electric circuit.

In this letter, the channel current magnetic effect of complementary metal–oxide–semiconductor (CMOS) transistors is studied, and an improved small-signal equivalent circuit model (SSECM) is proposed. Silicon-on-insulator (SOI) CMOS transistors were fabricated and measured in a commercial 0.18- $\mu \text{m}$ process. Then, a series RL network is introduced into the classical transistor SSECM to characterize the channel current magnetic effect. To validate the model, the scattering parameters calculated by the model are compared with the measurement data. The results show that the root-mean-square error (RMSE) of the scattering parameters is less than 0.02 up to 2 GHz. And in the whole investigating frequency range, the RMSE is less than 0.063. Compared with the conventional model, which does not consider the channel current magnetic effect, the proposed model improves the accuracy in the lower frequency range remarkably.

Proposed work describes a new grounded lossy inductance (grounded parallel RL network) simulator configuration employing two Dual-output voltage-differencing buffered amplifiers (DO-VDBA) along with single capacitance. The presented circuit configuration is purely resistor-less active realization (Active-C realization) with electronic tuning of both inductive as well as resistive part through the transconductance of employed DO-VDBAs. The electronic tuning of inductive part is independent to the resistive part which is an important advantage. The presented realization is completely free from matching conditions and its non-ideal behaviour is satisfactory. To understand the high frequency performance of simulated lossy inductance its behaviour is studied considering terminal parasitcs of DO-VDBAs. The usefulness of developed circuit is authenticated by developing a second order voltage-mode high-pass filter design example. All the designed circuits are simulated in PSPICE environment.

In this paper electrical models of magneto-impedance (MI) sensors based on a continued fractions is introduced. The models can be easily applied to cylindrical and planar magnetic structures via the proper mapping of Bessel and coth functions to an approximated passive linear RL network, respectively. This is done representing those functions as continued fractions and identifying the topology and the passive lineal electrical elements as Cauer’s type 2 networks. The equivalent circuits can be conveniently exploited for conditioning electronic purposes, or the characterization of the basis of the MI effect through the estimation of the sensor effective magnetic permeability. Simulation vs measurement results are presented to validate and demonstrate the scope of the model.

In this study, a three-level hybrid dc/dc converter by integrating the full-bridge circuit, resonant circuit and three-level flying capacitor circuit is presented to achieve the main advantages of low-voltage stress of power devices, low circulating loss, low-voltage ringing on the rectifier diodes and low-output filter inductor for medium-voltage dc-based systems. Two full-bridge circuits are connected in series to effectively reduce the voltage stress of switches. Half-bridge resonant circuit shared the lagging-leg switches of full-bridge circuit is used and operated at fixed switching frequency to extend the zero-voltage switching (ZVS) range from low load to full load. Thus, the drawback of narrow ZVS range in the conventional full-bridge converter is improved. A flying capacitor is adopted to automatically balance input split capacitor voltages in each switching cycle without any additional active components or complexity control scheme. The circulating loss in the full-bridge circuit is reduced to zero by parallel connection of outputs of full-bridge circuit and half-bridge resonant circuits. Finally, the theoretical analysis and performance of the proposed converter are verified by the experiments with a 1.92 kW prototype circuit.

This paper presents a high step-up converter, which utilizes a three-winding coupled inductor and a rectified voltage-doubler circuit to obtain high step-up gain for fuel cells. The proposed converter functions as an active-clamp circuit, which relieves large voltage spikes across the power switches. Thus, power switches with low-voltage-rated can be utilized to reduce conduction losses and circuit cost. Energy stored in leakage inductances of the coupled inductor is recycled to the output terminal, resulting in efficiency improvements. In addition, the coupled inductor in the presented converter can also have extra windings in order to achieve higher voltage gain. Finally, a prototype circuit with an input voltage of 60V and an output voltage of 380V is developed for a 1000W-rated fuel cell power-generation system to validate its performance, and experimental waveforms and measured efficiency under different input voltages and output power level are demonstrated. Copyright © 2016 John Wiley & Sons, Ltd.

The equivalent test circuit that can deliver both short-circuit current and recovery voltage is used to verify the performance of high-voltage circuit breakers. Most of the parameters in this circuit can be obtained by using a simple calculation or a simulation program. The ratings of the circuit breaker include rated short-circuit breaking current, rated short-circuit making current, rated operating sequence of the circuit breaker and rated short-time current. Among these ratings, the short-circuit making capacity of the circuit breaker is expressed in peak value and not in RMS value similar to breaking capacity. A series resistor or super-excitation is used to control the peak value of the short-circuit current in the equivalent test circuit. When using a series resistor, a higher rating of circuit breakers leads to a higher thermal capacity, thereby requiring additional space. Therefore, an effective, optimal design of the series resistor is essential. This paper proposes a method for reducing thermal capacity and selecting the optimal resistance to limit the making current by controlling the DC time constant of the test circuit.

Low frequency and low power applications are required for biomedical devices. Thus, a large capacitance is needed for integration of low frequency active filters. To realize a small-size low frequency active filter, impedance scaling techniques have been proposed. In this paper, a symmetry-type floating impedance scaling circuit is proposed. The proposed circuit is composed of voltage followers and current amplifiers. The characteristics of the proposed circuit are confirmed by simulation. The proposed circuit works as a large capacitor which has a capacitance multiplied 50 times. The proposed circuit is applied to a fully differential 3rd-order low-pass filter. Simulation results show validities and availability of the proposed symmetry-type floating impedance scaling circuit.

This paper presents a new numerical simulation method to calculate transient voltage profiles of lithium-ion secondary batteries. The method employs circuit analysis of an internal equivalent electric circuit composed of an electromotive force, an LR parallel circuit, and eight CR parallel circuits. To demonstrate the accuracy and versatility of this approach, the authors measured the transient voltage responses of three types of test batteries with different output power densities, and compared these experimental data with simulation results. Battery performance was tested using different charge/discharge current patterns and a range of values for state of charge (SOC) and operating temperature. The accuracy of the proposed simulation method was confirmed for all test cases using the three different batteries and charge/discharge current patterns, demonstrating that the method is versatile and applicable to various lithium-ion secondary batteries regardless of type. Since the employed internal equivalent electric circuit is composed of only DC voltage source and linear R , L and C elements, all of general purpose software for electric circuit simulations can easily deal with the circuit. This advantage and the obtained results indicate that the proposed simulation method is a useful technique and offers a powerful tool to develop sophisticated battery control systems for various applications.

In this study, sudden discharge tests were performed on partially-insulated (PI) GdBCO coated conductor single-pancake coils to investigate the effects of a PI winding scheme on the discharge characteristics. Three sets of PI coils were constructed with insulation at 3 different intervals: every 2nd, 4th, and 8th turn. Each set included coils with 4 different insulation-angles: 90°, 180°, 270°, and 360°. Discharge delay of the PI coils was alleviated by increasing the insulation-interval or insulation-angle due to increased insulated area, which partially hinders radial current flow. The results of the sudden discharge test were in fairly good agreement with simulations of the PI coils using an equivalent circuit model consisting of a single RL circuit in parallel. The characteristic resistance of the PI coils was reasonably estimated through the numerical approach with contact surface resistance and compensation for the current-bottleneck effect, which enables the PI coils to be utilized in practical superconducting magnet applications.

This paper proposed a novel fractional-order memristor-based chaotic circuit. A memristive diode bridge cascaded with a fractional-order RL filter constitutes the generalized fractional-order memristor. The mathematical model of the proposed fractional-order chaotic circuit is established by extending the nonlinear capacitor and inductor in the memristive chaotic circuit to the fractional order. Detailed theoretical analysis and numerical simulations are carried out on the dynamic behavior of the proposed circuit by investigating the stability of equilibrium points and the influence of circuit parameters on bifurcations. The results show that the order of the fractional-order circuit has a great influence on the dynamical behavior of the system. The system may exhibit complicated nonlinear dynamic behavior such as bifurcation and chaos with the change of the order. The equivalent circuits of the fractional-order inductor and capacitor are also given in the paper, and the parameters of the equivalent circuits are solved by an undetermined coefficient method. Circuit simulations of the equivalent fractional-order memristive chaotic circuit are carried out in order to validate the correctness of numerical simulations and the practicability of using the integer-order equivalent circuit to substitute the fractional-order element.

This paper proposes a simple circuit configuration and a control strategy of Solid-State Transformer (SST). In the proposed circuit, it is possible to reduce the volume of heat sinks and passive components by using low voltage switching device with low loss characteristic and high frequency operation. Moreover, the circuit employed with the proposed control strategy operates stably even when the ripple voltage is large. Besides, the bidirectional operation of the proposed circuit is also confirmed by simulation. From the simulation result, the capacitance in each cell of the primary side (high voltage side) can be minimized to only 3 µF for 10-kVA system. Moreover, a miniature model with three cells is tested to confirm the fundamental operation of the proposed circuit. As a results, the sinusoidal waveform of the input current is obtained without the large distortion. the total harmonic distortion (THD) of the input current is 2.55%. In addition, it is confirmed that the primary side capacitor voltage of each cell is kept constant without the balance control.

In this paper, we present a low power bump circuit for finding similarity between two voltages. The circuit is based on a voltage correlator that in combination with a differential pair achieves the low power behavior. The circuit has low power consumption and low sensitivity when the different between the two input is large, but as they approach each other the sensitivity increases. The proposed circuit is very simple in design and can have more than 4 orders of magnitude less power consumption than the normal bump circuit.

This paper presents a new architecture for generating a multitude of circuit functions. The proposed computational structure will be able to amplify, multiply or square signals and, additionally, to replace a classical resistor with a both positive or negative resistance. As a consequence of using a multifunctional circuit, in order to realize four circuit function, the equivalent complexity for each implemented function can be strongly reduced. The newly proposed low-power low-voltage circuit has a minimal supply voltage of and its power consumption is between and .

This paper proposes a quantitative design method for a linear AC LED driver with a multi-level structure and a variable current regulator. The currently proposed circuit with a variable current regulator was found to drastically reduce the number of required circuit components by realizing a sinusoidal input current with only a single row of LEDs. However, it is necessary to adjust the parameters of the circuit components through simulations to properly design the circuit and realize its stable operation. In this paper, the operation of the currently proposed circuit is first described. Second, the losses of the circuit are calculated. The quantitative design of the circuit parameters is then suggested. Third, an experimental efficiency of 92.3% was confirmed, and the calculated and simulated efficiencies were 93.1% and 93.4% under the same design conditions. The experimental efficiency of 92.3% is 5.6% higher than that of the previous design. Next, a thermally designed circuit board was designed using a simulation for practical installation. Finally, conduction noise was experimentally measured.

This paper presents Series-Parallel Topology (SP) of magnetic coupling system for use in Wireless Power Transfer (WPT) applications. Configuration of the system is composed of rectifier circuit, inverter circuit and resonance circuit. Full bridge inverter circuit is powered by rectifier and its output is connected to the LC series resonant circuit. Moreover, the LC parallel circuit with resistance is serve as load of the topology. Electric equivalent circuit model is use to describe PS which yields reflected voltage, primary and secondary current and impedance of the system. The theory of the system is verified using an experimental setup connected to a circular primary coil and secondary coil. Various experiments are conducted for difference distance, arrangement, frequency, angle, and diameter. The analysis compares the efficiency of SP topology and its results are reported.

Aiming at the lack of standard design method and the shortcomings of main functions of the existing drive circuit, a “Element-level Design under Transmission Voltage Switch Theory” is set forth and a smallest circuit structure namely as drive-unit, which contains Superstratum-unit, Substratum-unit and LC-unit, is designed in this paper to achieve the necessary functions. The drive circuit of n×n ignition bridges has been got from the structure expansion formula along with the expected life estimation. The Ebers-Moll Model of transistor and the internal circuit of MOSFET were used to make a theoretical analysis and the conclusion of such analysis was verified by simulation subsequently. Actual measurement has been made and the results show that the circuit in simple structure has provided a strong loading ability and accurate output; some elements of the circuit have been heated when the circuit was working; and the response time of the circuit was of the microsecond-level.

The simulation of mixed circuit and electromagnetic (EM) structures is of major interest in most EM applications. Many of the developed methods involve modifying a SPICE-like solver to incorporate an EM numerical method, or to extend the EM numerical method to handle the circuit components (e.g., diodes, transistors, etc.) by reimplementing their model definitions. A novel technique has been developed to simulate combined linear/nonlinear circuit and EM problems in time domain. This technique utilizes the partial element equivalent circuit method as the EM solver and employs OrCAD as the circuit solver. The link between the two solvers is established by defining the circuits connected to the EM structure as ports and approximating each port's current-voltage relations at each time point by a system of linear equations. To demonstrate the capability of the developed method, four structures are examined. Good agreement of the results shows the feasibility of the developed method to solve this type of mixed problems. Since OrCAD is used for the circuit simulations, the need to modify a SPICE-like solver or to reimplement the definitions of the circuit devices has been removed. On the other hand, by manipulating the system of equations and proper optimization techniques, an optimal solver can be achieved.

This chapter contains sections titled: Frequency Response of a Transfer Function Frequency Response and Impedance of Simple Circuits Frequency Response for Ladder Networks Generalized Technique for Determining Frequency Response Problems

In this paper, mathematically rigorous RL circuits of high-frequency multi-winding transformers are identified using an original three-step numerical procedure. They are composed of frequency-independent coefficients and can therefore be introduced in classical circuit simulators. First, the finite-element method in 3-D magnetodynamics, together with homogenization techniques which reduce the overall computational burden, are employed to extract frequency-dependent impedances and voltage gains. Then, the identified equivalent circuit is modified by removing the static resistances from the impedances, so as to obtain frequency-independent voltage gains, or coupling coefficients. An algorithm which is valid for any number of windings is proposed to that end. Finally, the frequency-dependent impedances are identified to Foster networks with constant elements using an optimization algorithm. An experimental validation with an impedance analyzer is proposed.

A constant-current constant-voltage (CCCV) charge protocol is commonly used for lithium-ion batteries. The dynamic characteristic of the constant-voltage (CV) charging current is discovered to be related to battery aging. In order to quantitatively describe the load current during the CV charging period, an equivalent circuit model (ECM) based on the resistor-inductor (RL) network is proposed in this paper. Motivated by the current expression derived based on the conventional resistor–capacitor (RC) network-based ECM, an RL network-based ECM is developed to characterize the CV charging current. Then, the parallel-connected RL networks are employed to improve the model fidelity. The test data of four lithium iron phosphate (LiFePO4) batteries in different aging states are employed to validate the proposed model. Comparative results show that the proposed 2nd-order ECM is the best choice, considering both the model accuracy and complexity. In addition, a simplified 2nd-order model is proposed, achieving a satisfactory accuracy with only three model parameters to be identified. Therefore, this model can be easily implemented in the battery management system (BMS).

A high-performance current-mode, multi-input winner-take-all maximum circuit is introduced. Owing to low-impedance low-capacitance input nodes involved, the speed of the new circuit is higher than major counterparts. Simulation results show that the new circuit exhibits superior performance compared with well-known rival counterparts in terms of speed, area, dynamic range and power dissipation.

This article presents an unequal Gysel power divider (UGPD) based on circuit transformation, which is converted from a Π- to a T-type circuit. The Π-type circuit of a conventional unequal Gysel divider consists of two different value resistors and its connection transmission line. In the proposed T-type circuit, the dummy transmission line and the other transmission line with shunt resistor at center position is connected in parallel. Theoretical analysis was performed to derive the design equations for the proposed circuit conversion. For the validation of the circuit transformation, the UGPD using a T-type circuit at the center frequency of 2 GHz was fabricated and measured. The measured characteristics agreed well with the simulation results. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:1529–1531, 2015

Thin-film magnetic inductors are useful for integrated power delivery solutions for microprocessors and mobile devices. In many of these applications, the inductor dimensions have to be optimized simultaneously with the other circuit components, and thus accurate circuit models are required. Hence, we present an accurate physics-based circuit model that can capture the frequency dependency, losses, and the nonlinear behavior of thin-film magnetic inductors both for the uncoupled and coupled configurations. The model is based on the magnetic circuit description of the inductors with additional elements to model the frequency dependency within the magnetic material. The model is verified using vector network analyzer measurements of direct current biased inductors.

In the full bridge inverter circuit, when the switch tube suddenly opened or closed, the inductor current changes rapidly. Due to the existence of parasitic inductance of the main circuit. Therefore, the surge voltage between drain and source of the switch tube can be generated, which will have an impact on the switch and the output voltage. In order to ab sorb the surge voltage. An improve RCD buffer circuit is proposed in the paper. The peak energy will be absorbed through the buffer capacitor of the circuit. The part energy feedback to the power supply, another part release through the resistor in the form of heat, and the circuit can absorb the voltage spikes. This paper analyzes the process of the improved RCD snubber circuit, According to the specific parameters of the main circuit, a reasonable formula for calculating the resistance capacitance is given. A simulation model will be modulated in Multisim, which compared the waveform of tube voltage and the output waveform of the circuit without snubb...

SUMMARY This paper presents a low-power sinusoidal supply circuit for our proposed adiabatic logic (2PC2AL). The proposed supply circuit consists of three parts: LC resonant circuit, voltage generator circuit, and peak control circuit. The proposed circuit is simulated using 0.18 μm CMOS technology. The simulation results show that the power dissipation of the proposed voltage generator is 10.8 μW at a 100 nA load, and that of the proposed sinusoidal supply circuit is 35.5 μW at 100 kHz. The power dissipation values of the adiabatic/nonadiabatic 16-bit MPU decoders are also compared. At transition frequencies of 10 kHz to 1 MHz, the proposed decoder with a sinusoidal supply circuit shows a maximum reduction of 75% in power dissipation from to that of a static CMOS.

The Cauer-equivalent circuit of electric apparatus is synthesized by applying the model order reduction to the finite-element equations. In this method, the admittance function of a given electric apparatus is expressed by a rational polynomial from which the Cauer-equivalent circuit is directly synthesized. Magnetic saturation in the magnetic core is considered by introducing nonlinearity in the primal inductance of the circuit. The synthesized circuit is shown to express the input-output properties of inductors and induction heating devices in good accuracy.

In this article a new technique of process variation estimation in electrical circuit is presented. Technique is based on interval analysis application for a ladder circuit. Using this particular class of electrical circuit high speed of calculation could be achieved which is important in optimization and automated synthesis. In the article general ability of the technique application for a resistor circuit (with real impedance) is shown. Also ways of the technique extension for general circuit (with complex impedance) is discussed. Now the technique application is limited to passive network. The numerical experiments showed an agreement obtained results with statistical modeling with Monte Carlo Method. Further development of the technique is the extension to microwave circuit.

In this paper, a generalized fractional-order form of the simulated inductor using a single current feedback operational amplifier (CFOA) and a fractional-order capacitor is introduced. Analytical expression of the equivalent fractional-order inductor versus the circuit elements is achieved. Moreover, the effect of the parasitic impedance and the non-idealities of the CFOA are investigated analytically with numerical simulations and circuit equivalent. Circuit simulations are discussed using AD844 spice model to validate the theoretical study of the fractional-order inductor. Simulations show an extra degree of freedom in selecting the impedance value and the phase shift compared to the conventional realization. As an application, a fractional order low pass filter is simulated to verify the performance of the proposed circuit.

Multi-cell diode-capacitor/inductor based boost derived DC-DC converter provides a simple solution for high step-up voltage regulation in solar and fuel cell generation. However, many passive components increase the order of system model and complexity. Transient modeling analysis reveals that time constant of each component in diode-capacitor/inductor network is much smaller than that of other circuit if the directly charging and discharge processes between capacitor through diode is fast enough. The voltage/current relationship of each capacitor/inductor in multi-cell network is fixed. Multi-cell diode-capacitor/inductor network can be seemed as multi-stage DC transformer. Based on the unique feature, this paper proposes the reduced-order modeling approach for high step-up DC-DC converter with multi-cell diode-capacitor/inductor network. Finally, simulation and experiments verify the correctness and effectiveness of new modeling approach. The unified reduced-order model contributes to better understanding of circuit characteristic and simplification of controller parameters design.

Parallel synchronized switch harvesting on inductor (P-SSHI) circuits have been proved to enhance piezoelectric vibration energy harvesting (PVEH), but the maximum conversion efficiency is obtained only when the voltage across the storage capacitor (VSC) equates to the optimal value. For bi-stable rotating PVEH with nonlinear magnetic force in engineering applications, however, the VSC will change greatly when powering real electric loads, thus it is impossible to maintain high conversion efficiency. In order to solve this problem, this paper presents an improved P-SSHI circuit with controllable optimal voltage (COV-PSSHI) by using a voltage control strategy between the storage capacitor and the electric load. The innovation is to control and maintain the VSC close to the optimal value. Firstly, the COV-PSSHI circuit is proposed and its theoretic model is built in detail. Then its average harvested power (AHP) is theoretically derived and AHP of the COV-PSSHI circuit is proved to be more than that of a classical P-SSHI circuit. In the end, experiments are performed to validate the performance of the COV-PSSHI circuit. It can be seen that the COV-PSSHI circuit can increase the AHP by factor 1.25 compared with classical P-SSHI circuits, which is enough to intermittently power the wireless sensor node. Also power consumption of the voltage control circuit has few effects on the COV-PSSHI circuit. In particular, it needs to optimize the envelop capacitor, the parallel inductor and two threshold voltages of the voltage controller in order to implement the COV-PSSHI circuit well in practice.

The present paper reports a first order nonlinear retarded type time-delayed chaotic and hyperchaotic electronic circuit. The proposed circuit has three distinct advantages over the existing time-delayed circuits. First, it has a nonlinearity that is expressed by closed form mathematical functions, which makes the analysis and design of the circuit easier. Second, the time-delay part of the proposed circuit is realized with an active All-Pass Filter (APF), in which no inductor is used, and the variation of delay is obtained simply by the variation of a resistor, which is more advantageous than to vary the inductor in LCL delay blocks that is widely used in all the time-delayed circuits existing in the literature. Third, the circuit shows hyperchaos even for a moderate time-delay. We describe the systematic design procedure of the circuit, and whenever necessary, the experimental results are corroborated by the numerical computations. We show that the circuit shows limit cycle oscillation, bifurcation scenario, chaotic and hyperchaotic oscillations.

Recently, the demand for low-voltage low-power integrated circuits design has grown dramatically. For battery-operated devices both the supply voltage and the power consumption have to be lowered in order to prolong the battery life. This paper presents an attractive approach to designing a low-voltage low-power high-precision differential-input buffered and external transconductance amplifier, DBeTA, based on the bulk-driven technique. The proposed DBeTA possesses rail-to-rail voltage swing capability at a low supply voltage of ±400 mV and consumes merely 62 μW. The proposed circuit is a universal active element that offers more freedom during the design of current-, voltage-, or mixed-mode applications. The proposed circuit is particularly interesting for biomedical applications requiring low-voltage low-power operation capability where the processing signal frequency is limited to a few kilohertz. An oscillator circuit employing a minimum number of active and passive components has been described in this paper as one of many possible applications. The circuit contains only a single active element DBeTA, two capacitors, and one resistor, which is very attractive for integrated circuit implementation. PSpice simulation results using the 0.18 μm CMOS technology from TSMC are included to prove the unique results.

A novel polarity inversion dc-dc power conversion circuit that features the high input to output step-up voltage conversion ratio characteristics is presented for high voltage DC power supply applications. The proposed circuit features the reduced voltage stresses of the components compared to those of the conventional ones. The operational principles of the proposed circuit are analyzed and comparative features are presented. The simulation results and experimental results are presented to verify the validity of the proposed circuit.

The behavior of a novel frequency divider circuit using negative differential resistance (NDR) circuit is studied. This NDR circuit is made of resistors (R) and bipolar-junction-transistor (BJT) devices. It can show the NDR characteristic in its combined current-voltage curve by suitably arranging the resistances. We call this NDR circuit as R-BJT-NDR circuit in this paper. A chaos circuit consisted of an R-BJT-NDR device, an inductor, and a capacitor is investigated. It demonstrates the period-adding sequences which appear in its bifurcation diagram to perform the frequency division. We investigate the effects of the input frequency and input amplitude on the operation.

In this study we describe how to build an inductorless version of the classic Chua's circuit. A suitable inductor for Chua's circuit is often hard to procure. The required inductor for the circuit is designed using simple circuit elements such as resistors, capacitors and operational amplifiers. The complete circuit can be implemented by using off-the-shelf components, and it can readily be integrated on a single chip. This design of Chua's circuit allows the original dynamics to be slowed down to just a few hertz, enabling implementation of sophisticated control schemes without severe time restrictions. Another novel feature of the circuit is that losses associated with capacitors due to leakages can easily be compensated by providing negative resistance using the same setup. The chaotic behaviour of the circuit is verified by PSpice and Multisim simulation and also by experimental study on a circuit breadboard. The results give excellent agreement with each other and with the results of previous investi...

A CMOS current-mode circuit, with only eight transistors and two current sources, is proposed to implement a fractional power function. The compact circuit comprises of an approximating logarithm circuit and an approximating exponential circuit. By sizing one transistor and tuning one current source, we improve the truncation errors in the Taylor series approximation, and reduce the MOS square-law errors that are caused by second-order effects. As example, a circuit, designed for gamma correction, with different gamma values controlled by three switches, is fabricated using 0.35 μm CMOS technology. The demonstration circuit can achieve a bandwidth of 155 MHz for an input range from 40 μA to 130 μA with 3% error, and maximum power dissipation of approximately 970 μW.

Aiming at the demerit of the traditional flux coupling driving circuit, an improved driving circuit is proposed which has some advantages, such as simple structure, low cost, the driving source isolated from the main circuit, etc. The proposed circuit can be used on the maximum power point tracking circuit of solar cell which has a wide range duty cycle. The circuit principle analysis is given. At last, experimental results are provided to verify its practicability.

This paper proposes third order tunable bandwidth active Switched-Capacitor filter. The circuit consists of only op-amps and switched capacitors. The circuit is designed for circuit merit factor Q = 10. The proposed circuit implements three filter functions low pass, band pass and high pass simultaneously in single circuit. The filter circuit can be used for both narrow as well as for wide bandwidth. For various values of cut-off frequencies the behaviour of circuit is studied. The circuit works properly only for higher central frequencies, when f0 > 10 kHz.

An equivalent circuit model of a novel photodetector (PD) is proposed in this article. We use this model to describe the relation between the bias voltage and current (I–V), also the bias voltage and capacitance(C–V) of this kind of novel PD. The circuit model could optimize the structure of the circuit and could be linked with the readout circuit. According to the comparison between the simulation result and the experimental result by circuit testing, we could find they are in good agreement, which proving the correctness of the equivalent circuit model. The signification of this equivalent circuit model is to design an optimal readout circuit (ROIC) for the novel PD.

A novel voltage measurement circuit which utilizes process variation is proposed. Using the proposed circuit, the voltage of a nonperiodic waveform at a particular time point can be accurately captured by a single clock pulse (one-shot measurement). The proposed circuit can be designed without compensation circuits against process variation, and thus occupies only a small area. An analytical expression of offset voltage for the comparator utilizing process variation (UPV-comparator), which plays a key role in the proposed circuit, is derived and design considerations for the proposed circuit are discussed. The circuit operation is confirmed through SPICE simulation using 90nm CMOS device models. The -0.04 and -3dB bandwidths (99% and 50% amplitudes) of the proposed circuit are about 10MHz and far over 1GHz, respectively. The circuit area is also estimated using an experimental layout.

A detailed analysis of the mathematical model of a random-structure RC two-terminal network is performed. It is shown that a circuit of any RC two-terminal network can be reduced to a universal form consisting of a set of parallel branches. Each branch corresponds to a single relaxation process and represents a circuit of serially connected resistance and capacitor. The equivalent circuit under consideration is a compact representation of experimental data obtained using the impedance spectroscopy method. It is recommended to use the universal circuit as an intermediate model of an electrochemical cell.

An original active resistor circuit will be presented. The main advantages of the new proposed implementations are the improved linearity, small area consumption and improved frequency response. An original technique for linearizing the I(V) characteristic of the active resistor will be proposed, based on the utilization of a new linear differential amplifier, and on a current-pass circuit. The linearization of the original differential structure is achieved by compensating the quadratic characteristic of the MOS transistor operating in the saturation region by an original square-root circuit. The errors introduced by the second-order effects will be strongly reduced, while the circuit frequency response of the circuit is very good as a result of operating all MOS transistors in the saturation region. In order to design a circuit having a negative equivalent resistance, an original method specific to the proposed implementation of the active resistor circuit will be presented. The circuit is implemented in 0.35 μm CMOS technology, the SPICE simulation confirming the theoretical estimated results and showing a linearity error under a percent for an extended input range (± 500 mV) and a small value of the supply voltage (± 3 V).

In this paper, structural sound and vibration control using passive and semi-active shunt piezoelectric damping circuits is presented. A piezoelectric patch with an electrical shunt circuit is bonded to a base structure. When the structure vibrates, the piezoelectric patch strains and transforms the mechanical energy of the structure into electrical energy, which can be effectively dissipated by the shunt circuit. Hence, the shunt circuit acts as a means of extracting mechanical energy from the base structure. First, different types of shunt circuits (such as RL series circuit, RL parallel circuit and RL-C circuit), employed in the passive damping arrangement, are analyzed and compared. By using the impedance method, the general modelling of different shunt piezoelectric damping techniques is presented. The piezoelectric shunt circuit can be seen as additional frequency-dependence damping of the system. One of the primary concerns in shunt damping is to choose the optimal parameters for shunt circuits. In past efforts most of the proposed tuning methods were based on modal properties of the structure. These methods are used to minimize the response of a particular structural mode whilst neglecting the contribution of the other modes. In this study, a design method based on minimization of the sound power of the structure is proposed. The optimal parameters for shunt circuits are obtained using linear quadratic optimal control theory. In general, the passive shunt circuit techniques are an effective method of modal damping. However, the main drawback of the passive shunt circuit is that the shunt piezoelectric is very sensitive to tuning errors and variations in the excitation frequency. To overcome this problem, the pulse-switching shunt circuit, a semi-active continuous switching technique in which a RL shunt circuit is periodically connected to a bonded piezoelectric patch, is introduced as structural damping. The switch law for pulse-switching circuit is discussed based on the energy dissipation technique. Compared with a standard passive piezoelectric shunt circuit, the advantages of the pulse-switching shunt circuit is a small required shunt inductance, a lower sensitivity to environmental changes and easier tuning. Very low external power for the switch controller is required so it may be possible to extract this energy directly from the vibration of the structure itself. Numerical simulations are performed for each of these shunts techniques focusing on minimizing radiated sound power from a clamped plate. It is found that the RL series, RL parallel and pulse-switching circuits have basically the same control performance. The RL–C parallel circuit allows us to reduce the value of the inductance L due to the insertion of an external capacity C. However, the control performance will be reduced simultaneously. The pulse-switching circuit is more stable than RL series circuit with regard to structural stiffness variations. Finally, experimental results are presented using an RL series/parallel shunt circuit, RL-C parallel shunt circuit and pulse-switching circuit. The experimental results have shown that the vibration and noise radiation of a structure can be reduced significantly by using these shunt circuits. The theoretical and experimental techniques presented in this study provide a valuable tool for effective shunt piezoelectric damping.

To compensate voltage error of the channel selecting filter, a current comparison type voltage tuning circuit is designed. Because the proposed current comparison type voltage tuning circuit is not need to attach another subcircuit, the chip size can be reduced, therefore the proposed circuit is very useful in the low voltage and low power channel filter. We used three channels including bluetooth communication system as application circuits of the proposed tuning circuit. As the results of HSPICE simulation using CMOS technology verify that the proposed tuning circuit respectively can be operated in , and in three channel.