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A purely planar graphene/SiC fieldeffect transistor is presentedhere. The horizontal current flow over one-dimensional tunneling barrierbetween planar graphene contact and coplanar two-dimensional SiC channelexhibits superior on/off ratio compared to conventional transistorsemploying vertical electron transport. Multilayer epitaxial graphene(MEG) grown on SiC(0001̅) was adopted as the transistor sourceand drain. The channel is formed by the accumulation layer at theinterface of semi-insulating SiC and a surface silicate that formsafter high vacuum high temperature annealing. Electronic bands betweenthe graphene edge and SiC accumulation layer form a thin Schottkybarrier, which is dominated by tunneling at low temperatures. A thermionicemission prevails over tunneling at high temperatures. We show thatneglecting tunneling effectively causes the temperature dependenceof the Schottky barrier height. The channel can support current densitiesup to 35 A/m. [ABSTRACT FROM AUTHOR]

Electronic quality epitaxial graphene has been selectively grown on silicon carbide capped with a patterned aluminum nitride layer, providing a pathway to produce device structures that avoid lithographic patterning of graphene itself. Patterning of the cap exposes SiC where graphene will grow. Capped areas inhibit graphene growth and withstand graphitization temperatures up to 1420°C under 100 Pa of argon pressure. Graphene Hall bars were fabricated and characterized by scanning Raman spectroscopy, ellipsometry, and transport measurements. Hall-mobility is about 600 cm2/V s and can be further enhanced by fine tuning the argon pressure and improving the quality of SiC surface prior to graphitization. [ABSTRACT FROM AUTHOR]

Graphene is generally considered to be a strong candidate to succeed silicon as an electronic material. However, to date, it actually has not yet demonstrated capabilities that exceed standard semiconducting materials. Currently demonstrated viable graphene devices are essentially limited to micrometre-sized ultrahigh-frequency analogue field effect transistors and quantum Hall effect devices for metrology. Nanoscopically patterned graphene tends to have disordered edges that severely reduce mobilities thereby obviating its advantage over other materials. Here we show that graphene grown on structured silicon carbide surfaces overcomes the edge roughness and promises to provide an inroad into nanoscale patterning of graphene. We show that high-quality ribbons and rings can be made using this technique. We also report on the progress towards high-mobility graphene monolayers on silicon carbide for device applications. [ABSTRACT FROM AUTHOR]