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The linear accelerators employed to drive Free Electron Lasers (FELs), such as the X-ray Free Electron Laser (XFEL) currently being built in Hamburg, require sophisticated control systems. The Low Level Radio Frequency (LLRF) control system should stabilize the phase and amplitude of the electromagnetic field in accelerating modules with tolerances below 0.02 % for amplitude and 0.01 degree for phase to produce ultra-stable electron beam that meets the conditions required for Self-Amplified Spontaneous Emission (SASE). The LLRF control system of 32-cavity accelerating module of the XFEL accelerator requires acquisition of more than 100 analogue signals sampled with frequency around 100 MHz. Data processing in real-time loop should complete within a few hundreds of nanoseconds. Moreover, the LLRF control system should be reliable, upgradable and serviceable. The Advanced Telecommunications Computing Architecture (ATCA) standard, developed for telecommunication applications, can fulfil all of the above mentioned requirements. The paper presents the architecture of a prototype LLRF control system developed for the XFEL accelerator. The control system composed of ATCA carrier boards with Rear Transition Modules (RTM) is able to supervise 32 cavities. The crucial submodules, like DAQ, Vector Modulator or Timing Module, are designed according to AMC specification. The paper discusses results of the LLRF control system tests that were performed at the FLASH accelerator (DESY, Hamburg) during machine studies.

Linear accelerators driving Free Electron Lasers (FELs), such as the Free Electron Laser in Hamburg (FLASH) or the X-ray Free Electron Laser (XFEL), require sophisticated Low Level Radio Frequency (LLRF) control systems. The controller of the LLRF system should stabilize the phase and amplitude of the field in accelerating modules below 0.02% of the amplitude and 0.01 degree for phase tolerances to produce an ultra stable electron beam that meets the required conditions for Self-Amplified Spontaneous Emission (SASE). Since the LLRF system for the XFEL must be in operation for the next 20 years, it should be reliable, reproducible and upgradeable. Having in mind all requirements of the LLRF control system, the Advanced Telecommunications Computing Architecture (ATCA) has been chosen to build a prototype of the LLRF system for the FLASH accelerator that is able to supervise 32 cavities of one RF station. The LLRF controller takes advantage of features offered by the ATCA standard. The LLRF system consists of a few ATCA carrier blades, Rear Transition Modules (RTM) and several Advanced Mezzanine Cards (AMCs) that provide all necessary digital and analog hardware components. The distributed hardware of the LLRF system requires a number of communication links that should provide different latencies, bandwidths and protocols. The paper presents the general view of the ATC A-based LLRF system, discusses requirements and proposes an application for various interfaces and protocols in the distributed LLRF control system.

The paper describes the hardware and software architecture of a control and measurement system for electromagnetic field stabilization inside the radio frequency electron gun, in FLASH experiment. A complete measurement path has been presented, including I and Q detectors and FPGA based, low latency digital controller. Algorithms used to stabilize the electromagnetic field have been presented as well as the software environment used to provide remote access to the control device. An input signal calibration procedure has been described as a crucial element of measurement process.

The work describes integrated system of hardware controller and simulator of superconductive cavity. The controller was realized on FPGA chip Xilinx-VirtexII-V4000. The solution uses DSP EMBEDDED BOARD positioned on a LLRF Modular Control Platform. The algorithm was realized in VHDL using hardware multiplication components existing in VirtexII series of chips. There was obtained implementation of a device working in real-time according to the control condition demands of LLRF system for TESLA superconductive cavities. The system is predicted as a developmental stage for FLASH accelerator and FEL laser and next for XFEL. The paper describes in detail functional layer, parameter programming, control basics for particular blocks, monitoring of real-time processes. There are presented results of system usage for control of the module ACC1 of FLASH laser.© (2006) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The paper presents an idea, design and realization of a gigabit, optoelectronic synchronous massive data concentrator for the LLRF control system for FLASH and XFEL superconducting accelerators and lasers. The design bases on a central, large, programmable FPGA VirtexIIPro circuit by Xilinx and on eight commercial optoelectronic transceivers. There were implemented peripheral devices for embedded PowerPC block like: memory and Ethernet. The SIMCON 4.0 module was realized as a single, standard EURO-6HE board with VXI/VME-bus. Hardware implementation was described for the most important functional blocks. Construction solutions were presented.

LLRF control system consists of a few basic subsystems with the basic aim to give good quality beam from the XFEL laser. Some of the se subsystems, which are described here are: transient detector, finite state machine, precise timing distribution network, EM field stabilization control loop, etc. The paper summarizes the latest developments of these systems done during the last year.

The paper describes integrated system of hardware controller and simulator of the resonant superconducting, narrowband niobium cavity, originally considered for the TTF and TESLA in DESY, Hamburg (now predicted for the VUV and X-Ray FEL). The controller bases on a programmable circuit Xilinx VirtexII V3000 embedded on a PCB XtremeDSP Development Kit by Nallatech. The FPGA circuit configuration was done in the VHDL language. The internal hardware multiplication components, present in Virtex II chips, were used, to improve the floating point calculation efficiency. The implementation was achieved of a device working in the real time, according to the demands of the LLRF control system for the TESLA Test Facility. The device under consideration will be referred to as superconducting cavity (SCCav) SIMCON throughout this work. The following components are described here in detail: functional layer, parameter programming, foundations of control of particular blocks and monitoring of the real time processes. This note is accompanied by the one describing the DOOCS interface for the described hardware system. The interface was prepared in DOOCS and in Windows. The hardware and software of SIMCON was tested in CHECIA. The results were presented. While giving all necessary technical details required to understand the work of the integrated hardware controller and simulator and to enable its practical copying, this document is a unity with other TESLA technical notes published by the same team on the subject. Modeling was omitted, as it is addressed in detail in the quoted references.

The paper describes integrated system of hardware controller and simulator of the resonant superconducting, narrowband niobium cavity, originally considered for the TTF and TESLA in DESY, Hamburg (now predicted for the VUV and X-Ray FEL). The controller bases on a programmable circuit Xilinx VirtexII V3000 embedded on a PCB XtremeDSP Development Kit by Nallatech. The FPGA circuit configuration was done in the VHDL language. The internal hardware multiplication components, present in Virtex II chips, were used, to improve the floating point calculation efficiency. The implementation was achieved of a device working in the real time, according to the demands of the LLRF control system for the TESLA Test Facility. The device under consideration will be referred to as superconducting cavity (SCCav) SIMCON throughout this work. The following components are described here in detail: functional layer, parameter programming, foundations of control of particular blocks and monitoring of the real time processes. This note is accompanied by the one describing the DOOCS interface for the described hardware system. The interface was prepared in DOOCS and in Windows. The hardware and software of SIMCON was tested in CHECIA. The results were presented. While giving all necessary technical details required to understand the work of the integrated hardware controller and simulator and to enable its practical copying, this document is a unity with other TESLA technical notes published by the same team on the subject. Modeling was omitted, as it is addressed in detail in the quoted references.

The paper describes design, construction and initial measurements of an eight channel electronic LLRF device predicted for building of the control system for the W-FEL accelerator at DESY (Hamburg). The device, referred in the paper to as the SIMCON 3.0 (from the SC cavity simulator and controller) consists of a 16 layer, VME size, PCB, a large FPGA chip (VirtexII-4000 by Xilinx), eight fast ADCs and four DACs (by Analog Devices). To our knowledge, the proposed device is the first of this kind for the accelerator technology in which there was achieved (the FPGA based) DSP latency below 200 ns. With the optimized data transmission system, the overall LLRF system latency can be as low as 500 ns. The SIMCON 3.0 sub-system was applied for initial tests with the ACCl module of the VUV FEL accelerator (eight channels) and with the CHECHIA test stand (single channel), both at the DESY. The promising results with the SIMCON 3.0. encouraged us to enter the design of SIMCON 3.1. possessing 10 measurement and control channels and some additional features to be reported in the next technical note. SIMCON 3.0. is a modular solution, while SIMCON 3.1. will be an integrated board of the all-in-one type. Two design approaches - modular and all-in-one - after branching off in this version of the Simcon, will be continued.© (2006) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The paper describes integrated system of hardware controller and simulator of the resonant superconducting, narrowband niobium cavity, originally considered for the TTF and TESLA in DESY, Hamburg (now predicted for the VUV and X-Ray FEL). The controller bases on a programmable circuit Xilinx VirtexII V3000 embedded on a PCB XtremeDSP Development Kit by Nallatech. The FPGA circuit configuration was done in the VHDL language. The internal hardware multiplication components, present in Virtex II chips, were used, to improve the floating point calculation efficiency. The implementation was achieved of a device working in the real time, according to the demands of the LLRF control system for the TESLA Test Facility. The device under consideration will be referred to as superconducting cavity (SCCav) SIMCON throughout this work. The following components are described here in detail: functional layer, parameter programming, foundations of control of particular blocks and monitoring of the real time processes. This note is accompanied by the one describing the DOOCS interface for the described hardware system. The interface was prepared in DOOCS and in Windows. The hardware and software of SIMCON was tested in CHECIA. The results were presented. While giving all necessary technical details required to understand the work of the integrated hardware controller and simulator and to enable its practical copying, this document is a unity with other TESLA technical notes published by the same team on the subject. Modeling was omitted, as it is addressed in detail in the quoted references.

The paper describes design, construction and initial measurements of an eight channel electronic LLRF device predicted for building of the control system for the VUV-FEL accelerator at DESY (Hamburg). The device, referred in the paper to as the SIMCON 3.0 (from the SC cavity simulator and controller) consists of a 16 layers, VME size, PCB, a large FPGA chip (VirtexII-4000 by Xilinx), eight fast ADCs and four DACs (by Analog Devices). To our knowledge, the proposed device is the first of this kind for the accelerator technology in which there was achieved (the FPGA based) DSP latency below 200 ns. With the optimized data transmission system, the overall LLRF system latency can be as low as 500 ns. The SIMCON 3.0 sub-system was applied for initial tests with the ACC1 module of the VUV FEL accelerator (eight channels) and with the CHECHIA test stand (single channel), both at the DESY. The promising results with the SIMCON 3.0 encouraged us to enter the design of SIMCON 3.1 possessing 10 measurement and control channels and some additional features to be reported in the next technical note. SIMCON 3.0 is a modular solution, while SIMCON 3.1 will be an integrated board of the all-in-one type. Two design approaches - modular and all-in-one, after branching off in this version of the SIMCON, will be continued.

The paper presents a flexible electronic tool for VXI register-based device development. Its prototype has been designed on a breadboard containing a one FPGA chip. The most of logic needed is described in a VHDL code which allows its easy updating. A resonance cavity controller is an application example of the tool in question.

The paper describes possible configuration of hardware and a bunch of Matlab functions of controller and simulator of the resonant superconducting, narrowband niobium cavity, originally considered for the TTF and TESLA in DESY, Hamburg (now predicted for the VUV and X-Ray FEL). The configuration of the hardware can be done in different ways to achieve the most adequate setup to the requirements. There is described set of basic Matlab functions for advanced users and developers of control algorithms. The functions allow to configure basic features and functionality of the SIMCON device.

The work describes, standardized, modular and interactive, (optical) broadband Internet based, information system for a research and didactic unit active in the university environment. The logical structure of the system was designed and realized. The structure of logical interconnections between the scientific and didactic information was embedded in the database. New solutions for the broadband processing and presentations layers were proposed. The theoretical and design considerations were implemented practically for one of the research departments at the Warsaw University of Technology. Chosen examples of the system in action were quoted.

The paper describes design and practical realization of software for laboratory purposes to control FPGA-based photonic and electronic equipment. There is presented a universal solution for all relevant devices with FPGA chips and gigabit optical links. The paper describes architecture of the software layers and program solutions of hardware communication based on Internal Interface (II) technology. Such a solution was used for superconducting Cavity Controller and Simulator (SIMCON) for the TESLA experiment in DESY (Hamburg). A number of practical examples of the software solutions for the SIMCON system were given in this paper.

The paper describes design and performance of the DOOCS (distributed, object oriented) based control system for the cavity simulator and controller (SIMCON). A concise description of the DOOCS system is given. Resident data types and data flow throughout the Simcon system are discussed. The basic ideas and implementation issues of the server and client application are described as well as some alternatives to the DOOCS solution (considered as partial) is presented.