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An ultra-low power (ULP), energy-harvesting system-on-chip, that can operate in various application scenarios, is needed for enabling the trillions of Internet-of-Things (IoT) devices. However, energy from the ambient sources is little and system power consumption is high. Circuits and system development require an optimal use of available energy. In this paper, we present circuits that can improve the energy utilization in an IoT device by providing improvements at critical points of the flow of harvested energy. A boost converter circuit, that can harvest energy from 10-mV input voltage and a few nanowatt of input power, makes more harvested energy available for the IoT device. A single-inductor-multiple-output buck-boost converter provides high-efficiency and low-voltage power management solution to put most of the harvested energy for system use. A real time clock and ULP bandgap reference circuit significantly reduce the standby power consumption. The proposed ULP circuits are developed in 130-nm CMOS technology. The combined effects of these circuits and the system design technique can improve the life-time of an example IoT device by over four times in higher power consumption mode and over 70 times in ULP mode.

This paper presents an ultra-low power crystal (XTAL) oscillator circuit for generating a 32.768 kHz clock source for real-time clock generation. An inverting amplifier operational from 0.3 V $V_{DD}$ oscillates the XTAL resonator and achieves a power consumption of 2.1 nW. A duty-cycling technique powers down the XTAL amplifier without losing the oscillation and reduces the power consumption to 1.5 nW. The proposed circuit is implemented in 130 nm CMOS with an area of $0.0625\ \text{mm}^{2}$ and achieves a temperature stability of 1.85 ppm/°C.

This paper presents a model of inductor based DC-DC converters that can be used to study the impact of power management techniques such as dynamic voltage and frequency scaling (DVFS). System level power models of low power systems on chip (SoCs) and power management strategies cannot be correctly established without accounting for the associated overhead related to the DC-DC converters that provide regulated power to the system. The proposed model accurately predicts the efficiency of inductor based DC-DC converters with varying topologies and control schemes across a range of output voltage and current loads. It also accounts for the energy and timing overhead associated with the change in the operating condition of the regulator. Since modern SoCs employ power management techniques that vary the voltage and current loads seen by the converter, accurate modeling of the impact on the converter efficiency becomes critical. We use this model to compute the overall cost of two power distribution strategies for a SoC with multiple voltage islands. The proposed model helps us to obtain the energy benefits of a power management technique and can also be used as a basis for comparison between power management techniques or as a tool for design space exploration early in a SoC design cycle.

This paper presents an ultra-low power batteryless energy harvesting body sensor node (BSN) SoC fabricated in a commercial 130 nm CMOS technology capable of acquiring, processing, and transmitting electrocardiogram (ECG), electromyogram (EMG), and electroencephalogram (EEG) data. This SoC utilizes recent advances in energy harvesting, dynamic power management, low voltage boost circuits, bio-signal front-ends, subthreshold processing, and RF transmitter circuit topologies. The SoC is designed so the integration and interaction of circuit blocks accomplish an integrated, flexible, and reconfigurable wireless BSN SoC capable of autonomous power management and operation from harvested power, thus prolonging the node lifetime indefinitely. The chip performs ECG heart rate extraction and atrial fibrillation detection while only consuming 19 μW, running solely on harvested energy. This chip is the first wireless BSN powered solely from a thermoelectric harvester and/or RF power and has lower power, lower minimum supply voltage (30 mV), and more complete system integration than previously reported wireless BSN SoCs.

We propose a fully on-chip CMOS temperature sensor in which a sub-threshold (sub-VT) proportional-to-absolute-temperature (PTAT) current element starves a current-controlled oscillator (CCO). Sub-VT design enables ultra-low-power operation of this temperature sensor. However, such circuits are highly sensitive to process variations, thereby causing varying circuit currents from die to die. We propose a bit-weighted current mirror (BWCM) architecture to resist the effect of process-induced variation in the PTAT current. The analog core constituting the PTAT, the CCO, and the BWCM is operational down to 0.2 V supply voltage. A digital block operational at 0.5 V converts the temperature information into a digital code that can be processed and used by other components in a system-on-chip (SoC). The proposed temperature sensor system also supports resolution-power trade-off for Internet-of-things (IoT) applications with different sampling rates and energy needs. The system power consumption is 23 nW and the maximum temperature inaccuracy is +1.5/−1.7 °C from 0 °C to 100 °C with a two-point calibration. The temperature sensor system was designed in a 130 nm CMOS technology and its total area is 250 × 250 μm2.

This paper presents a batteryless system-on-chip (SoC) that operates off energy harvested from indoor solar cells and/or thermoelectric generators (TEGs) on the body. Fabricated in a commercial 0.13 $\mu{\rm W}$ process, this SoC sensing platform consists of an integrated energy harvesting and power management unit (EH-PMU) with maximum power point tracking, multiple sensing modalities, programmable core and a low power microcontroller with several hardware accelerators to enable energy-efficient digital signal processing, ultra-low-power (ULP) asymmetric radios for wireless transmission, and a 100 nW wake-up radio. The EH-PMU achieves a peak end-to-end efficiency of 75% delivering power to a 100 $\mu{\rm A}$ load. In an example motion detection application, the SoC reads data from an accelerometer through SPI, processes it, and sends it over the radio. The SPI and digital processing consume only 2.27 $\mu{\rm W}$ , while the integrated radio consumes 4.18 $\mu{\rm W}$ when transmitting at 187.5 kbps for a total of 6.45 $\mu{\rm W}$ .

Batteryless operation and ultra-low-power (ULP) wireless communication will be two key enabling technologies as the IC industry races to keep pace with the IoE projections of 1T-connected sensors by 2025. Bluetooth Low-Energy (BLE) is used in many consumer IoE devices now because it offers the lowest average power for a radio that can communicate directly to a mobile device [1]. The BLE standard requires that the IoE device continuously advertises, which initiates the connection to a mobile device. Sub-1s advertisement intervals are common to minimize latency. However, this continuous advertising results in a typical minimum average power of 10's of µW at low duty-cycles. This leads to the quoted 1-year lifetimes of event-driven IoE devices (e.g. tracking tags, ibeacons) that operate from coin-cell batteries. This minimum power is too high for robust, batteryless operation in a small form-factor.

A proportional-to-absolute-temperature (PTAT) current element along with a current controlled oscillator (CCO) operational down to 0.2 V supply enables an ultra-low-power (ULP) temperature sensor. A bit-weighted current mirror (BWCM) architecture resists process-induced variation in the PTAT current. The power consumption is 23nW and the maximum inaccuracy is +1.5/-1.7°C from 0°C to 100°C with a 2-point calibration.

This paper presents an ultra-low swing level converter with integrated charge pumps that shows measured conversion in a 130nm CMOS test chip from an input at 145mV swing to a 1.2V output. Lowering the input allowable for a single ended level converter supports energy harvesting systems that need to use very low voltages.

A 1 trillion node internet of things (IoT) will require sensing platforms that support numerous applications using power harvesting to avoid the cost and scalability challenge of battery replacement in such large numbers. Previous SoCs achieve good integration and even energy harvesting [1][2][3], but they limit supported applications, need higher end-to-end harvesting efficiency, and require duty-cycling for RF communication. This paper demonstrates a highly integrated, flexible SoC platform that supports multiple sensing modalities, extracts information from data flexibly across applications, harvests and delivers power efficiently, and communicates wirelessly.

Most systems require a voltage reference independent of variation of power supply, process, or temperature, and a bandgap voltage reference (BGR) often serves this purpose. For ultra-low power (ULP) systems, the BGR may constitute a significant component of standby power, and the system start-up voltage is often determined by the voltage, V in , at which the BGR becomes operational. Lowering V in can also allow an ULP system to continue operation longer as its battery or energy harvested input voltage decreases. The minimum V in for state-of-the-art BGRs is restricted by V EB +V DS [1], where V EB is the emitter-base voltage of a pnp transistor, and V DS is the drain-source saturation voltage of a MOS transistor. Recent work brings the V in voltage down to 700mV [2]. There is a need to reduce the standby power and V in of a BGR to increase the lifetime of ULP systems. This paper presents a BGR circuit with measured minimum operating V in of 500mV, reducing the V in of [2] by 1.4x. Further, the power consumption of the proposed circuit is 32nW, which is 1.6x lower than the non-duty cycled BGR reported in [2]. A 2x-charge pump based bandgap core, a switched-capacitor network (SCN), and a current controlled oscillator and clock doubler circuit enable a BGR with a temperature variation of 75ppm/°C and power supply rejection (PSR) of up to −52dB at DC.

A boost converter for thermoelectric energy harvesting in 130nm CMOS reduces the achievable input voltage by 50% to 10mV, which allows wearable body sensors to continue operation with thermal gradients below 1oC. The design uses a peak inductor current control scheme and duty cycled, offset compensated comparators to maintain high efficiency across a broad range of input and output voltages. The measured efficiency ranges from 53% at VI=20mV to a peak efficiency of 83% at VI=300mV.

This paper presents a single inductor energy harvesting and power management (EHM) unit for ultra-low power (ULP) systems. The proposed circuit harvests energy from solar cells from 0.38V input voltage (Vin) and provides 4 output voltages - storage at 5V and V DD s at 3.3V, 1.5V and 1.2V. A peak inductor current control scheme enables high efficiency operation across wide input and output voltage range. The IC supports maximum power point tracking, battery management, and cold starts from 0.38V Vin.

This paper presents an ultra-low swing level converter with integrated charge pumps that shows measured conversion in a 130-nm CMOS test chip from an input at a 145-mV swing to a 1.2-V output. Lowering the input allowable for a single-ended level converter supports energy harvesting systems that need to use very low voltages.

We propose a fully on-chip clock-source system in which an ultra-low-power diode-based temperature-uncompensated oscillator (OSC[ subscript diode]) serves as the main clock source and frequency locks to a higher-power temperature-compensated oscillator (OSC[subscript cmp]) that is disabled after each locking event to save power. The locking allows the stability of the uncompensated oscillator to stay within the stability bound of the compensated design. This paper demonstrates the functionality of a locking controller that uses a periodic (counter-based) scheme implemented on-chip and a prediction (temperature-drift-based) scheme. The flexible clock source platform is validated in a 130 nm CMOS technology. In the demonstrated system, it achieves an effective average temperature stability of 7 ppm/°C in the human body temperature range from 20 °C to 40 °C with a power consumption of 36 nW at 0.7 V. It achieves a frequency range of 12 kHz to 150 kHz at 0.7 V., Charles Stark Draper Laboratory

This paper presents a charge-pump based low swing interconnect receiver circuit. The interconnect circuit is single ended and supports swings of 300mV or lower. A charge pump front end at the receiver boosts the arriving signal before restoring it to the full logic level, improving the performance of the interconnect. For a 10mm long interconnect wire in a 45nm CMOS process, the proposed scheme provides 3X energy reduction at constant speed and 3.5X delay improvement at constant energy relative to prior art. We deploy the interconnect scheme as the data bus between the L1-L2 caches of a 4-core Alpha processor. Over a set of Splash benchmarks, the proposed architecture reduces total energy consumption by 70% while maintaining the same performance.

Recent advances in ultra-low power chip design techniques, many originally targeting wireless sensor networks, will enable a new generation of body-worn devices for health monitoring. We utilize the state-of-the-art in low power RF transmitters, low voltage boost circuits, subthreshold processing, biosignal front-ends, dynamic power management, and energy harvesting to realize an integrated reconfigurable wireless body-area-sensor node (BASN) SoC capable of autonomous power management for battery-free operation.