Search

A study was conducted to analyze delamination growth for a couple of delamination configurations in large scale integrating packages under a temperature cyclic loading environment. A 350-mil-wide J-lead package was utilized to examine delamination growth while a thermoeleastic finite element technique was used to carry out delamination computations. Results indicated quantitative grasp of stress intensity factors and their mode ratio at the tips at the delamination tips.

A study was conducted to carry out a materials properties and thermal stress evaluation of epoxy molding compound used in electronic packaging using fabricated specimens. A simple tension method was utilized to determine the elastic moduli at room temperature. Results indicated that the elastic modulus was inversely proportional with temperature. Findings also suggested possible failures at the edge sections of packages.

Environmental Scanning Electron Microscopy (E-SEM) is a technique which provides the capability to investigate surface morphologies over a variety of controllable environmental conditions. This paper discusses the principal of the E-SEM and presents three experimental investigations of failure mechanisms in electronic packages using E-SEM techniques. The first is a study of thermally induced failures of MMIC devices. The second investigation focuses on mechano-sorptive properties of multilayer thin-film polyimides. The third investigation concentrates on relative humidity and thermal cycling effects on interfacial bonding characteristics of resin/fiber interfaces in printed wiring boards, and microcracks surrounding plated-through-holes.

Several workers have demonstrated the presence of singular stress fields near the edge of a bimaterial interface subject to thermal gradients. Many of the analyses in the literature are limited to linear elastic materials and are useful as first estimates of stresses in such assemblies. However, a time-dependent stress analysis is necessary when viscoelastic materials such as polymer films are bonded to elastic substrates. This paper shows the relevance of viscoelastic modeling in demonstrating the effects of combined temperature and moisture loading on bimaterial interfaces and viscoelastic films sandwiched between elastic substrates. A 2-D finite element method for linear hygrothermoviscoelasticity based on an incremental creep strain rate form is developed. The correspondence principle of linear viscoelasticity is invoked and comparisons between FEA and analytical solutions are demonstrated. Moisture is modeled using Fick's law and the thermorheologically simple material (TSM) postulate is extended to incorporate a moisture shift function in analogy with temperature. The analysis of a polyimide film sandwiched between elastic substrates subject to a thermal cycle with diffusion from the free edge shows stress reversals for the peel stresses that may explain failure modes not anticipated by an elastic analysis.

Thermo-mechanical behavior of various levels of electronic packaging products is studied by moire and microscopic moire interferometry. The global deformations of packages with complex geometries and the local deformations of solder interconnections are determined by displacement measurements of high sensitivity and high spatial resolution. Several packaging studies are reviewed. They include analyses of thin small outline package, leadless chip carrier package, surface mount array package, chip/organic carrier package, deformation near a plated through hole, and determination of an effective CTE. In-situ and quantitative nature of the methods leads to more accurate and realistic understanding of the macro and micro mechanical behavior of packaging assemblies and interconnections, which in turn, facilitates design evaluation and optimization at an early stage of product development.

In an earlier work, thermal stresses in soldered pins were calculated under the assumption of an elastically deforming solder barrel. In the present analysis, the nonlinear, temperature dependent stress-strain curve of solder, without creep, is taken into account, yielding an elasto-plastic foundation modulus function. For the thermal mismatch loading, the total temperature range [Delta]T (e.g., 0-100 [degrees] C) is divided into a finite number n of temperature stages, and the final responses are superposed from the n contributions each of which done using an isothermal stress calculation. Three solders (Sn-Pb solders 63/37, 70/30, and 10/90), were investigated; the solder barrel thickness and mismatch temperature range were also variable parameters. Comparisons with elastic solder foundation calculation results show that thermal and inelastic solder stress/strain dependence should be included especially in the higher (over 75 [degrees] C) temperature range.

Failures in electronic packaging under thermal fatigue often result from cracking in solder joints due to creep/fatigue crack growth. A nonlinear, time-dependent finite element analysis was performed to study the effect of critical design parameters on thermal reliability of leadless chip capacitor or resistor solder joints. The shear strain range based on thermal hysteresis response was used to study the sensitivity of various parameters, such as solder stand-off height, fillet geometry, Cu-pad length, and component length and thickness. The results were used as guidelines for designing reliable solder joints. In addition, an analytical model for the solder joint assembly was derived. It can be used as an engineering approach for rapid assessment of large numbers of design parameters. The accuracy and effectiveness of the analytical model were evaluated by comparing with finite element results.

This study correlates previously published fatigue life data with the hysteresis energy, and compares this to the previous correlation's with the applied plastic strain. It was found that, while the hysteresis energy could be used to describe the fatigue life, corrections must be made to account for the temperature and strain rate dependence of the flow stress. Because of these factors, it is believed that the plastic strain, and not the hysteresis energy, is the true governing factor in determining the fatigue life. Part I (described here) covers only the influence of temperature and cycle frequency for symmetric cycling. Part II, to be published, will deal with hold time and asymmetric cycling.

The intense, localized stress field produced by a temperature load in a multilayered structure may be significantly affected by the local geometry of the free edge. We examine here the stepped edge problem associated with bonding an elastic layer (silicon chip) to a single or multilayer substrate with a slightly larger length. Stress functions are introduced in various rectangular regions and the continuity of tractions are enforced across all inter-region boundaries. Furthermore, continuity of displacements is enforced across the junction of the two segments of the base laminate. The analysis results indicate that even a minute protrusion of the edge of the base laminate relative to the attached chip may cause significant changes in the peeling and shearing stresses in the end region of the interface.

The ability of solder joint life-prediction algorithms to predict the failure of solder joints due to temperature-cycling induced creep-fatigue has been investigated using representative leadless chip carriers (LCCs) as the test vehicle. Four different algorithms are assessed: the classic Coffin-Manson algorithm, a modified Coffin-Manson algorithm with dependency on peak stress, and two strain-energy based algorithms. JPL's special purpose nonlinear finite element computer program was used to dynamically simulate the solder joint response to the standard NASA temperature cycling environment, which ranges from -55 [degrees] C to +100 [degrees] C with a 4-hour period. The computed stress-strain history provided the inputs needed by each of the failure algorithms. To test the accuracy of the analytical predictions, three different sizes of LCCs (68 pins, 28 pins, and 20 pins) were subjected to an experimental test program using the same 4-hour temperature cycle as used in the analytical predictions. The three different sized ceramic packages, each with a 50-mil pitch, provided a range of cyclic strain ranges and solder fillet geometries so as to test the algorithms against realistic electronic packaging variables. The study highlights limitations in the historical Coffin-Manson relationship, and points up possible improvements associated with incorporating a stress modifier into the Coffin-Manson equation. This modification is also somewhat simpler and more accurate than the energy-density based algorithms, which also performed quite well.

The plastic deformation kinetics of 95.5Sn4CuO.5Ag solder joints were determined in monotonic loading shear over the temperature range of 25 [degrees]-150 [degrees] C using three types of tests: (a) constant shear rate, (b) constant shear stress (creep), and (c) differential tests (changes in shear rate or temperature during an otherwise isothermal constant shear rate test). The deformation kinetics were evaluated in terms of the Dorn high temperature plastic deformation equation [[first derivative of [Gamma] with respect to time].sub.p] = A [Mu]b/kT D[(b/d).sup.p] [([Tau]/[Mu]).sup.n] where [[first derivative of [Gamma] with respect to time].sub.p] is the shear rate, [Mu] the shear modulus, b the Burgers vector, D the appropriate diffusion coefficient, d the grain size and [Tau] the shear stress. A, p, and n are constants whose values depend on the rate controlling mechanism. It was found that n increased with stress from [approximately]4 at 2 MPa to [approximately]20 at 25 MPa, relatively independent of temperature. The activation [Delta]H was determined to be 21.1 [+ or -] 2 kcal/mole. The constant A, however, decreased with temperature from a value of [approximately][10.sup.18] at 25 [degrees] C to [approximately][10.sup.10] at 150 [degrees] C. The values of n and [Delta]H suggest that dislocation glide and climb is the rate controlling mechanism and hence that p [approximately equal to] 0. It is speculated that the large decrease in A with temperature may be the result of an effect on the microstructure.

A new method is presented to compute the mechanical compliance and thermal stress in surface mount leads of arbitrary shape. It involves expressing the profile polynomially by a computer-generated spline curve, and numerically integrating the generalized Castigliano formulas. Comparisons to data in the literature, generated by standard analytical and experimental techniques, show excellent agreement. An example is presented to show typical results obtainable by using the model.

The out-of-plane displacement field around two plated holes with different pad diameters in an FR-4 printed wiring board was measured for a single 30 degrees C-210 degrees C-30 degrees C temperature cycle using electro-optic holographic interferometry. At the end of the temperature cycle, the outside edge of the pad was raised above the level of the laminate and the inside edge was depressed below the level of the laminate. This indicates that the barrel is plastically deformed in compression to a total strain of approximately 0.58-0.66 percent which is well above typical yield strains of 0.2 percent. The smaller diameter pad was inclined more than the large diameter pad, but the residual compressive strain in the barrel was roughly the same. Both the residual compressive strain and the inward inclination of the pad are in conflict with the predictions of most finite element models of plated hole deformation. However, there were cracks at the pad-barrel interface which are not included in finite element models. The residual compressive deformation of the barrel is attributed to inelastic deformation of the FR-4 matrix at the high end of the thermal cycle. The stress in the barrel was estimated using an approximate elastic analysis of pad deflections. The estimated stress for different hole diameters for the same pad diameter was roughly proportional to the ratio of their barrel plating cross-sectional areas for a 30-150 degrees C temperature change. The elastic analysis is shown to predict (unrealistic) tensile barrel stresses at the end of the full temperature cycle.

During normal power cycling of the electronic equipment, the differing coefficients of thermal expansion result in differential elongations. Because each level of packaging is subject to mounting constraints, the differential strains result in bending and shear stresses. Repeated duty cycling can cause fatigue at joints, at interfaces between different materials, at interconnection locations, or cause delamination of composite materials. Accelerated Thermal Cycling (ATC) is done to simulate the fatigue failures that may arise because of this power cycling. The current practice is to determine ATC stresses by assuming that the temperatures of various layers are equal and constant. In this study, we have relaxed the isothermal assumption and we provide results for thermal stresses and strains in a first level package. This is accomplished by accurately determining the transient temperature fields in various layers of the package. Temperature variations for different heat transfer coefficients have also been calculated. The results indicate that realistic estimates of thermal stresses and strains are only possible with models that allow for temperature variation in the body of the package. High equivalent stress values are obtained at the chip-heat sink interface and in the bumps connecting the leads to the chip.