1. First Level Interconnection based on optimization of Cu stud bump for Chip to Chip Package.
- Author
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Lim, M. R., Sauli, Z., Aris, H., Retnasamy, V., Lo, C., Muniandy, K., Khan, N., and Foong, C. S.
- Subjects
INTEGRATED circuit interconnections ,MATHEMATICAL optimization ,COPPER ,ELECTRONIC packaging ,EXPERIMENTAL design ,INTERMETALLIC compounds - Abstract
First level interconnection is important to connect the circuits and the devices. For low input/ output (I/O), stud bump bonding (SBB) is preferable compared with Cu pillar. Cu wire is cheaper than Au wire and it is applicable in SBB for low I/O pin count flip chip package. Bump cutting optimization is greatly described in this paper through screening design of experiment (DOE) and full factorial DOE. Separation height, smooth distance, force and ultrasonic power are parameters in bump cutting. No stoppages observed after the bump cutting optimization. Bump shear, cratering test and intermetallic compound (IMC) shows a positive result which is passed all criteria based on Cu ball requirement. Cu stud bump has been adapted in thermosonic and thermocompression flip chip bonding in chip to chip interconnection and the joints are well connected between the two dies surface. Hence, Cu stud bump is suitable for chip to chip (C2C) three dimensional (3D) electronic packages. [ABSTRACT FROM AUTHOR]
- Published
- 2018
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