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Multisim is a Windows-based simulation tool launched by National Instruments Inc., which is suitable for the design of analog/digital circuit boards at board level. It includes the graphic input of circuit schematic diagram and the input of circuit hardware description language. It has a rich simulation and analysis ability. Compared with the traditional manual calculation and design circuit, it can be designed and simulated more simply and quickly through Multisim simulation software. Through further analysis and simulation of the improved Sallen-Key filter network of different orders, the Sallen-Key active filter network is designed as the filter forming circuit in the spectrometer amplifier. Through the observation and comparison of the output waveform, the characteristics of the filter forming circuit can be clearly understood and mastered, which provides a reference for the virtual simulation experiment teaching nuclear power electronics.

Memristor is considered to be the fourth fundamental circuit element, along with resistor, capacitor and inductor. It is assumed to occupy very less chip area, consume low power and provides good manufacturability at low nanometer technologies. In this paper, memristor-based unity-gain Sallen–Key filters have been designed and proposed. These filters provide the flexibility of electronic adjustment of parameters, something that was not possible in conventional Sallen–Key filters. Moreover, the proposed filters provide better performance at low nanometer technologies due to its better characteristics at these technologies. To justify the stated results, simulations of the proposed circuits have been carried out using EldoSpice by Mentor Graphics and using linear ion drift model of memristor. Simulated results depicted that memristor behaves as a simple resistor at frequencies greater than 100 Hz as well as at initial resistance (RINIT) greater than 11 kΩ. The cut-off frequency of simulated filters has been observed to be 14.46863 Hz which is well in agreement with theoretically calculated values. This value and thereby bandwidth and Q-factor can be varied by changing RINIT.

This document presents a low-voltage CMOS electronic system for electromyographic (EMG) signals acquisition. For its development, the system requirements and characteristics were established and simulations were made using Virtuoso Cadence software for 180 nm TSMC technology. The circuits used were implemented in the subthreshold regime for low potential consumption. As result, a two-stage system was obtained, the first stage is an instrumentation amplifier based on a current conveyor, supplied with 0.7V, consuming 55µW and a common-mode rejection ratio (CMRR) of 190dB. Besides, the second stage involves proven Sallen Key filters that were implemented using different design parameters, both high and low pass with a cutoff frequency of 20Hz and 1.3KHz, respectively, with 8dB gain, supplied with ±0.35V and power dissipation of 2.99µW, for each filter.

Pulse shapers are widely used in particle detector applications to reduce the rise and fall times of the pulse signal and to remove noise from the frontend amplifiers. We demonstrate a low-noise, low-power pulse shaper employing an active lowpass Salley-Key biquad filter, passive highpass filter, and input/output buffers. The design process is described to generate the desired transfer characteristic while incorporating tuning knobs to adapt the shaper characteristic to the needs of different applications. Utilizing only a single 1.8-V supply, the shaper consumes 1.5 mW and achieves an input-referred noise of 17 μV rms , both the lowest among state-of-the-art. The power efficiency normalized to bandwidth and noise is nearly 1.7× better than the next best design.

In this paper, we highlight the optimal design of an active fourth-order band-pass filter for radio frequency identification (RFID) system reader to reject all signals outside the band (10–20) kHz and to amplify the low antenna signal with a center frequency of 15 kHz. The filter is designed to have a Butterworth response, and the topology that will be used to implement this filter is Sallen–Key. The values of the passive components are selected from manufactured series; thus, it is very exhaustive to search on all possible combinations of values from those series for an optimized design. The metaheuristics have proved a capacity to deal with such problem effectively. In this work, the metaheuristic genetic algorithm (GA) is applied for the optimal sizing of the fourth-order band-pass filter. SPICE simulations are used to validate the obtained results/performance.

An integrated programmable order multiple feedback (MFB) band-pass filter (BPF) implemented in 0.14 um CMOS technology is presented. The modular single ended filter has been used in an FSK transceiver, in both receiver (RX) and transmitter (TX). It is implemented by cascading different types of BP filters with different required bandwidth (BW) of RX and TX. A combination of Bessel and Butterworth filters to maximize stop-band rejection, optimize in-band flatness and minimize group delay variation is used. Each stage of the MFB filter draws 0.3mA of current from a 1.8V supply. A simple and efficient approach to trim center frequency which has minimum impact on area and parasitic components has been used. AC gain change of TX due to mismatches, parasitic and process and trimming has been compensated by a simple gain stage while it is budgeted in RX system SNR. The implemented 23.2MHz center frequency filters have been used in the FSK transceiver of a USB power delivery (PD) system, with a BW of 3.46MHz for RX filter and a BW of 1.3MHz for TX filter. The employed low current and small area architecture with its efficient trimming strategy meets the required performance of the FSK transceiver.

The class-E power amplifier with shunt filter, which is also known as the class-E power amplifier with shunt capacitance and shunt filter, is proposed in this brief for any duty ratio. The basic circuit waveforms and design equations are derived and the design parameters of the circuit elements for some selected duty ratios are numerically solved. Subsequently, the characteristics of the class-E power amplifier with shunt filter are discussed. Also, a simulation example is carried out to verify the presented design method. Compared with the classical class-E power amplifier, the presented class-E power amplifier with shunt filter has a higher achievable maximum frequency and requires less quality factor of the filter. It is a promising candidate to design broadband and high-efficiency power amplifiers.

This brief presents a filter-integrated high-efficiency class-F power amplifier (PA). The hybrid cavity–microstrip filtering circuit is employed not only to realize output impedance matching and the third-harmonic manipulation but also to provide high-selectivity bandpass responses. To fulfill the requirements of high-efficiency class-F PAs, cavity resonators and microstrip feeding structures are involved, and their benefits are fully exploited. The metal cavity resonator features a high $Q$ value and, thus, low loss in the passband, resulting in high efficiency. Moreover, metal walls of cavities act as heat sink for the transistor. The microstrip feeding structures are used to improve the skirt selectivity and manipulate the third harmonic. Moreover, it features easy integration with the transistor, and thus, the transition between cavity and microstrip lines is eliminated. The hybrid filter is characterized based on filter synthesis theory. Complex impedance conversion analysis is carried out to guide the impedance transformation from 50 $\Omega$ to a complex one desired by the transistor. For demonstration, a filtering PA operating at 2.4 GHz is designed and measured. It exhibits both high-selectivity bandpass responses and good PA performance with maximum power-added efficiency of 70.9% at 40.8-dBm output power.

This paper presents second order band-pass filter with high quality factor. Its high quality factor is provided by feedback circuit. The used second order filter is modified so that filters outputs through capacitor can be obtained to high impedance output. Thereby, there is no need the extra active element to obtain filter outputs. Also, the output stage of current differencing transconductance amplifier have only X− terminals instead of X+ and X− terminals. Furthermore, the quality factor of the band-pass filter with feedback circuit is increased by feedback gain consisting of only four transistors. Besides, to examine effects of parasitic elements, non-ideal and sensitivity, the overall structure is investigated deeply. Working conditions and boundaries of the overall structure is also defined. The simulation demonstrates good agreement between the theoretical expectations and simulation results.

In this paper, a variation-aware and reliable design of a fully integrated radio frequency (RF) bandpass filter realized using a voltage differencing transconductance amplifier is presented. The filter is characterized by its high frequency operation, low power consumption, high quality factor, and it is insensitive to process, voltage, and temperature variations. Sensitivity analysis has been performed to analyze the circuit performance in the presence of parasitics. The inductor-less approach finds its application in integrated building blocks of RF front ends, thus eliminating the requirement of off-chip filters in transceivers. Centered at 2.511 GHz and operating within the 36.21 MHz 3-dB bandwidth, the filter draws 0.168 mA from a ±1 V power supply, attains a voltage gain of 72.6 dB, a quality factor of 69.34 and noise figure of ~29.6 dB. In addition, it has a dynamic range of 125.84 dB-Hz and a 1-dB compression of −1.5 dBm which translates into a figure of merit as high as 94 dB.

The design of analog filter using active building block has been gained significant attention and has become an interesting research topic. A five-inputs single −output voltage-mode universal biquadratic filter using active building block, namely voltage differencing differential difference amplifier (VDDDA) is presented in this paper. The proposed filter consists of two VDDDAs and two grounded capacitors. The presented circuit has high impedance for all input voltage nodes and low impedance for output voltage node which is ideal for cascade in voltage-mode circuit without the use of buffer circuits. It can provide five output voltage functions which are band-pass (BP), low-pass (LP), band-reject (BR), high-pass (HP) and all-pass (AP) responses. For high-pass and band-pass functions, the inverting and non-inverting response can be achieved. The matching condition, the inverting and double gain amplifier are not required which is easy to select the output response by digital method. The natural frequency and quality factor can be electronically tuned that is attractive for microcomputer or microcontroller controllability. To verify the validity of proposed filter, the PSPICE simulation and experimental results using VDDDA constructed from commercially available IC are included. The measured results agree well with theoretical expect.

This paper presents a new lumped-element absorptive bandstop filter topology. It exhibits infinite attenuation at the center frequency and no reflection regardless of the quality factor ( $Q$ -factor) of the resonators. The new topology exhibits the absorptive characteristic with extremely low- $Q$ resonators, whereas an absorptive bandstop filter topology in the literature cannot be used for such resonators. This superiority of the new filter topology is verified by comparing it with the topology in the literature. The filter designed using the new topology can change its center frequency by tuning only the capacitor values of the resonators. A 1.6:1 frequency tuning range maintaining the absorptive characteristic has been obtained by measurement.

A critical study is made of a canonic second-order bandpass realization using a single-operational amplifier in low-gain (unity or two) connection. The circuit is suitable for low- and medium Q applications and features good stability, wide frequency range of operation and versatility of conversion to a high-pass filter. An all-grounded-capacitor version of the filter is also given; which is a desirable feature for integrated circuit (IC) implementation. The unity gain configuration presents component minimization over other similar circuits.

This article presents a new topology for implementing an electronically tunable bandpass filter using the current-feedback operational amplifier. The electronic tuning of the center frequency of the proposed circuit is achieved using an externally connected voltage amplifier in the feedback path without disturbing the constituents of the filter itself, that is a shadow filter. The proposed circuit can be used for developing an undergraduate experiment which illustrates the operation of bandpass filter and the electronic control of its center frequency using the concept of shadow filter. Experimental results obtained using the AD844 current-feedback operational amplifier are included.

Minaei, Shahram (Dogus Author) In this paper, a new method is presented to increase the quality factor of bandpass filters employing active elements. Using the proposed method the values of the externally capacitors in filter structure are reduced. In this way chip area which is an important parameter in the integrated circuits can be minimized. Moreover, bandpass filters are investigated from the point of view of stability conditions and effects of the parasitic and non-ideal elements. Considering these effects, operating conditions and boundaries of the bandpass filter are calculated. To validate the feasibility of the method, an application example of bandpass filter used in intermediate frequency (IF) stage of AM receivers is given and the performance of the circuit is demonstrated by comparing the theory and simulation.

In this paper, a new voltage-mode all-pass filter topology based on single current operational amplifier (COA) and the implementation of COA by using current conveyors are presented. The proposed topology employs three admittances and single active circuit element. COA implementation by using current conveyor blocks as sub-circuit contributes to workability of the COA employing circuits by using commercially available integrated circuits that can be employed as current conveyor. The validity of the proposed filter is verified by PSPICE simulation programme by using the MOSIS 0.35 micron CMOS process parameters. The simulation results agree well with the theoretical analysis and the circuit achieve a good total harmonic distortion (THD) performance.

Multi-GHz lowpass filters are key components for many RF applications and are required for the implementation of integrated high-speed analog-to-digital and digital-to-analog converters and optical communication systems. In the last two decades, integrated filters in the Multi-GHz range have been implemented using III-V or SiGe technologies. In all cases in which the size of passive components is a concern, inductorless designs are preferred. Furthermore, due to the recent development of high-speed and high-resolution data converters, highly linear multi-GHz filters are required more and more. Classical open loop topologies are not able to achieve high linearity, and closed loop filters are preferred in all applications where linearity is a key requirement. In this work, we present a fully differential BiCMOS implementation of the classical Sallen Key filter, which is able to operate up to about 10 GHz by exploiting both the bipolar and MOS transistors of a commercial 55-nm BiCMOS technology. The layout of the biquad filter has been implemented, and the results of post-layout simulations are reported. The biquad stage exhibits excellent SFDR (64 dB) and dynamic range (about 50 dB) due to the closed loop operation, and good power efficiency (0.94 pW/Hz/pole) with respect to comparable active inductorless lowpass filters reported in the literature. Moreover, unlike other filters, it exploits the different active devices offered by commercial SiGe BiCMOS technologies. Parametric and Monte Carlo simulations are also included to assess the robustness of the proposed biquad filter against PVT and mismatch variations.

A novel reconfigurable lowpass-polyphase biquad filter based on MFB structure is proposed in this paper. In this biquad, only one op-amp is adopted which improves the matching and reduces the power consumption. And its transmission function is synthesized by the complex signal flow graph. Then a 3rd order filter used in Zigbee transceiver is implemented to illustrate the technique, which is realized in 0.13 μm CMOS technology. To avoid the variation of resistance and capacitance, an on-chip tuning scheme is integrated. The test results show that when in polyphase mode, it is centered at 2 MHz with 3 MHz bandwidth and the image rejection is about 23 dB with the voltage gain of 12 dB. When in lowpass mode, the cut-off frequency is 1.5 MHz, and the DC gain is 12 dB. The in-band 3rd order input intercept point (IIP3) is 9 dBm in polyphase mode and 13 dBm in lowpass mode. Attractively, the filter only consumes 2.3 mA with a 1.2 V power supply, and occupies an area of 0.26 mm2.

A quasi-elliptic function bandpass filter (BPF) based on parallel feed topology is presented. The parallel feed topology is realised by splitting the input/output port of the filter into two paths through a T-junction to excite a pair of resonators simultaneously. This configuration contributes to further improving the selectivity of the filter by introducing more transmission zeros (TZs) near the passband. In addition, a defected microstrip structure is utilised to enhance the out-band attenuation and spur suppression. In order to verify the proposed topology, a fourth order BPF with cross-coupling is designed, fabricated and measured. The measured frequency responses agree well with simulated ones. Four TZs can be obtained with two TZs on each side of the passband.

In this paper, a new area-effective complex-filter topology which can be used as an image-reject filter in low-IF receiver is proposed. A first-order image-reject filter obtained according to a new topology which corresponds to a complex shunt RC circuit. To demonstrate the usefulness of filter, simulation results of the filter are obtained by using SPECTRE in the CADENCE design tool.

In this paper, a novel tunable filter with multiple tuning functions is proposed. The filter can be used as a 4'h-order bandpass-to-bandstop reconfigurable filter for passband or stopband tuning, and also as a 2nd-order bandpass filter cascaded by a 2nd-order bandstop filter for passband tuning with controllable transmission zeroes. In each mode, both the frequency and bandwidth can be controlled within a wide range, demonstrating excellent tuning flexibility and capabilities. The filter topology is expected to find applications in modern wireless standards such as carrier aggregation and cognitive radios.

A highly compact continuous-time transimpedance low-pass filter (TILPF) topology is proposed that achieves a low input impedance and a 2nd-order transfer function in a single stage. This is suitable to perform current-to-voltage conversion with a built-in filtering characteristic in a passive mixer based wireless receiver. A 4th-order Butterworth prototype is designed with a cascade of the proposed TILPF and a self-coupled source follower based biquad in a 65nm CMOS. Operating with a 1.3V supply, the filter achieves 30MHz bandwidth while consuming 0.5mA total current. The simulated in-band IIP3 is +17.1dBm, and the average output noise is 14.2nV/√Hz.

In this paper, we introduce a 4-stage CMOS 12– 18 GHZ distributed amplifier where each stage is a cascaded two-stage topology. We incorporate the idea of replacing the termination impedance with short circuits in both gate and drain terminations to achieve a band-pass frequency response. Using the cascaded two-stage amplifier, we achieve a reasonable gain-bandwidth performance and a smooth transfer function. For the proposed topology, we derive design formulas for low and high cutoff frequencies, input/output impedance matching, and voltage gain. Since the gate termination impedance, as a significant noise source, is replaced with short circuit in the gate line, we achieve a noise figure lower than 4 dB. The proposed amplifier provides a gain of 25 dB while consumes 40 mW from a 1.8 V supply. Our simulation results show that S11 is below −10.2 dB and S22 is below −11.4 dB.

Sallen-Key filters are widespread in audio circuits. Therefore, accurate and efficient digital models of such filters are highly desirable in audio Virtual Analog applications. In this paper, we will discuss a possible strategy, based on Wave Digital Filters (WDFs), for implementing all the analog filters described in the historical 1955 manuscript by Sallen and Key. In particular, we will group the eighteen filter models presented by Sallen and Key into nine classes, according to their topological properties. For each class we will describe the corresponding WDF structures. Finally, we will compare the output signals of WDFs to the output signals of the same models implemented in LTSpice.

In this research article, a new third-order voltage-mode active-C asymmetrical band pass filter is proposed. It uses three numbers of current-controlled current conveyors and three numbers of equal-valued capacitors. The topology has the following important features: uses only three active elements, uses three capacitors, uses all grounded capacitors and no resistor is suitable for integrated circuit design, there is no matching constraint, high input impedance, low output impedance, central frequency can easily be electronically controlled by bias current, and frequency response is asymmetrical in nature. The application of the proposed topology in the realisation of a voltage-mode sixth-order symmetrical band pass filter has been demonstrated. The workability of the proposed topology and sixth-order filter has been confirmed by simulation results using 0.35-µm Austria Micro Systems complementary metal oxide semiconductor technology.

In this article, a compact dual-band bandpass filter (BPF) using integrated stepped impedance resonators (SIRs) is presented. The proposed filter topology consists of an outer open stub–loaded SIR to achieve lower passband of 2.45 GHz. The inner inter-coupled SIRs contribute to the 3.5 GHz band. The passband selectivity is achieved by introducing spur line in the input–output feed line sections that create a transmission zero at 2.2 GHz. A hook-shaped open stub is also added to bring about transmission zero at 4.55 GHz. The overall layout makes the filter compact with a size of 0.21 λg × 0.19 λg at 2.45 GHz. The insertion loss is within 1.75 dB for both the passbands. A prototype is developed with measured results in close agreement with the simulated results.

A new compact quad-passband bandpass filter (BPF) using multi-mode resonators (MMRs) based on multi-layered substrate technique is proposed. The filter consists of a pair of multi-mode resonators (uniform impedance resonator and stepped impedance resonator) operated at 1.8/3.7 GHz on top layer and the other pair of the multi-mode resonators operated at 2.4/3 GHz on bottom layer. Source–load coupling lines are used to be the input/output (I/O) ports for providing the multi-paths propagations by cross-coupling effects in the filter. Specifically, the operated frequencies of the filter at 1.8/2.4/3/3.7 GHz with bandwidths of 6.7, 8.2, 4.6, and 7.2% are successfully designed and implemented. The proposed filter is useful for the multi-passband filters design, especially when the passbands are needed to be very close.

This paper introduces a new active element combining the useful features of differential voltage, dual-X and first generation current conveyors. The new proposed active element is further utilized to introduce a new generalized filter topology employing grounded components only. The proposed single active element-based topology benefits from first-order and second-order filter realization by appropriate impedance specialization. The circuit topology with single current input provides two output currents and voltages in each case. A thorough study of proposed active element along with extensive simulations is carried out to validate the filter topology. A detailed non-ideal study is also given. To further support the usefulness of filter topology, higher-order filters are also realized. The new active element and the new filter structure provide advancement to the existing knowledge; with the scope of active element being further exploited for analog signal processing applications in general. The proposed differential voltage dual-X first generation current conveyor (DV-DXCCI) and its filtering applications are simulated using TSMC 0.25 $$\upmu $$ μ m technology.

Low-pass filter is an integral part of lock-in amplifier, low-pass FIR or IIR filter is typically used in lock-in amplifier, which need a large number of multiplications and occupy more hardware resources. To reduce cross-correlation computing requirement of multiplications, this paper, designed orthogonal vector lock-in amplifier based on the down-sampling dual mean filter. Experiments show that, the digital amplifier has good detection performance and noise or clutter suppression. Keywords: lock-in amplifier, mean filter, down-sampling, Gaussian noise suppression, clutter suppression.

In this paper, a new multi-layered triple-passband bandpass filter using embedded and stub-loaded stepped impedance resonators (SIRs) is proposed. The filter is designed to have triple-passband at 1.8, 2.4, and 3.5 GHz. The 1st and 2nd passbands (1.8/2.4 GHz) are simultaneously generated by controlling the impedance and length ratios of the embedded SIRs (on top layer). The 3rd passband (3.5 GHz) is generated by using the stub-loaded SIR (on bottom layer). Using the embedded SIR, the even modes can be tuned within very wide frequency range and without affecting the odd modes. Therefore, the design of multi-band filters with very close passbands can be easily achieved and having a high isolation between the passbands. The filter can provide the multi-path propagation to enhance the frequency response and achieving the compact circuit size. The measured results are in good agreement with the full-wave electromagnetic simulation results.

This paper presents a novel reconnection-less and electronically reconfigurable analogue filter. It employs two active elements, Voltage-Differencing Current Conveyor (VDCC) and Dual-Output Current Amplifier (DO-CA) with two independently tunable gains. Filter has the single input and single output topology (SISO). The current-mode transfer function of the filter can be tuned electronically from the low-pass (LP) response to the high-pass (HP) response, via the band-stop (BS) response, without reconnection of the input or output terminal. It is designed in order to provide tuning of both the stop-band gain and also pass-band gain of all the transfer functions, because also transfer functions with additional and intended zero in transfer function are available. The theoretical presumptions are confirmed by both simulations and lab measurements with available devices. DOI: http://dx.doi.org/10.5755/j01.eie.22.6.17221

The SISO voltage mode multifunctional filter topology is realized in this paper using a modified CCCCTA which realizes low-pass, high-pass, band-pass and band reject filter responses. The proposed topology consists of a CCCCTA, two 8-bit capacitor banks and a programmable input circuit using switches and VDTA. This circuit reduces the requirement of large amount of biasing current, given wider voltage transfer range and lesser power dissipation. The proposed filter gives a control over filter parameters such as Q-factor and cut off frequency by digitally controlling the capacitor bank. Required filter response is selected by programmable input circuit using same circuit topology. The circuit is simulated using Cadence Virtuoso UMC 180nm CMOS technology at ±1.5V power supply voltage.

An integrated fully-differential 6th-order continuous time low-pass filter for wideband wireless communication is proposed in this paper. The filter is designed with the Sallen-Key biquadratic cells in which fully-differential operational amplifiers with two pairs of inputs are used. Stability optimization technology is discussed for the operational amplifier in order to improve its stability condition when it is closed loop to constitute unit gain Sallen-Key biquadratic cells. The filter is implemented in TSMC 0.13pm CMOS process, and has a core area of 0.5×0.22 mm2 excluding bonding pads. The simulated results show that the filter can operate successfully over a cutoff frequency range of 100MHz to 170MHz, and achieve more than 43dB adjacent channel rejection and more than 8.6dBm in-band IIP3. The power consumption is 15.5mA from a 1.2V supply voltage including 5mA of the output buffers.

In this study, a single-input multiple-outputs current-mode analog biquadratic filter, based on current controlled current differencing transconductance amplifier (CCCDTA) is presented. The proposed filter uses two CCCDTAs and two grounded capacitors without any external resistors, which is well suited for integrated circuit implementation. The filter simultaneously gives 3 standard transfer functions, namely, lowpass, highpass and bandpass filters with independent control of quality factor and pole frequency by electronic method. By summing of IHP and LLP, the notch filter can be also achieved. Moreover, the circuit has low input and high output impedance which would be an ideal choice for cascading in current-mode circuit. The PSPICE simulation results are included verifying the workability of the proposed filter. The given results agree well with the theoretical anticipation.

This work reports a fully differential architecture of a Sallen–Key biquad realised with a single op amp. The proposed implementation is beneficial for suppressing common-mode and supply noise. The circuit was designed and simulated using ON Semiconductor's 0.5- technology.

This paper reports the first co-design configuration of a power amplifier (PA) in cascade with a high- Q bandpass filter. By matching the filter's input port directly to the transistor's drain node, the conventional output matching network (OMN) of a PA is entirely eliminated. This leads to smaller size/volume, minimized loss, and enhanced overall performance. To enable this co-design method, the matching-filter synthesis theory is proposed and investigated in detail in this paper. Based on this theory, a 3% bandwidth (centered at 3.03 GHz) two-pole filter, implemented using high- Q evanescent-mode cavity resonators, is designed as the PA OMN to provide optimized fundamental and harmonic impedances for a commercial 10-W GaN transistor. Simulation and measured results show that the co-designed PA-filter module yields a desired Chybeshev filter behavior while maintaining excellent PA performance in the passband with 72% efficiency, 10-W output power, >10-dB gain, and 60-dBm output third-order intercept point. This co-designed module experimentally presents a 8% higher overall efficiency compared to a control group developed using a conventional independent PA and filter, which further validates the effectiveness of this method.

A high-Q, tunable, bandpass filtered amplifier structure is proposed which is based on a novel Q enhancement technique in N-path filters. Using Fourier series analysis, frequency response of an N-path filter as well as the aliasing effects which are present in it are derived. Frequency translation of unwanted contents at higher frequencies to the center frequency of the bandpass filter is called harmonic fold back (HFB). It is shown that using an additional N-path filter with the same clock frequency but different clock phases can reduce the HFB. The required conditions for fold back elimination are derived from Fourier series expansion analysis. In order to achieve HFB reduction as well as increasing stop-band rejection and Q factor, an LNA containing an N-path filter is added to each of the two filters. The LNA in the proposed structure is designed for high linearity and low NF, utilizing noise and distortion cancellation methods. The filter is designed and simulated in 0.18 um CMOS with an ideal balun. The voltage gain is 17.5 dB across the 0.25-1 GHz frequency band, while achieving a NF between 2.2 to 2.4 dB, an IIP3 between -2 to +2 dBm, HFB attenuation of between 25 to 45 dB and power consumption of 4.5 mW for each LNA. Finally, the proposed filter (with 4-path sub-filters) is simulated and compared to filters with 4-path and 8-path sub-filters without the proposed built-in HFB reduction.

A fourth-order low-pass continuous-time filter for a WSN transmitter is presented. The active RC filter was chosen for the high linearity, designed by using the leapfrog topology imitates the passive filter. The operation amplifier (op-amp) adopted by the filter is feed-forward operation amplifier, which could get the GBW as large as possible under the low power consumption. The cut-off frequency deviation due to the process corner, aging and temperature deviation is adjusted by an automatic frequency tuning circuit. The filter in a 0.18μm RF CMOS technology consumes 1mW from a 1V power supply. The measured results of the chip show that the bandwidth is about 1.5MHz. The voltage gain of filter is about-4.5dB with the buffer, the ripple in the pass-band is lower than 0.5 dB, and the channel rejection ratio is larger than 30dB at 4MHz.

The fast-growing market in wireless communications has led to the development of multi-standard mobile terminals. In this paper, a frequency-tunable active RC bandpass filter for multi-standards wireless communication system is designed using an active inductor. The conventional bandpass filter design methods employ the high order filter or high quality factor  to improve the stopband attenuation characteristics and frequency selectivity of the passband. The proposed bandpass filter based on the high  active inductor has an improved frequency characteristics. The center frequency and gain of the designed bandpass filter is tuned by employing the tuning circuit. We have performed the simulation using TSMC 0.18㎛ process parameter to analyze the characteristics of the designed active RC bandpass filter. The bandpass filter with  20.5 has 90MHz half power bandwidth at the center frequency of 1.86GHz. Moreover, the center frequency of the proposed bandpass filter can be tuned between 1.86∼2.38GHz for the multi-standards wireless communication system using the capacitor of the tuning circuit.

Lock-in amplifier is widely used to detect weak signals from significant background noise. In this paper, an FPGA-based Lock-in amplifier is implemented on the DSP Builder platform to measure impedance between biological cells and electrodes. To improve the measuring accuracy, a narrow band low pass filter with low cut off frequency was implemented. This low pass filter consists of a five-stage cascaded integrator-comb filter, two half band filters and a FIR low pass filter. Simulation shows that with a system clock of 10MHz, the cut off frequency of the low pass filter is lower than 20Hz. Experiments demonstrate that the implemented lock-in amplifier is able to detect weak signal with strong noise, making it an attractive approach to implement lock-in amplifiers which is more flexible and can meet the needs for specified measurements.

A proposed constant drain-source transconductor topology is designed to keep linearity at high frequency. By using the proposed operational transconductance amplifier as a building block, a fourth-order low-pass filter is realized. The filter was fabricated in 0.18 μm CMOS technology and feathers a 250 MHz cutoff frequency. The measured IM3 performance is ?36 dB at 0.6 Vpp input swing and the power consumption is 22 mW.

This paper studies a very simple structure for dual-band bandpass filter. Filter is composed of two asymmetric coupled resonator circuit by two sets of different size stepped impedance resonator. This circuit applied microstrip line, coupling principle and impedance ratio by controlling the stepped impedance resonator to control the center frequency 2.6/5.2 GHz of the first and the second bandpass filter. The basic structure of the filter is constituted by the three sections of transmission line and two sets of SIR, that is, in two gaps of the three sections of transmission line parallel connection the equivalent inductances and capacitor of the two sets of SIR in series with the resonant circuit (LCL) to constitute bandpass filter. The low frequency 2.6 GHz is through the upper half of low impedance SIR, and the high frequency 5.2 GHz is through the lower half of high impedance SIR. This paper presents the design of asymmetric SIR-based dual-band bandpass filter, the filter structure is simple, easy to produce and can control the characteristics of the passband center frequency. By electromagnet simulation software( IE3D ) to simulate, the actual production of the circuit using a vector analyzer measurement, simulation and measurement results show good consistency.

This paper develops a novel ultra-wideband bandpass filter with high selectivity, deep stop band and compact size. By linking a broadband bandstop filter at two sides with two feed lines via interdigital coupled lines with enhanced coupling degree, an initial ultra-wideband bandpass filter is created. In this filter, all undesired pass bands are rejected by broadband bandstop filter embedded in middle of ultra-wideband filter. Then, stepped impedance open stubs are used for realizing transmission zeros in pass band edges to increase selectivity. Finally, a neuro-genetic method is applied for optimizing of proposed ultra-wideband bandpass filter. For this task, first a nonlinear relation is established between the input (layout parameters) and output (electrical responses) data by using neural network. Then, genetic algorithm is used in conjunction with neural network model for optimizing the ultra-wideband bandpass filter parameters. The designed filter was fabricated and measured that showed good characteristics including deep stop band and very high pass band selectivity.

The compact triple-passband bandpass filter base on uniform impedance ring resonators (UIRRs) is proposed. The filter has advantages of high passband selectivity, having closed adjacent passbands and compact circuit size. The resonators with magnetically coupling by grounding via hole are designed to have tree resonant paths at 1.22 GHz, 1.5 GHz and 1.8 GHz. The resonant frequencies can be easily controlled by tuning L3, L4 and L5 for each resonant paths of the resonator. The triple-passband bandpass filter is showing a simple configuration, an effective design method and a small circuit size. The measured results are in good agreement with the simulation results.

In this paper, a synthesis method for suspended substrate stripline filters for digital microwave power amplifier applications is presented. The synthesis method combines a lumped element and full-wave mixed approach in a very efficient way. In order to achieve high amplifier efficiency the filter must exhibit a high input impedance in the stopband. This has been implemented for the first time by using a capacitively end coupled filter combined with stepped impedance resonators. A third order filter was designed. Simulations show that the final stage drain efficiency of the power amplifier and suppression of out-of-band frequency components can be significantly improved when the new structure is used.

The second order Sallen-Key low-pass filter structures (so called biquads) in the voltage and the current mode have one common disadvantage. This is a decreasing of the attenuation at high frequencies, because active elements exhibit losses of the amplification. While some solutions for the voltage mode circuits have been already published, but this problem was not satisfactorily solved for circuits working in the current mode. Therefore, this article presents one of the possible solutions of this problem for circuits working in the current mode derived by graph method.

According to the analysis of stepped impedance resonator and interdigital capacitance loading loop resonator, a design of the elliptic or quasi-elliptic bandpass filter is proposed in this paper. With the cross-coupling, the performance of filters can be enhanced greatly by introducing transmission zeros near the passband frequencies. Otherwise, the filter can change the frequency of the spurious passband with different impedance ratio of SIR. The simulation and optimization are explained with ANSOFT HFSS. Finally, a filter was designed with a center frequency at 1.4GHz, the minimum passband insertion loss is about 4.2dB, and the passband return loss is greater than 14.2dB.