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This paper presents general modeling approaches to achieve accurate real-time simulation of high switching frequency converters. The proposed methods are based on the direct mapped method (DMM) and make use of decoupling techniques when appropriate. The DMM links state variables to diode statuses and provides an exact and noniterative solution to network equations. An electric vehicle battery charger (EVBC) test case comprised of a full bridge rectifier, an interleaved boost, and a three-phase LLC is used to demonstrate the high accuracy achieved by the proposed methods compared to a conventional approach. FPGA implementations are proposed and shown to achieve from 75 ns to 175ns real-time simulation time-steps for this test case circuit, allowing its accurate simulation while switched at 200 kHz. To further validate the effectiveness of the FPGA-based simulator, a resonant boost converter is also implemented and simulated in real-time.

Traditional wireless power transfer (WPT) systems usually adopt the triple-phase-shift (TPS) control method to maintain a constant output voltage, track the maximum system efficiency point (MEPT), and achieve zero-voltage-switching (ZVS) operation for various applications. However, these three targets are achieved at the cost of high reactive power on both primary and secondary sides, especially under light-load conditions, leading to low efficiency. This has become one of the challenges that hinder a further deployment of WPT technologies in practice. To address this vital problem, in this paper, how the reactive power lowers the system efficiency is revealed based on a mathematical model established. Then, a hybrid modulation control strategy based on a proper selection between the full-bridge and half-bridge modes of the inverter and active rectifier is developed. Besides, a detailed analysis of the switching boundary, i.e., selecting full-bridge or half-bridge, is provided. Finally, an experimental prototype is constructed to verify the effectiveness of the proposed control method. Experimental results show that the proposed method can reduce the reactive power, maintain a constant output voltage, and realize the MEPT and ZVS operation, with high efficiencies up to 94.29% in a wide load range.

In the acdcac converter system, the second harmonic current (SHC) is generated by the acdc rectifier and the dcac inverter. If the SHC propagates to the intermediate dcdc converter, the current stress of the power switches will be increased, and the conversion efficiency will be degraded. Therefore, it is necessary to suppress the SHC in the dcdc converter. In this paper, the generation and propagation mechanism of the SHC in the acdcac converter system is analyzed. Then, from a perspective of control bandwidth and dc-bus port impedance, the basic ideas for reducing the SHC in the dcdc converter with different control targets are proposed. Based on that, the virtual-impedance-based control scheme is proposed to increase the input impedance and output impedance of the dcdc converter simultaneously. The realization and design guideline of the virtual impedance are also presented. Finally, a single-phase 3-kVA acdcac converter system is fabricated and tested in the lab. The experimental results are provided to verify the effectiveness of the proposed SHC reduction control scheme.

A novel Cuk-based bridgeless rectifier is proposed for receiving side of wireless power transfer (WPT) system. The proposed converter can not only help improve overall efficiency, but also is with features of wide power modulation range and very low output current ripple. In terms of the output current source characteristics of series-series-compensated WPT system, a bridgeless rectifier and a Cuk converter are combined and an input inductor of Cuk converter is cut down to form the proposed single-stage converter. Besides, a synchronous operation method is derived for the proposed converter to realize the optimal working point of transmission power and efficiency. Operation principles of the converter and its impact on performance of WPT system are analyzed. Also, design methods for system parameters are given. A prototype is built up to verify the feasibility of the proposed topology and the operation method. It is noted that the proposed converter can well adjust the output power of WPT system to realize the desired working point via adjusting the duty cycle at different transfer distances and loads.

An integrated generator–rectifier system is a promising architecture to harvest energy in offshore wind turbines. The system processes the majority of the incoming power using reliable, efficient, and inexpensive passive diodes operating at the generator line frequency. Elimination of capacitors at the diode rectifiers’ output by appropriately phase shifting the voltages of a multiport generator further improves the reliability of the overall architecture. This article creates a generalized framework to evaluate the interactions among different generator ports, diode-bridge rectifiers, and the active rectifier that is used to control the power flow. The framework enables quantifying the effect of integration on the dc bus power ripple and power imbalance among different generator ports. An exemplary winding layout is proposed that ensures theoretically zero interaction between the passive ports, although all the ports are mounted on a magnetic structure. A 10-MW integrated generator–rectifier design and simulation proves the accuracy of the framework using coupled circuit and finite-element simulation. Finally, a laboratory prototype shows the realization of the winding layout. The proposed inductance-matrix-based framework can be used to evaluate other winding layouts to estimate the effect of magnetic coupling on the performance of the system.

Considering the weakness of the conventional physical model of power diodes in the rectifier design, an improved lumped-charge model is presented in this paper to achieve both high accuracy and high efficiency in the simulation of power electronic equipment. To improve the convergence of the physical model simulation in the rectifier circuit, the transmission-line-theory is implemented in the model. Furthermore, a dynamic partition method is implemented in the model to achieve high accuracy of the transient characteristics of the diode during the level transition of the rectifier, with reducing the number of numerical solutions through reallocation of computing resources. Compared with the conventional model, the simulation error is decreased. This successfully adopts the physical model to realize both equipment-level simulation and high accuracy of device simulation in the design of the rectifier and RC snubber circuit. The experimental results show that the error of the proposed model is less than 10% and 5% the minimum, which is a maximum 30% decreasing compared with that of the conventional model. The half-cycle (500μs) simulation of the rectifier circuit with 10 and 20 power diodes cost 18s and 33s.

A novel driving circuit for a current doubler synchronous rectifier to inductive power transfer (IPT) applications is proposed in this paper using only auxiliary windings in the existent rectifier output filter inductors to drive the active switches. The proposed synchronous rectifier (SR) overcomes the limitations of the traditional driving schemes because it does not require any processing, analog circuits, gate drivers circuits or current measurement, normally used in the conventional SR applied to IPT systems. The proposed configuration presents a simple and robust operation considering usual parametric variation in IPT systems, such as coupling factor, misalignment, load variation and component tolerances. Moreover, the same size and weight of the conventional diode rectifier board is maintained due to the simplicity of the self-driven circuit. The proposed configuration allows increasing the global efficiency by reducing the conduction losses of the output rectifier and previous stages. A resonant circuit design procedure using an iterative process to find the maximum efficiency point considering the self-driven SR is proposed to maximize the global system efficiency. A 100 W resonant series-parallel IPT prototype is developed to validate the performance of the proposed self-driven SR circuit presenting a maximum global efficiency equal to 94.8%.

This paper proposes a wide output voltage range LLC resonant converter based on topology reconfiguration method (TRM). First, with different driving signals two operational modes of inverter circuit and rectifier circuit of the proposed topology are analyzed respectively. On this basis, the converter in whole voltage range has three variable operating modes considering voltage gain by different combination between two kinds of inverting modes and two kinds of rectifying modes. Thus compared with conventional LLC converter, the voltage gain range can be extended by four times within the same switching frequency range using TRM plus pulse-frequency modulation (PFM). Comprehensive analysis of circuit states and soft-switching condition in these three modes are presented. Moreover, design of voltage area division in three modes is discussed to arrive a better tradeoff between efficiency and power density. A design flowchart is given to help to implement an efficiency optimization algorithm. In addition, a smooth mode transition technique is proposed to avoid the rapid frequency change during reconfiguring modulation strategy. Finally, a 2kW 100V-900V output prototype is built, and main experimental results are provided to verify the effectiveness of the proposed topology and topology reconfiguration method.

A novel high switching frequency isolated voltage-fed hybrid bridge combining semiactive rectifier dc–dc converter is introduced for unidirectional power flow and wide voltage gain. Three potentially appropriate working patterns are elaborated, including ideal output power derivation, current stress analysis, working voltage matching, output power distribution, soft switching characteristics, etc. In consideration of the optimization of the minimum of the root-mean-square value of the leakage inductor current, two truly applicable working patterns are selected. Meanwhile, based on the consideration of soft switching, a segmented control strategy is implemented on it. With the optimization of current stress and the realization of soft switching, the converter can theoretically realize higher efficiency operation. Eventually, the effectiveness of the proposed converter and the control strategy is verified by a 1 kW prototype.

With the rapid development of wireless technologies, the electromagnetic energy scattered in the environment becomes one of the most attractive energy sources for low power devices which are highly demanded in various applications. Since the available electromagnetic signals may have different frequencies, the corresponding receiving antenna and rectifier are required to support multi-band operation to obtain as much energy as possible. However, existing multi-band rectifiers usually have a complex structure or unsatisfactory performance. For this issue, a self-matched rectifying structure is proposed. The theoretical analysis of the proposed configuration demonstrates the unique self-matched characteristics, which is important to implement multi-band operation with simplicity in design procedure and structure. For validation, two rectifiers are designed, fabricated and measured. The dual-band rectifier achieves measured conversion efficiencies of 69.37% and 55.28% at 2.38 GHz and 4.99 GHz with 5 dBm input power in actual measurement, respectively. Owing to the self-matched property, a tri-band design operating at 1.78 GHz, 2.35 GHz, and 4.97 GHz can be easily implemented and achieve efficiency of 60.95%, 71.37%, and 54.01% under test, respectively. Compared with the existing works, the proposed rectifier has high simplicity in both design and structure maintaining high conversion efficiencies at different frequencies.

Single-phase power converters with an active pulsating power buffer (PPB) have many advantages, such as enabling electrolytic-capacitor-free design and simultaneous high power density and high efficiency. However, this new type of converter generally requires more sensors than converters without a PPB due to the additional PPB circuitry. Requiring an excessive number of sensors largely compromises the power density, reliability, and cost of the overall system. Unfortunately, the high-sensor-count issue of single-phase converters with a PPB is seldom discussed in literature. In this article, an algebraic-estimation-based method is proposed to solve this high-sensor-count problem. Specifically, a general theory of employing algebraic observers to reduce the number of sensors is developed. Comprehensive analysis, design, and optimization of the algebraic observers in both continuous and discrete time domain are also provided. Then, the proposed method is applied to a typical single-phase rectifier with a PPB and is verified with simulation and experiments.

This chapter considers the design of an inductor in a power electronic converter, in this case a three‐phase inductor in a dc to ac converter. This represents a circuit which could either be used as part of an active rectifier, or as part of renewable power grid interface. The chapter also considers two strategies, sine‐triangle modulation and extended sine‐triangle modulation. It presents a three‐phase inductor geometry, and develops a magnetic equivalent circuit (MEC) which is the heart of the analysis required for the design. The chapter provides the use of the MEC to evaluate key design specifications, in particular, the determination of inductance and certain coefficients which facilitate loss calculations. It also presents the magnetic analysis of an operating point. This will include assessing the incremental inductance, low‐frequency core loss, high‐frequency core loss, and proximity effect loss. The chapter develops a design paradigm for the three‐phase inductor.

With the advancements in wide-bandgap power devices, the solid state transformer (SST) becomes attractive to industry due to its merits of high efficiency and power density, modularity, and scalability. However, the complexity and cost remain obstacles to widespread adoption. This article presents a unidirectional SST with a cascaded three-level bridgeless power factor correction rectifier stage and a series-half-bridge (SHB) LLC dc–dc stage, which is simpler and more cost effective than its bidirectional counterpart. The quasi-two-level (Q2L) modulation method is proposed for the three-level bridgeless PFC rectifier. In contrast with the three-level modulation, the Q2L modulation almost eliminates the neutral-point (NP) voltage ripple at line frequency, resulting in much less dc-link capacitor volume. Further, the only safe switching sequence to implement the Q2L modulation is identified and analyzed. The NP voltage shall be balanced by the SHB LLC dc–dc stage for proper operation of the system. A phase-shift-based three-level operation mode is proposed for the SHB LLC converter to balance the NP voltage. The proposed methods are experimentally verified on a 10 kW silicon carbide-based three-level converter cell and a single-phase multicell SST prototype.

In this article, we present a 2.4-GHz differential class-DE synchronous rectifier. First, we investigate zero-voltage switching (ZVS), zero-current switching (ZCS), and impedance matching requirements for the single-ended class-DE rectifier. Then, we propose a differential topology that achieves near-optimum ZVS, ZCS, and impedance matching with a reduced number of LC networks. We use a coupled inductor structure to reduce the cost overhead of the differential topology and discuss its design considerations. To maintain the ZVS/ZCS operation within a wide input power range, we employ an adaptive bias circuit to adjust the gate bias voltages with the input power. Additionally, we discuss the imperfections caused by load variation. The chip, fabricated in a 65-nm CMOS process, measures the peak power conversion efficiency (PCE) of 68.5% at a 9-dBm input power with a 250-Ω load resistance. The measured input power range when PCE > 40% is 16 dB.

In this article, the design methodology of integrated magnetics (IM) for a three-phase differential-mode Ĉuk rectifier (DMCR) is outlined. The design and optimization of the IM are so achieved such that the inductor current ripple, total harmonic distortion of the input current, and magnetics loss are optimized without compromising the stability of the DMCR. The optimization and design of the IM are conducted using the Maxwell and SaberRD software tools, and subsequently, the results are compared with a plurality of other IM structures for performance comparison. Finally, the experimental hardware for the DMCR comprising the optimized IM is fabricated to validate its performance and compare it with a DMCR fabricated solely using discrete magnetics.

This article presents a 6.78-MHz single-stage regulating rectifier with hysteretic control and current-wave modulation (CWM) techniques for wireless power receiver applications. The proposed receiver realizes ac–dc rectification and dc–dc regulation in a single-power stage, thus improving the power efficiency and reducing the system volume. The hysteretic control together with the proposed CWM technique achieves a much accelerated load-transient response for the rectifier compared to the recently developed multicycle pulsewidth modulation techniques. The system design complexity is significantly reduced. The proposed multilevel CWM technique achieves more evenly distributed power conversions and less output voltage ripples. The proposed receiver fabricated in a 0.18- μ m CMOS process using 3.3-V devices can regulate the output voltage to 3.3 V and deliver 1.98-W maximum power with a measured peak efficiency of 92.14%. An instant load-transient response is observed for a load current step between 12 and 600 mA.

Four-quadrant (FQ) switches that have both bidirectional current and reverse-voltage blocking (RVB) capabilities are appealing candidates for use in current-source inverters (CSI) to significantly reduce the switch conduction losses. However, the FQ characteristics of these switches can create problems during switching events by causing transient overcurrent pulses that damage the inverter. Commutation methods for FQ switches in CSI topologies that address these challenges are presented in this article. Several key aspects of the performance and implementation of these commutation methods are explored for a high-power density 3 kW integrated motor drive incorporating both a current-source active rectifier and inverter stage that has been developed using these FQ switch methods. Experimental results demonstrate the benefits of implementing these commutation methods in CSIs that use FQ switches. The benefits include substantial efficiency improvement compared to the conventional CSI implemented with series power diodes as well as reduced mass and volume of passive components due to the high switching frequency (100 kHz).

In this paper we proposed better solution for single phase to three phase drive system by employing 2 parallel single phase rectifier stages, a3-phase inverter stage and also we require 3-phase induction motor. In this proposed topology greatly reduces rectifier switching currents and also total harmonic distortion at the side of input converter and this paper gives fault tolerance characteristics improvements, where the added advantage of the proposed system by incorporating more number of switches total energy loss present in the conventional system is reduced to more extent. The main objective of this paper is to reduce the circulating currents. Finally with developed fuzzy logic controller strategy, pulse width modulation (PWM) the total harmonic distortion and elimination of error in the voltage are decreased. We also simulated results with Matlab Simulink and three phase drive system performance.

This article presents the investigation of circuit modelling, design, and optimization of the class-E rectifier to achieve a near-resistive impedance during a large load-range. Based on circuit modelling and impedance depiction, a circuit design concept of impedance compensation to achieve near-resistive impedance is proposed, and we selected the series inductor as the compensation network for class-E rectifiers. After an optimized design, a 6.78-MHz wireless power transfer prototype was built with applying the proposed concept and tested. The experimental results match well with the circuit modelling and validate the impedance shift can be optimized by the proposed circuit design concept. The experimental prototype achieves 87.2% dc–dc efficiency at the rated 220-W output and the phase angle shift is lower than 10 $^ \circ$ during the load decreasing from 220-W rated output to the 40-W light-load output. We also discuss the circuit design considerations and the hardware implementation of the prototype for the proposed design concept.

Domestic induction heating appliances have improved the final user experience due to the advantages that this technology offers, such as flexibility, fast heating, cleanness, and safety. Currently, these appliances are implemented using several isolated electronic boards to be able to be powered from one or several mains phases, enabling their use in regions with different connections. In order to enhance this approach, a multiphase power factor correction rectifier is proposed in this article, improving significantly induction heating cookers. The topology is described, and a wide variety of modulation strategies are presented and analyzed, discussing their main advantages and disadvantages according to the conduction mode, operating frequency, switching mode, and control strategy. In order to validate this proposal, an 11 kW and up-to three-phase high power-density converter for domestic induction heating applications is implemented and experimentally analyzed, including its main waveforms and efficiency. Finally, a comparative evaluation is performed to enable the selection of the optimum modulation strategy for each specific application.

In inductive power transfer (IPT) systems, load, and magnetic coupling variations cause an impedance mismatch. Impedance mismatch is one of the most serious problems in IPT systems for electric vehicles (EVs) because an EV is not always parked in the same location. Therefore, an impedance tuning control for semibridgeless active rectifiers (SBARs) is proposed in this article to compensate for this mismatch. The proposed impedance tuning control is achieved by adjusting the turn- on point and duty of the SBAR without using any additional component. Moreover, a technique for detecting the voltage-rising edge of the SBAR switch is proposed to extract the switching frequency and to synchronize the SBAR with the primary system. A 3.3-kW prototype of the IPT system with the SBAR is manufactured, and the proposed impedance tuning control is verified through experimental results according to the coupling coefficient. The proposed control can achieve an efficiency improvement of 6.4% under the impedance mismatch.

This paper discusses about the transformation of 1Φ to 3Φ drive system. Generally, the distribution of electric power is typically three phase, however, when it is distributed to suburban areas, small scale industries and rural areas it is single phase. This proposed system was developed by using MATLAB Simulink Model and Hardware Implementation. It describes various conversion techniques such as AC to DC conversion using single phase rectifier, DC to DC conversion by using boost converter, DC to Three phase AC by using space vector modulation inverter. Besides software, hardware system was also developed to control the 3Φ asynchronous motor and its performance was successfully obtained.

Due to its several advantages (especially low volume and weight), power electronic transformer has gained notable attraction in railway applications. The main focus of this work is devoted to development a fully filed programmable gate array (FPGA)‐based control platform for power electronic transformer in the aforementioned application. Due to the parallel processing of FPGAs that results in a faster control algorithm execution, reliable operation (which is of major importance in traction applications) is guaranteed. For this purpose, an input series output parallel power electronic transformer structure is built, and various considerations for reliable and stable operation of the power electronic transformer in traction applications, such as safe start‐up and bidirectional power flow, along with the required control and pulse generation schemes, have been designed and implemented in a Xilinx FPGA control platform. Moreover, a modified control algorithm is proposed for controlling the power electronic transformer in a simple and more reliable manner. This control scheme is developed based on the output voltage of the DC–DC–LLC resonant converter, and can effectively control the sum of rectifier DC‐link voltages and track the input sine reference current, with a lower number of required sensors. Finally, the effectiveness of the proposal has been tested from various aspects by experimental tests.

Simultaneous wireless information and power transfer can be realized by means of an integrated receiver, where both the energy harvester and the information decoder operate on the rectified received signal. We investigate the effect of the non-linearity of the rectifier on the error performance of the information decoder when transmitting over a Nakagami- $m$ fading channel. Through analysis and simulation, we demonstrate that the low-noise error performance strongly depends on the small-signal behavior of the rectifier, even when the average operating point is outside the small-signal area. Approximating for analysis purposes the rectifier by a quadratic detector yields accurate bit error rate results for the fading channel in the low-noise regime, whereas an over-optimistic error performance is obtained when applying the envelope detector approximation.

Power quality improvement of power electronics systems in many applications such as adjustable speed drive (ASD) is vital due to the high penetration of grid-connected converters in distribution networks. Conventional diode bridge rectifiers are widely utilized in three-phase systems due to their cost-effectiveness, simplicity, and reliability. To improve their harmonic behavior, in this article, a three-phase bridge rectifier with harmonic mitigation function using an electronic inductor is proposed. The proposed system can mitigate current harmonics caused by other conventional rectifiers connected at the same point of common coupling (PCC). Based on the proposed harmonic reduction technique, a combination of three-phase rectifiers can comply with low-order harmonic emission limits according to IEC 61000-3-12 standard. Simulation and practical measurements are performed to validate the proposed method.

In this work, the different elements of a rectenna were optimized for the energy harvesting from Wi-Fi at 2.45 GHz, using the particle swarm optimization method with real or hybrid dimensions depending on the element. The antenna was optimized in different steps and for each one the effect on its performance was determined. For the rectifier, several commercial diodes were compared for evaluating the best selection for this application. Additionally, a low pass filter and an impedance matching of L-section were implemented as coupling elements. The antenna from the novel rectenna had a gain equal to 4.42 dBi due to the incorporation of a pixeled metasurface structure in the ground layer, and a maximum conversion efficiency of 73% with the diode SMS-7630. In this sense, the optimized rectenna presented a better performance than others from the literature for RF energy harvesting at 2.45 GHz. Therefore, the proposed rectenna can be a good alternative as a power supply in nodes of wireless sensor networks with the addition of the DC–DC boost converter LTC3105.

A new linear control scheme for operating power MOSFETs in the third quadrant (i.e., synchronous rectifier (SR) operation) is proposed and applied to electromagnetic interference (EMI) mitigation of switching converters. MOSFETs operating in the third quadrant exhibit electrical characteristics equivalent to a voltage-controlled voltage source between the gate-source and the drain-source voltages. Such operation is an alternative to typical SR mode, allowing fast control of the ac drain-source voltage. It is applied to active bridge rectifiers (ABRs) that can produce the necessary high-frequency voltage compensation signal to reduce differential-mode EMI. The ABR can then play the role of ac line rectification and EMI reduction at the same time. Its characteristics are modeled, and experimental verifications are carried out on a boost-type power factor corrector (PFC). The EMI performance of the PFC is improved with the proposed technique. The proposed technique facilitates the reduction of passive filter size and gives the potential of integrating active filtering function into the ABR as a solid-state front-end module. The idea can, thus, help increase the power density of power converters.

A novel integrated rectifier–transmitter (IRT) that targets to reduce the power consumption of the uplink communication of a wireless sensor is presented in this letter. The proposed IRT fully utilizes the second harmonic generated by the rectifier as the uplink carrier and modulates this carrier in amplitude through a reconfigurable bandstop filter (BSF) that is dynamically biased by the uplink baseband signal. As a proof of concept, an IRT prototype operating at 2.4 GHz has been implemented and characterized. We report the power conversion efficiency (PCE) to prove that the modulation does not affect the rectification of IRT. An uplink data rate of 100 kb/s has been demonstrated when the IRT is fed with −20-dBm RF power.

In this paper, the evolution and milestones of RFEH and related breakthroughs over the years are reviewed and presented. The review begins with an overview of the surging energy crisis due to the increasing demand for wireless communication devices. Furthermore, the RFEH mechanism that discusses the frequency bands utilized, the near field, and the far-field propagation are also presented. Various rectification techniques in CMOS RFEH, from the fundamental rectification method to cross-coupled-differential-drive (CCDD), are also examined and discussed. The performance is gauged through harvested output DC voltage and the power conversion efficiency (PCE) as well as the RF input power sensitivity. An assessment on the non-CMOS RFEH that includes the Schottky diode and Rectenna is also concisely described to analyze their contribution to RFEH’s performances enhancement. Finally, a particular highlight of the 5G RFEH in mmWave is provided in presenting this work as an ongoing future solution to reduce the electronic circuit’s battery dependency. The pros and cons of all the presented RFEHs are summarized and discussed as well. Continuous research and development activities are extensively being executed in developing a system that could ultimately solve the world’s energy crisis, and RFEH seems to be a revolutionary approach.

The GaN-based critical conduction mode (CRM) totem-pole power factor correction (PFC) converter with full-line-cycle zero voltage switching (ZVS) is a promising candidate for high-efficiency front-end rectifiers. However, the input current can be degraded by line-cycle current distortion and ac line zero-crossing current spikes, and maintaining reliable ZVS control is difficult in noise-susceptible high-frequency environments. In this paper, a detailed analysis of the current distortion issues in a GaN-based CRM totem-pole PFC with digital ZVS control is provided, and effective approaches are proposed to mitigate different kinds of current distortion and ensure stable ZVS control under high-frequency operation. The proposed solutions have the advantages of straightforward implementation and do not increase the control complexity. The current distortion issues are demonstrated in two GaN-based CRM totem-pole PFC prototypes, a 1.5 kW PFC for data centers and a 100 W PFC in a 6.78 MHz wireless charging power supply for consumer electronics. The proposed methods are experimentally verified with effective mitigation of the current distortion and improvement of the converter power efficiency.

A high-efficiency compact broadband rectifier is developed for wireless energy harvesting. A novel three-stage impedance matching technique is utilized in a broadband rectifier design to achieve high conversion efficiency with a compact size. In the rectifier, a low loss impedance matching technique is initiated by employing a linearly tapered transmission line for controlling the impedance curve at the required input power level, followed by two stages to make a circular impedance curve for wideband impedance matching. Both theoretical analysis and numerical simulations of the proposed rectifier are performed. For validation, a prototype is fabricated and demonstrated a broadband performance with a fractional bandwidth (FBW) of 74% (from 1.12 to 2.43 GHz) and power conversion efficiency of more than 50% at a 5 dBm input power level. Moreover, the rectifier can reach an efficiency of more than 50% extending from 0.97 to 2.55 GHz (FBW = 90%) at the input power of 10 dBm, which is the highest bandwidth reported under this condition. This low complexity design is suitable for realizing broadband rectifiers for wireless energy harvesting (WEH) applications.

The paper focuses on galvanically isolated series-resonant dc-dc converters with a low quality factor of a magnetically integrated resonant tank. These converters can be controlled at a constant switching frequency to achieve the input voltage buck regulation. The paper compares various buck control methods, such as conventional pulse-width modulation, hybrid pulse-width modulation, shifted pulse-width modulation, hybrid shifted pulse-width modulation, improved shifted pulse-width modulation, asymmetrical pulse-width modulation, pulse-width modulation, and hybrid pulse-width modulation applied to the series-resonant dc-dc converter. The study considers step-up implementation of the series-resonant dc-dc converter topology with the voltage doubler rectifier, which makes it suitable as a front-end dc-dc converter for the integration of renewable energy sources in dc microgrids. The voltage buck control methods considered were compared analytically in terms of the cumulative power losses calculated theoretically. The theoretical results were compared with the experimental measurements to confirm the calculations and benchmark the voltage buck control methods. The experimental validation was performed using a 250 W prototype that demonstrated the hybrid PSM achieves the best performance. The experimental results were found in good agreement with analytically predicted values of the power loss.

Compared with the traditional dual active bridge (DAB) converter, the push-pull DAB converter can reduce the number of switching devices and is suited for low voltage applications. In order to extend the zero voltage switching (ZVS) range and reduce the current stress within wide voltage range, this paper modifies output rectifier circuit, and proposes an optimized control strategies for push-pull DAB converters. Unlike conventional modulation that only utilizing the primary duty cycle and phase shift angle to adjust the power, the duty cycle for the secondary side is also utilized for the PWM modulation. With the modified PWM modulation, a control law for achieving minimum root mean square (RMS) current within the precondition of achieving wide range ZVS is proposed. The working modes under the modified PWM modulation, current and power analysis and optimized control law are analyzed in depth. Finally, the experimental results using a 1 kW prototype verify the effectiveness of the proposed converter.

In this article, a novel 20-MHz high-frequency high-performance dc–dc resonant converter is analyzed, which owns the characteristics of soft-switching, low voltage stress, and small volume. The numerical analysis is conducted in time domain and the resonant parameters can be accurately calculated based on the corresponding expressions. A full resonant rectifier stage is adopted without using choke inductors, and the value and volume of inductors can be greatly reduced. A 12-V input, 5 V/5 W output prototype is proposed in the laboratory and the experimental results verify the feasibility of the proposed converter and numerical design methodology.

Multicell converters, based on power cells that use low-voltage semiconductors, implement AC motor drives for medium-and high-voltage applications. These converters feature an input multipulse transformer, which performs low-frequency harmonics cancelation generated by three-phase diode rectifiers in the power cells. Despite this advantage, the multipulse transformer is bulky, heavy, expensive, and must be designed according to the number of power cells required by a specific case, limiting the modularity of the topology. This work proposes a multicell converter based on power cells that requires a standard input transformer and uses active front-end rectifiers controlled by employing a finite control set-model predictive control algorithm. The proposed approach emulates the multipulse transformer harmonic cancelation owing to the predictive algorithm operation combined with input current references that are phase-shifted for each active front-end rectifier. Simultaneously, the DC voltages of the power cells are regulated and equalized among the cells using PI regulators. Experimental results confirm the feasibility of the proposed system as input currents in each Multicell AFE rectifier with a unitary displacement factor, and a low THD of 1.87% was obtained. It is then possible to replace the input multipulse transformer with standard ones while reducing the copper losses, reducing the K factor, and extending the modularity of the power cell to the input transformer.

The availability of energy is one of the major hindrances to unlocking the massive potential of electronic devices. Powering a highly connected network of devices requires multiple access and a wireless power transfer (WPT) solution that is scalable and capable of maintaining a constant power flow regardless of reconfiguration (mutability) and electromagnetic environment (power flow selectivity). In this paper, we present a framework for the implementation of code division multiple access wireless power transfer (CDMA-WPT) for enabling WPT among multiple transmitters and multiple receivers simultaneously. CDMA-WPT maintains power flow selectivity and is easily scalable. An inverter/rectifier topology is presented for the hardware implementation of CDMA-WPT. A design process for practical co-design of high-performance hardware and obtaining a code set is also presented. We demonstrate the hardware implementation of CDMA-WPT using two transmitters and two receivers maintaining a nearly constant 5W operation with nearly 75% dc-dc efficiency, and four transmitters and four receivers maintaining a constant 4W operating with greater than 70% dc-dc efficiency. This paper is accompanied by a video hardware demonstration in real-time the difference between using orthogonal codes in CDMA versus conventional single-frequency WPT using 4 transmitter-receiver pairs; conventional single-frequency WPT shows up to a 82% deviation from the intended transfer power as opposed to 8.1% for orthogonal codes in CDMA.

Compared with insulated-gate bipolar transistors, integrated-gate commutated thyristor (IGCT) has lower on -state voltage, higher reliability, and lower manufacturing costs, thus, making it more suitable for high-power applications. This article focuses on the full-time junction temperature extraction of IGCTs for high-power applications. An electrothermal model for IGCT is established. Nonlinear optimization and accuracy analysis of this model are performed, which proved that the model achieves good accuracy. On the basis of the electrothermal model, junction temperature during switching on , switching off , and off state is evaluated. The junction temperature during conduction is extracted based on the temperature-sensitive electrical parameter method. Combining these two schemes, a comprehensive method to extract full-time accurate junction temperature of IGCT for high-power application is proposed. An experimental platform of IGCT-based modular multilevel converters for high-power applications is built, and power cycling experiments at different voltage and current ratings of up to 2.2 kV/1.5 kA were carried out to verify the correctness and effectiveness of the proposed method. Results show the junction temperature profile over a long period. The junction temperatures of IGCT both in inverter and rectifier modes and under different power-loading conditions are compared with the proposed comprehensive method.

Rectifiers are essential for microwave wireless power transfer (MWPT). RF-DC conversion efficiency must be improved for the practical use of MWPT. The focus of this research is related to single shunt rectifiers. Former research explained the operations of single shunt rectifiers in the frequency domain. Currently, we are using a harmonic balance method for the circuit simulations. These analyses focus on the frequency domain and transient phenomena were not directly analyzed. Also, the differences between experiments and their simulations are still issues in designing rectifiers. Therein, we analyzed an ideal rectifier with transient analysis and simulation. We also propose a novel simulation for single shunt rectifiers. Our simulation method is based on simple theories focusing on the steady-state condition of transient phenomena. In our analysis method, the output DC voltage is a fixed parameter and the DC current with the voltage is calculated. Therefore, this method is suitable for analyzing I-V characteristics. First, theoretical solutions are compared with Advanced Design System (ADS) simulations and they show the good agreement. Next, we created the novel simulation with our analysis method. Their results are also compared with ADS simulations. These analyses showed good agreement. Therefore, our novel method is consistent with former researches and commercial simulations. As a result, this research shows a novel analysis method for single shunt rectifiers and its consistency.

In this paper, a novel relaying scheme is proposed for bipolar line commutated converter (LCC) high voltage direct current (HVDC) transmission lines that detects the fault, identifies the pole of fault and estimates the location of the fault. The scheme uses features extracted from rectifier end DC current and voltage signals. Long short term memory (LSTM), a deep learning method has been designed as classifier as well as predictor for carrying out different relaying tasks. Three modules have been designed namely LSTM-FD (LSTM module for fault detection (FD)), LSTM-FI (LSTM module for fault pole identification (FI)) and LSTM-FL (LSTM module for fault location estimation (FL)). The voltage and current signals are obtained from measuring units. Then with a moving window of one cycle, the RMS of signals is calculated. The current and voltage features are obtained in the time domain. The voltage and current features obtained are used as input to fault detection and fault pole identification module. For fault location estimation, half cycle samples of RMS current and voltage after the fault have been taken. From half cycle sample, maximum value of current and minimum value of voltage has been obtained. This single value of current and voltage are used as input feature to the fault location module. All the relaying modules have been tested varying fault types, locations, resistances, smoothing reactors, noisy signals, etc. Sensitivity and reliability of the proposed relaying scheme is 100% with all the tested fault cases. Error in location estimation is within 1% for all the tested fault cases. Advantage of the method is that it does not require communication link. Another advantage of the proposed method is that it can work with low sampling frequency. Additionally, reliability and sensitivity of proposed method is very high, hence can be used as an alternative to travelling wave based relaying schemes.

This article presents a general impedance-emulating control method for single-phase rectifiers. To repress the harmonic currents due to the distorted input supplies, a general harmonic impedance based on the concept of repetitive control is emulated. To realize unity power factor, a negative inductor-emulating technique based on the extremum-seeking scheme is applied. In this method, the input voltage sensor is not needed, so the cost is reduced and the reliability is improved. The experiments are conducted to verify the effectiveness of the proposed method.

A novel two-stage structure with two dc buses is proposed for isolated bidirectional dc–ac power conversion. A variable dc-link voltage plus a constant dc-link voltage operation is adopted for the proposed two-stage structure. One of the dc-link voltages is regulated adaptively according to the variation of dc-side voltage, so that the dc–dc power stage can always work at its optimized point. New families of three-port (TP) bidirectional dc–dc converters and TP bidirectional inverter/rectifier (TP-BIR) are proposed to implement the proposed two-stage dc–ac power conversion structure. A bidirectional dc–ac converter composed of a TP-CLLC resonant converter and a T-type TP-BIR is taken as an example to verify the effectiveness of the proposed structure. Operation principles of both the TP-CLLC resonant converter and the T-type TP-BIR are analyzed in detail. Modulation and control strategies are proposed for the TP-BIR to achieve voltage regulation and power distribution between the two dc buses. A 1.5-kW prototype is built and tested to verify the feasibility and advantages of the proposed solution.

Due to the large relative permittivity of Class II dielectrics, ceramic capacitors (CCs) from these materials promise significant volume and weight reductions in inverter and rectifier sine-wave filters, and are especially attractive in mobile applications that demand ultrahigh power density. While previous literature found large low-frequency losses in these components, no extensible loss model was proposed to accurately characterize these ferroelectric losses. In this article, we take advantage of prior art on ferro magnetic components in power electronics to propose a Steinmetz parameter-based loss modeling approach for X7R CCs, named the Improved Generalized Steinmetz Equation for CCs, or iGSE-C. This model is verified using the Sawyer–Tower circuit to measure losses in a commercially available X7R capacitor across excitation magnitude, dc bias, temperature, excitation frequency, and harmonic injection. Losses are shown to scale according to a power law with charge, with the resulting Steinmetz coefficients valid across dc bias and slightly varying as the temperature is increased. The iGSE-C accurately predicts losses for typical nonsinusoidal phase voltage waveforms with an error under 8%. Finally, the loss modeling technique is demonstrated for the sine-wave output filter of a bridge-leg arrangement with both low- and high-frequency excitations, with total capacitor losses predicted within 12% accuracy.

The modular multilevel converter (MMC) is a promising candidate for the high-voltage and high-power applications. Fault localization is an important issue for the reliable operation of the MMC. The localization strategies of switch open-circuit failures for the MMCs in the inverter mode have been widely reported in the existing literature. This brief proposed a complete fault localization strategy for the MMC in the rectifier mode. In this brief, the differences of the fault characteristics between the inverter mode and rectifier mode are analyzed in detail. Based on that, the switch signal is used as the criterion for the fault localization. After the faulty submodule (SM) is identified, combining the switch signal and the capacitor voltage of the faulty SM can further locate the faulty switch. The proposed strategy can simplify the localization and identify three kinds of switch failures in SMs. In addition, the validity of the proposed strategy is verified by the simulation results.

This brief presents a methodology to design RF energy harvesting rectifiers that produce a system with higher efficiency when compared to traditionally optimized circuits. The proposed methodology uses a dual-perspective approach, exploiting the designer’s knowledge of the rectifier’s operation, as a qualitative evaluation, and the precise results obtained by SPICE simulation as quantitative computation of the system’s response. The compromises considered by the mathematical steady state models in the existing literature limit their practical use for manual calculations. Instead, nonlinear steady state simulation methods, such as harmonic balance, provide a much better design tool. The proposed method improves the efficiency of rectifiers by up to 27% with respect to arbitrary initial conditions.

In this article, a new carrier-based pulsewidth modulation (CBPWM) technique is presented for three-to-three phase indirect matrix converter (IMC). The main feature of this technique is the use of single triangular carrier to obtain the switching signals for both converter stages of the IMC. Simplified modulation equations calculated independently from the sector judgements and space vector pulsewidth modulation (SVPWM) technique are proposed for the bidirectional rectifier and inverter stages of the IMC. As a result, the presented CBPWM technique is implemented easily with the reduced complexity as compared to the conventional single carrier-based CBPWM techniques developed based on the SVPWM technique. This new technique features all the benefits associated with the conventional CBPWM techniques of the IMC, i.e., sinusoidal input/output waveforms, voltage transfer ratio of 0.866 and generation of the switching signals independent of the lookup tables. The simulation model of the IMC is developed in the PSIM environment to verify the performance of the proposed CBPWM technique. The laboratory prototype for the IMC is developed based on the proposed scheme using the DSP and FPGA devices. The experimental results are included to support the simulation results.

This article presents a low-power 1/4-rate four-level pulse amplitude modulation (PAM4) receiver with an adaptive variable-gain rectifier (AVGR)-based decoder in 28-nm CMOS technology. The PAM4 input signal is preconditioned by a continuous-time linear equalizer (CTLE) then sampled into four branches of decoders by 1/4-rate clocks. The proposed AVGR-based PAM4-to-nonreturn-to-zero (NRZ) decoder performs gain adaptation and amplitude rectification simultaneously for decoding the least significant bit (LSB). The linear sense amplifier in the AVGR is modified from a latch to achieve a high gain and low power. Compared with the full-rate receiver adopting a decoder consisting of three comparators, this design achieves a better power efficiency by employing a 1/4-rate topology and merging a variable-gain function into the decoder. Experimental results demonstrate that the receiver chip can receive and decode a 24-Gb/s 190-mVpp PAM4 signal at a BER of 10−11 and a bit efficiency of 1.38 pJ/bit.

For wireless power transfer and energy harvesting applications, an advantage of having a broadband rectifier is the coverage of a wide range of narrowband frequencies as well as wideband pulses. Many broadband rectifiers have been recently proposed, but their reported characteristics are mainly evaluated at discrete frequencies. Due to the nonlinear nature of rectifiers, such frequency domain characteristics may not directly correspond to the time-domain, especially when input signals are wideband pulses. In this letter, we report the performance evaluation of a broadband rectifier on wideband pulses with various pulse parameters. Here, we use our recently proposed broadband rectifier as a test device. Using Gaussian-modulated RF pulses with various pulse parameters (i.e., pulsewidth, pulse repetition interval, and power), the rectification performance is verified via simulation and measurement. The results demonstrate sufficient rectification efficiency even for short pulses under appropriate parameters, where a maximum rectification efficiency of 71% is obtained.

The present paper focuses on the use of the Multilevel Current Rectifier topology as an interconnection element between PV systems and the network or loads. In order to properly use the converter in connection with the PV system, several subjects such as the compatibility with the maximum power point tracking and the compatibility between the converter and the PV array must be taken into account. Compatibility between the converter and the PV array can be achieved by ensuring at least the maximum power point is a point that the converter can work with. In this sense, this work focuses on the operating conditions to guarantee the compatibility with the PV array. The main results are an analytical and experimental characterization of the operating range of the system using the Multilevel Current Rectifier. This operating range has a precision of 1 % . Leading to the conclution that not only the converter is a viable option, but also that the theory and methodology used can be extrapolated to another topologies.

This article proposes a 20-pulse asymmetric multiphase converter (AMPC) suitable for medium- and high-power applications. Unlike the other state-of-the-art 20-pulse delta-connected autotransformers, the proposed delta-connected AMPC has an ability to reduce input harmonics, maintains high efficiency, and requires a magnetic rating of only 30.12% of the nominal load; thereby, a significant reduction in space, weight, and overall cost required is the salient features of the proposed AMPC. A detailed power quality performance analysis and an efficiency calculation are discussed. First, the proposed AMPC configuration is simulated in MATLAB/Simulink environment for evaluating its viability under different loading conditions, and the results are illustrated. A detailed comparison of the proposed AMPC configuration with other multipulse transformers is included, which confirms the merits of the proposed system. Also, a prototype is developed, and the experimental measurements obtained are presented to validate the feasibility and operability of the proposed AMPC. The proposed AMPC offers a total harmonic distortion of 3.7% and can operate at near-unity power factor complying with the IEEE and IEC standards.

Wireless power transfer (WPT) is an emerging technology deployed for a wide range of applications. Various design challenges need to be addressed at both circuit and system levels. However, the conventional modeling methods either require impractical assumptions or only focus on the coil-to-coil part. This article presents a system-level model for WPT applications, including all the critical interior blocks, such as power amplifier, transmitter coil, receiver coil, matching networks, and rectifier. An accurate characterization method is proposed to obtain the rectifier impedance as a realistic load condition. Then, through frequency harmonic analysis, the power capabilities along the power flow path are analytically derived for both the fundamental and higher order harmonic components. The system efficiency and the power loss at each block can be accurately estimated. As a result, this model can not only optimize the system performance, but also help improve the thermal design for WPT products. With the assistance of this improved model, a practical design methodology is introduced to optimize the system parameters. An experimental prototype is built to validate the proposed model and the design methodology. Good correlations are observed between the calculations and experiments in both the time-domain and frequency-domain results.