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5G era is coming, mobile devices with high performance and high duration ability have been common requirement in recent years. By shrinking PCB size to enlarge battery size seems like a simple way. However, there will be more and more components integrated into a smartphone devices so IC packaging would require the feature of small form factor with integrating inductors, capacitors and resistors into a single module. Today, an emerging 3D packaging solution aka Double-Sided-SiP could offer higher integration ability as well as addressing space limitation.In this paper, a double side molding process will be used forming the Double-Sided-SiP structure which integrates lots passive components on the top side of Double-Sided-SiP are assembled by SMT, and SoC die on the bottom side is surrounded by BGA ball and epoxy molding compound. This kind of packaging platforms are able to shrink overall package size around 35%. However, to provide sufficient related current and voltage usually use bulky passives for this kind of applications. It means that top mold must be tall enough to accommodate the bulky passives. With overall package height constraints, an extremely unbalanced mold ratio between top mold and bottom mold is expected to cause worse warpage performance. Another major challenge is to make BGA ball solder protrusion for sufficient stand of height proceeding to SMT assembly process.In this study theme, warpage simulation for strip form and package unit form will be implemented for epoxy molding compound selection. Afterward, using DOE (Design of Experiment) study to verify warpage performance post molding will be implemented. Another DOE study to find out proper laser ablation process parameter will be performed to reach designate BGA ball solder protrusion as well. In addition, a series typical reliability testing, including TCT(Temperature Cycle Test), HTST(High Temperature Storage Test), un-bias HAST are eventually carried out as verification of the Double-Sided-SiP structure.

Along with the rapid spread of portable electronic products on the mobile computing market, the increase in the use of video streaming, photo sharing and also other data-intensive applications keep growing up continuously for now. More and more IoT/Wearable and 5G connectivity devices are required with Radio Frequency (RF) and Front-End Module (FEM) which has driven the development of IC packaging towards on small form factor, thin profile, better electrical and thermal performance, as well as 3D stacking for multi-function integration [1]. To approach these requirements, the System in Package (SiP) can be a combination of one or more chips plus optionally passive components by using Surface Mount Technology (SMT) and 3D structure of double side into a single package to offer a small form factor, high performance and systemization implemented. The high speed SMT process accomplishes the high-density with more than 50 discrete passive as well as active components and heterogeneous integration on package level approach. The development of double side technology offers the advantage of package size shrinkage by the same integrating discrete passive and active components layout. In this paper, the innovative packaging solutions of 3D double side SiP including the platform for both strip form of substrate base and wafer form of Fan-Out Redistribution Layer (RDL) base will be well introduced. Fan-Out RDL is an extension approach of Wafer Level Chip Scale Package (WLCSP), this technology is different from conventional wire bond or flip chip packages because the redistribution dielectrics and fine-line plated conductors are used for interconnection to replace the packaging substrates. As a case study, the calculation of 3D SiP package size can be shrunk around 50% area and the total package thickness can achieve around 15% z-height reduction with thin form coreless substrate and Fan-Out RDL technology utilization. The characterization analysis will apply simulation methodology for electrical comparison on DC resistance and parasitic inductance, thermal comparison on Theta JA (°C/W) and warpage comparison on the package structure of 3D double side SiP. Also, the typical reliability testing (Temperature Cycle Test, High Temperature Storage Life Test, Unbiased High Accelerated Stress Test) are built to verify 3D double side SiP structure for future IoT/Wearable and 5G devices application. Currently the market trends clearly drive towards 3D double side SiP, so this article illustrates the innovative packaging solutions with both substrate base and Fan-Out RDL base to provide a unique opportunity for enabling 3D integration and system in package.

In the near future, the next potential fast and large growing opportunity market will be the Internet of Things (IoT) and fifth generation (5G) connectivity application, due to the electronics industry is moved maturely on the mobile computing market for now. To meet the new application requirements & challenges, high-gain antennas have been proposed for wireless connectivity applications such as IoT and 5G product for high data transmission and low power consumption requirements. Differemt frequency transmission required to integrate an antenna in SiP module so that product designer can develop the products as compact as possible for specific application. This advanced technology will provide the integration solution for small form factor, high electrical performance, multi-function and low cost were the most popular requirements, the System in Package (SiP) is a combination of heterogeneous idea with semiconductor devices and passive components within one small package as system function module.In this paper, SPIL provided an alternative 3D small form factor SiP methodology will use surface mount technology (SMT) and 3D structure of stacking die on passives with antenna integration were designed to shrink the package size, the calculation of package size can be shrunk around 25% area and package size reduced from 16 x 12mm to 12 ×12mm. This new solution could be integrated an antenna inside SiP module as antenna in package (AiP) technology to get small form factor and additional major benefites to address cost, performance, and time-to-market.The characterization analysis will utilize typical reliability testing (Temperature Cycle Test, High Temperature Storage Test, unbias HAST) results as a verification for stacking die on passives integrated 3D antenna of SiP feasibility structure. Finally, this paper will find out the suitable 3D stacking die on passives of SiP structure and antenna integration solution for future IoT and 5G Connectivity devices application.

Recently, the electronics industry is moved maturely on the mobile/tablet market. The next fast growing opportunity market will be the Internet of Things (IoT) and Wearable Deivces in the near future. This advanced technology/package need to provide the ideal solution for small form factor, thin profile, high electrical performance, multi-function integration and low cost are the most critical requirements. To approach these requirements, the System in Package (SiP) is a combination of one or more semiconductor devices plus optionally passive components that define a certain functional block within a small package, mounted onto the system's main board assembly. SiP can be integrated multi-function chips into a single package and offer a small form factor and a low cost system solution for many wireless connectivity applications. In this paper, an alternative 3D small form factor SiP methodology will use surface mount technology (SMT) and 3D structure of stacking die on passives to shrink the package size. The calculation of package size can be shrunk around 25% area and package size reduced from 11.5 × 11.5mm to 10x10mm. For the experiment including the DOE (Design of Experiment) study for the passive quantities optimization and also die tilt performance between different passive quantities. By utilizing exiting package solutions (such as wire bond, flip chip, hybrid or stacked die process), a SiP module provide a unique opportunity to address cost, performance, and time-to-market. Considering the limitations of power consumption and form factor, such as Bluetooth Low Energy (BLE), and wireless connectivity module will become the major requirements for SiP platforms in near marketing. The characterization analysis will utilize simulation methodology & typical reliability testing (Temperature Cycle Test, High Temperature Storage Test, unbias HAST) results as a verification for 3D stacking die on passives of SiP feasibility structure. Finally, this paper will find out the suitable 3D stacking die on passives of SiP structure and feasibility data for future IoT and wearable devices application.