1. Analysis and Implementation of the MNRV DPWM Methods Applied to Single-Phase Diode-Clamped Four-Level PWM Inverter
- Author
-
Min-Sup Song
- Subjects
Single-phase PWM inverter ,diode-clamped ,four-level ,dc-link voltage balancing ,offset voltage injection ,multi-neighboring reference vector discontinuous PWM ,Electrical engineering. Electronics. Nuclear engineering ,TK1-9971 - Abstract
This paper introduces the multi-neighboring reference vector discontinuous pulse-width modulation (MNRV DPWM) with offset voltage injection methodology tailored for single-phase diode-clamped four-level PWM inverters. By evenly utilizing multiple adjacent reference vectors with diverse charging/discharging characteristics of dc-link capacitors and employing duty compensators to adjust minor voltage discrepancies under practical conditions, precise tracking of commanded voltages is ensured even under transient conditions, while maintaining balanced voltages across the dc-link capacitors. This approach proposes various continuous/discontinuous modulation types using deliberately designed offset voltages to minimize dc-link voltage variation. Notably, setting the offset voltage to zero interestingly implements conventional virtual-vector PWM. The sum of the product of the duty ratios of the basis vectors and the phase currents was analyzed, and its relationship with the dc-link voltage fluctuation was mathematically rigorously examined. Through various simulations and prototype experiments, the steady-state operational characteristics of the proposed method have been validated, demonstrating lower average switching frequencies and superior total harmonic distortion performance compared to conventional method. The proposed method demonstrates overall superior performance in total harmonic distortion (THD) compared to the conventional carrier-overlapped PWM (COPWM) technique. At a power factor (pf) of 0.9, it provides comparable or slightly better performance, while at pf =0.3 and a modulation index (m) of 0.3, it exhibits significant improvements. Specifically, the proposed method reduces the output voltage THD to 86%-126% and the output current THD to 4.65%-5.45%, outperforming the COPWM, which recorded 121% and 7.35%, respectively. Additionally, proposed method reduces the average switching frequency by approximately 30% and the control operation time by about 22% compared to existing methods. The stability of the dc-link voltage equilibrium under transient conditions was also successfully verified.
- Published
- 2024
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