Search

This paper introduces a low-power wireless RF receiver for the wireless sensor network. The receiver has improved linearity with incorporated current-mode circuits and high-selectivity filtering. The receiver operates at the 900-MHz industrial, scientific, and medical band and is implemented in 130-nm CMOS technology. The receiver has a frequency multiplication mixer, which uses a 300-MHz clock from a local oscillator (LO). The LO is implemented using vertical delay cells to reduce power consumption. The receiver conversion gain is 40 dB and the receiver noise figure is 14 dB. The receiver’s input third-order intercept point (IIP3) is −6 dBm and the total power consumption is 1.16 mW.

Wireless transmitters (Tx) targeting Internet-of-things (IoT) applications impose tough end-to-end efficiency requirements. The frequency synthesis problem is usually solved by incorporating a variant of the phase-locked loop. However, power-hungry dividers and large loop time constants hurt the aggregated Tx power consumption and produce systems with slow start-up and turnaround times, particularly when operating at low output power. This paper demonstrates an agile ultralow power and energy-efficient transmitter architecture for IoT applications to address these concerns. The Tx leverages the characteristics of the wideband frequency-shift keying modulation and uses an openloop ring oscillator based on a vertical delay cell as its local oscillator (LO) generator. When followed by an edge-combiner-type power amplifier, the required LO operating frequency drops to one-third of the RF frequency, which further reduces the Tx power consumption. Moreover, LO frequency correction is achieved through a digitally assisted scheme with specially designed delay cells for fast frequency calibration. The Tx was fabricated in 0.18- $\mu \text {m}$ CMOS technology and occupies an active area of 0.112 mm2. The experimental results show a Tx energy efficiency of 0.2 nJ/b for a 3-Mb/s data rate and a normalized energy efficiency of 3.1 nJ/b $\cdot $ mW when operating at a maximum output power of −10 dBm.

This work aims to present the post layout simulation of a fully differential implementation of two-stage low noise amplifier (LNA) using feedback transformer in TSMC 65nm CMOS technology. The transformer is used to neutralize with Miller capacitance of the FET. Guanella transmission line transformer (TLT) is implemented using coupled transmission line. This transformer is easier to design than other conventional types of transformers. The LNA achieves transducer gain (Gt) of 12.2dB with noise figure (NF) of 4.27dB and IIP3 is 5.6dBm, while it consumes 30mW from 1.2v. This design has almost a perfect input output isolation of more than 60dB.

In this work, the design of a 94GHz rotary traveling wave oscillator (RTWO) is presented. The oscillator targets mm-Wave transceivers for biomedical imaging applications. A design procedure to minimize the total power consumption is presented. Using this proposed procedure, a 4 section RTWO is designed in a 65nm CMOS technology. The oscillator consumes 80mA (including buffers) from a 1V supply, and has a phase noise of −106.4dBc/Hz at 10MHz offset with a total core area of 0.36mm2.

Summary In this paper, a digitally controlled current conveyo(DCCC) is presented. The proposed DCCC is based on rail-to-rail folded cascode implementation with a current division network (CDN). The CDN is used to provide control on the current gain of the DCCC. The CDN uses a novel current division technique based on differential pairs. The proposed DCCC can operate from ±1.5 V supply voltages. Applications of the proposed DCCC such as variable gain amplifiers (VGA) and digitally tunedfilters have been investigated. PSpice simulations based on the AMI 1.2 µm N-well level 3 parameters are in agreement with the presented work.

This paper presents the design of a novel integrated continuous current sensor (CCS) circuit for class-D audio amplifier and current mode controlled DC-DC converter. The proposed current sensor has the capability of sensing either positive or negative current of off-chip inductor continuously. Additionally, fast transient response with low quiescent current has been achieved. Furthermore, a calibration technique has been developed and attached to current sensor circuit to eliminate performance deterioration due to process, supply, and temperature (PVT) variation. The proposed CCS has been implemented using TSMC 65 nm technology. Simulation results show that the proposed CCS is able to operate with switching frequency up to 1 MHz at only 75 μA quiescent current. The overall accuracy of proposed CCS is greater than 95% over all process corners and temperature variation from -40°C to 125°C, and supply variation from 2.5 V to 2.9 V.

In this paper, a novel fully differential second-generation current conveyor (FDCCII) is presented. The proposed block is useful in mixed-mode applications where fully differential signal processing is required. Furthermore, the FDCCII can be used to realize MOSFET-C filters. The circuit has a bandwidth of about 10 MHz under heavy capacitive loads and can operate from low supply voltages down to /spl plusmn/1.5 V.

A new CMOS programmable rail-to rail transconductor is presented. A linear V-I characteristic is obtained by using the principle of nonlinearity cancellation of matched MOS transistors operating in the ohmic region. Rail-to-rail operation is achieved by using two complementary blocks. The circuit is suitable for low voltage as it can operate from supply voltages down to /spl plusmn/1.5 V. PSpice simulations show that the transconductance gain can be electronically tuned from 13 to 90 /spl mu/ A/V with bandwidth of about 40 MHz.

Threshold voltage cancellation (V t cancellation) scheme is applied to cancel the threshold drop associated with the diode-connected device and improve charge pump performance. Applying this scheme depends on generating control signals from the next stage so it cannot be applied on the output stage. In this paper V t cancellation is applied for the output stage of modified Pelliconi pump. This is done by adding an extra circuit that establishes the controlling signals necessary for the auxiliary circuit of the output stage. This modification in the output stage leads to increasing the whole pump power efficiency and voltage gain. Also the pump output equivalent resistance is improved. The proposed charge pump is more suitable for energy harvesting applications due to its ability to give more gain at low voltage levels.