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The time-stability of the electrical characteristics of chalcogenide materials is one of the most important issues for their use in nonvolatile solid state memory applications. In particular the electrical conduction of the glassy phase evolves with time due to two different physical phenomena: the crystallization and the so-called low conductivity drift. Despite the physics of crystallization having been extensively studied in literature, the latter is mainly described by phenomenological relationships, and its physical comprehension is still under discussion. In this paper we study the amorphous phase low-field conductivity drift and its dependence on the temperature experienced by the device. We developed an experimental procedure able to separate the reversible change in the electrical conductivity with temperature due to the material semiconductorlike behavior from the nonreversible one related to the drift mechanism. A drift model explaining such nonreversible conductivity change as a band diagram modification is also provided and calibrated on experimental data. The present work finally introduces alternative metrics for drift quantification that can be useful in order to compare different materials. [ABSTRACT FROM AUTHOR]

In a phase-change memory (PCM), the overreset phenomenon, namely, the resistance decrease at pulse amplitudes well beyond the reset current, may affect the resistance window and the device noise margin. We characterized overreset states in PCM devices by electrical testing and electron microscopy. Our analysis shows that overreset programmed cell presents changes in the electronic band structure of the amorphous phase, with no degradation in the programmed amorphous volume. [ABSTRACT FROM AUTHOR]

Metal oxides can display resistance transition by the application of suitable electrical pulses, and this behavior is exploited for the development of resistive-switching memory devices. Here we report time-resolved electrical measurements demonstrating that the transition from the insulating to the metallic-conductivity state in NiO is first triggered by a threshold switching, i.e., an electronic transition to a highly conductive state typically observed in disordered semiconductors. Evidence for the possibility of subnanosecond transitions to low resistance is shown. Numerical simulations of threshold switching and Joule heating are finally presented, highlighting the role of the parasitic capacitance in the set transition. [ABSTRACT FROM AUTHOR]

The time-stability of the electrical characteristics of chalcogenide materials is one of the most important issues for their use in nonvolatile solid state memory applications. In particular the electrical conduction of the glassy phase evolves with time due to two different physical phenomena: the crystallization and the so-called low conductivity drift. Despite the physics of crystallization having been extensively studied in literature, the latter is mainly described by phenomenological relationships, and its physical comprehension is still under discussion. In this paper we study the amorphous phase low-field conductivity drift and its dependence on the temperature experienced by the device. We developed an experimental procedure able to separate the reversible change in the electrical conductivity with temperature due to the material semiconductorlike behavior from the nonreversible one related to the drift mechanism. A drift model explaining such nonreversible conductivity change as a band diagram modification is also provided and calibrated on experimental data. The present work finally introduces alternative metrics for drift quantification that can be useful in order to compare different materials. [ABSTRACT FROM AUTHOR]

Abstract: Resistive switching memory (RRAM) devices are attracting an increasing interest as a possible future technology for ultra-scaled, high-density nonvolatile/dynamic memory. Although the RRAM concept is promising from the integration and scaling viewpoints, the switching mechanism and its controllability are still under debate. This paper addresses the modeling of reset and retention processes in unipolar resistive-switching memory devices. Reset transition and data loss are described in terms of the dissolution of a conductive filament, which is modeled by thermally-activated diffusion of defects/dopants. Carrier transport, Joule heating and diffusion of oxygen ions/vacancies during the electrical pulse and/or the annealing are modeled within a 3D numerical solver. The model can account for the observed dependence of reset voltage on the width of the applied triangular pulse and on the initial resistance for NiO-based RRAM devices. Retention simulations as a function of annealing temperature also agree with available data. The model provides a first example of device simulation tool for the design and the exploration of scaling and performance of RRAM cells. [Copyright &y& Elsevier]