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Four sources of variability, metal grain granularity (MGG), line-edge roughness (LER), gate-edge roughness (GER), and random discrete dopants (RDD), affecting the performance of state-of-the-art FinFET, nanosheet (NS), and nanowire (NW) FETs, are analysed via our in-house 3D finite-element drift-diffusion/Monte Carlo simulator that includes 2D Schrödinger equation quantum corrections. The MGG and LER are the sources of variability that influence device performance of the three multi-gate architectures the most. The FinFET and the NS FET are similarly affected by the MGG variations with threshold voltage and on-current standard deviations significantly lower (at least 20 %) than those of the NW FET. The LER variability has a negligible influence in the NS FET performance with $\sigma ~{V}_{T}$ values around 12 and 42 times lower than those of the FinFET and the NW FET. The three architectures are equally affected by the RDD ($\sigma {V}_{T}$ = 8 mV) and minimally influenced by the GER ($\sigma {V}_{T} \approx 4$ mV). The variability of NS FETs makes them strong candidates to replace FinFETs. [ABSTRACT FROM AUTHOR]