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In 5G and beyond radios, the increased bandwidth, the fast-changing waveform scenarios, and the operation of large array multiple-input multiple-output (MIMO) transmitter architectures have challenged both the polynomial and the artificial neural network (ANN) MIMO adaptive digital predistortion (DPD) schemes. This article proposes training data selection methods and dimensionality reduction techniques that can be combined to enable relevant reductions of the DPD training time and the implementation complexity for MIMO transmitter architectures. In this work, the combination of an efficient uncorrelated equation selection (UES) mechanism together with orthogonal least squares (OLS) is proposed to reduce the training data length and the number of basis functions at every behavioral modeling matrix in the polynomial MIMO DPD scheme. For ANN MIMO DPD architectures, applying UES and principal component analysis (PCA) is proposed to reduce the input dataset length and features, respectively. The UES-OLS and the UES-PCA techniques are experimentally validated for a $2 \,\times \, 2$ MIMO test setup with strong power amplifier (PA) input and output crosstalk. [ABSTRACT FROM AUTHOR]

This paper presents an estimation/adaptation method based on the adaptive principal component analysis (APCA) technique to guarantee the identification of the minimum necessary parameters of a digital predistorter. The proposed estimation/adaptation technique is suitable for online field-programmable gate array or system on chip implementation. By exploiting the orthogonality of the resulting transformed matrix obtained with the APCA technique, it is possible to reduce the number of coefficients to be estimated which, at the same time, has a beneficial regularization effect by preventing ill-conditioning or overfitting problems. Therefore, this identification/adaptation method enhances the robustness of the parameter estimation and simplifies the adaptation by reducing the number of estimated coefficients. Due to the orthogonality of the new basis, these parameters can be estimated independently, thus allowing for scalability. Experimental results will show that it is possible to determine the minimum number of parameters to be estimated in order to meet the targeted linearity levels while ensuring a robust well-conditioned identification. Moreover, the results will show how thanks to the orthogonality property of the new basis functions, the coefficients of the digital predistorter can be estimated independently. This allows to tradeoff the digital predistorter adaptation time versus performance and hardware complexity. [ABSTRACT FROM AUTHOR]

This paper presents a technique to estimate the coefficients of a multiple-look-up table (LUT) digital predistortion (DPD) architecture based on the partial least-squares (PLS) regression method. The proposed 3-D distributed memory LUT architecture is suitable for efficient FPGA implementation and compensates for the distortion arising in concurrent dual-band envelope tracking power amplifiers. On the one hand, a new variant of the orthogonal matching pursuit algorithm is proposed to properly select only the best LUTs of the DPD function in the forward path, and thus reduce the number of required coefficients. On the other hand, the PLS regression method is proposed to address both the regularization problem of the coefficient estimation and, at the same time, reducing the number of coefficients to be estimated in the DPD feedback identification path. Moreover, by exploiting the orthogonality of the PLS transformed matrix, the computational complexity of the parameters’ identification can be significantly simplified. Experimental results will prove how it is possible to reduce the DPD complexity (i.e., the number of coefficients) in both the forward and feedback paths while meeting the targeted linearity levels. [ABSTRACT FROM AUTHOR]