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This article introduces an efficient method to determine the dielectric model parameters of a thin film substrate from microstrip line measurements and electromagnetic analysis. The proposed method avoids using optimization algorithms which normally require extensive computation time. The complex permittivity is extracted through only one full-wave simulation. The multipole Debye model was employed to fit the extracted complex permittivity. The parameters of the best-fitting model obtained through this procedure are considered as the final results, which also ensure physically consistent characteristics. Polyimide was selected to validate the methodology. The best-fitting model generated by the proposed method has shown excellent agreement to the polyimide data sheet values at 1 MHz. Moreover, simulations using the parameters of the best-fitting model exhibit good agreement with the experimental propagation constant data of microstrip lines up to 60 GHz. [ABSTRACT FROM AUTHOR]

This letter investigates the impact of static and dynamic stress on threshold voltage (Vth) instability in ultrathin n-channel metal-oxide-semiconductor field-effect transistors with hafnium-based gate stacks. Experimental results indicate Vth shift under dynamic stress is more serious than that under static stress due to charge trapping within the high-k dielectric. Capacitance-voltage techniques demonstrated that electron trapping under dynamic stress was located in the high-k dielectric near the source/drain overlap region rather than throughout the overall dielectric layer. This implies in real circuit operation, the phenomenon of electrons trapped in high-k near the source/drain overlap is the main issue affecting Vth instability. [ABSTRACT FROM AUTHOR]

Abstract: This letter investigates the reliability issues of HfO2/Ti1−xNx metal-oxide-semiconductor field effect transistor in terms of static and dynamic stress. The results indicate threshold voltage (V th ) instability under dynamic stress is more serious than that under static stress, owning to transient charge trapping within high-k dielectric. Capacitance–voltage techniques verified that electron trapping under dynamic stress was located in high-k dielectric near the source/drain (S/D) overlap region, rather than the overall dielectric. Furthermore, the V th shift clearly increases with an increase in dynamic stress operation frequency. This phenomenon can be attributed to the fact that electrons injecting to the S/D overlap region have insufficient time to de-trap from high-k dielectric. We further investigated the impact of different Ti1−xNx composition of metal-gate electrode on charge trapping characteristics, and observed that V th shift decreases significantly with an increase in the ratio of nitride. This is because the nitride atoms diffusing from the metal gate fill up oxygen vacancies and reduce the concentration of traps in high-k dielectric. [Copyright &y& Elsevier]