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Electron tracking based Compton imaging is a key technique to improve the sensitivity of Compton cameras by measuring the initial direction of recoiled electrons. To realize this technique in semiconductor Compton cameras, we propose a new detector concept, Si-CMOS hybrid detector. It is a Si detector bump-bonded to a CMOS readout integrated circuit to obtain electron trajectory images. To acquire the energy and the event timing, signals from N-side are also read out in this concept. By using an ASIC for the N-side readout, the timing resolution of few us is achieved. In this paper, we present the results of two prototypes with 20 um pitch pixels. The images of the recoiled electron trajectories are obtained with them successfully. The energy resolutions (FWHM) are 4.1 keV (CMOS) and 1.4 keV (N-side) at 59.5 keV. In addition, we confirmed that the initial direction of the electron is determined using the reconstruction algorithm based on the graph theory approach. These results show that Si-CMOS hybrid detectors can be used for electron tracking based Compton imaging., Comment: 5 pages, 8 figures, NDIP 2017 Proceedings, accepted to Nuc. Inst. Methods A

著者人数: 18名, Accepted: 2017-09-01, 資料番号: SA1170188000

The muon anomalous magnetic moment $(g-2)_{\mu}$ and electric dipole moment (EDM) are sensitive to new physics beyond the Standard Model. We aim to measure $(g-2)_{\mu}$ with a precision of 0.1 parts per million and search for EDM with a sensitivity of $10^{-21}~e \cdot$cm at J-PARC. In this experiment, we use a silicon strip detector with high granularity and fast response to detect positrons from muon decay. We report on the development status of the silicon strip detector.

エネルギー分散X線回折実験用に高エネルギーX線に対応可能なCdTe素子を用いたピクセル型検出器を開発した。

著者人数: 15名, Accepted: 2016-02-07, 資料番号: SA1150328000

著者人数: 17名, Accepted: 2016-01-21, 資料番号: SA1150327000

A high-intensity pulsed muon beam is becoming available at the at the Japan Proton Accelerator Research Complex (J-PARC). Many experiments to study fundamental physics using this high-intensity muon beam are proposed. An experiment to measure the muon magnetic moment anomaly ($g-2$) and the muon electric dipole moment (EDM) is one of these experiments and it requires a tracking detector for positrons from muon decay. Fine segmentation is required in a detector to tolerate the high rate of positrons. The time resolution is required to be much better than the muon anomalous spin precession period while a buffer depth of a front-end electronics needs to be much longer than the accelerated muon lifetime. Requirements of this detector also meet requirements of a measurement of the muonium hyperfine structure interval at the J-PARC and another experiment to measure the proton charge radius at Tohoku University. We have developed a single-sided silicon strip sensor with a 190 $\mu$m pitch, a front-end electronics with a sampling rate of 200 MHz and a buffer memory depth of 8192, and a data acquisition system based on DAQ-Middleware for the J-PARC muon $g-2$/EDM experiment. We have fabricated detector modules consisting of this sensor and the front-end electronics. Performance of fabricated detector modules was evaluated at a laboratory and a beam test using the positron beam at Tohoku University. The detector is confirmed to satisfy all requirements of the experiments except for the time walk, which will be solved by the next version of a front-end electronics., Comment: 18 pages, 17 figures

We are developing a micro satellite, Kanazawa-SAT 3 , to be launched in FY2019. The main purpose of the mission is to localize X-ray transients coincide with gravitational wave events, e.g. short gamma-ray bursts, and to investigate the formation of extreme space-time of black holes and the origin of relativistic jet. We are developing a wide field X-ray imaging detector as a mission instrument. It has a couple of 1-dimensional imaging systems with a random coded aperture mask and silicon strip detectors. In this paper, we introduce the mission overview and the current status of Kanazawa-SAT 3 and the flight model performance.

We present the development of a Superconducting Tunnel Junction detector using hafnium (Hf-STJ) as a far infrared single photon detector for COsmic BAckground Neutrino Decay search (COBAND) experiment. The photon energy spectrum from the decay of cosmic background neutrino is expected to have a sharp edge at the high energy end in a far-infrared region ranging from 14–25 meV in the cosmic infrared background and the overwhelming infrared foreground from the zodiacal emission. We are developing a Hf-STJ which is expected to have 2% energy resolution for a single photon of 25 meV. We have successfully produced a superconductor-insulator-superconductor structure using Hf. However, it is found to suffer from a large leakage current and needs modification of the Hf-STJ to reduce it. We have developed two new types of Hf-STJ: Hf-STJ with an Al layer and Hf-STJ with a new sputtering condition. The leakage current density of two new types of Hf-STJ becomes 16 times smaller than the old Hf-STJ and obtained a response to the visible light. Because of its large leakage current, further optimization is underway.

We report on the recent development of a 64-channel analog front-end ASIC for a new gamma-ray imaging system designed to visualize radioactive substances. The imaging system employs a novel Compton camera which consists of silicon (Si) and cadmium telluride (CdTe) detectors. The ASIC is intended for the readout of pixel/pad detectors utilizing Si/CdTe as detector materials, and covers a dynamic range up to 1.4 MeV. The readout chip consists of 64 identical signal channels and was implemented with X-FAB 0.35 μ m CMOS technology. Each channel contains a charge-sensitive amplifier, a pole-zero cancellation circuit, a low-pass filter, a comparator, and a sample-hold circuit, along with a Wilkinson-type A-to-D converter. We observed an equivalent noise charge of ~500 e− and a noise slope of ~5 e−/pF (r.m.s.) with a power consumption of 2.1 mW per channel. The chip works well when connected to Schottky CdTe diodes , and delivers spectra with good energy resolution, such as ~12 keV (FWHM) at 662 keV and ~24 keV (FWHM) at 1.33 MeV.

The muon anomalous magnetic moment $(g -2)_{\mu}$ and electric dipole moment (EDM) are sensitive to new physics beyond the Standard Model. We aim to measure $( g -2 ) _{\mu}$ with a precision of 0.1 parts per million and search for EDM with a sensitivity of 10-21e. cm at J-PARC. In this experiment, we use a silicon strip detector with high granularity and fast response to detect positrons from muon decay. The readout ASIC is required to tolerate a high hit rate of 1.4 MHz per strip, to be stable to the change of hit rate by a factor of 1 /150, and to have deep memory for the period of $\sim 40 \mu \mathrm{s}$ with 5 ns resolution. The prototype readout ASIC "SliT128A" has been fabricated using the Silterra $0.18- \mu \mathrm{m}$ CMOS process. We also connected the SliT128A with a silicon strip sensor and tested it with a muon beam at J-PARC. In this paper, we report the performance of the prototype ASIC itself and the prototype detector module.

We are planning to launch a micro satellite, Kanazawa-SAT3 , at the end of FY2018 to localize X-ray transients associated with gravitational wave sources. Now we are testing a prototype model of wide-field Xray imaging detector named T-LEX (Transient Localization EXperiment). T-LEX is an orthogonally distributed two sets of 1-dimensional silicon strip detectors with coded aperture masks, and covers more than 1 steradian field of view in the energy range of 1 – 20 keV. Each dimension has 512 readout electrodes (totally 1,024 channels), and they are read out with application specific integrated circuits (ASICs) controlled by two onboard FPGAs. Moreover, each FPGA calculates the cross correlation between the X-ray intensity and mask patterns every 64 msec, makes a histogram of lightcurves and energy spectra, and also plays a role of telemetry/command interface to mission CPU. In this paper, we report an overview of digital electronics system. Especially, we focus on the high-speed imaging processor on FPGA and demonstrate its performance as an X-ray imaging system.

High-quality CdTe semiconductor detectors with both fine position resolution and high energy resolution hold great promise to improve measurement in various hard X-ray and gamma-ray imaging fields. ISAS/JAXA has been developing CdTe imaging detectors to meet scientific demands in latest celestial observation and severe environmental limitation (power consumption, vibration, radiation) in space for over 15 years. The energy resolution of imaging detectors with a CdTe Schottky diode of In/CdTe/Pt or Al/CdTe/Pt contact is a highlight of our development. We can extremely reduce a leakage current of devises, meaning it allows us to supply higher bias voltage to collect charges. The 3.2cm-wide and 0.75mm-thick CdTe double-sided strip detector with a strip pitch of 250 µm has been successfully established and was mounted in the latest Japanese X-ray satellite. The energy resolution measured in the test on ground was 2.1 keV (FWHM) at 59.5 keV. The detector with much finer resolution of 60 µm is ready, and it was actually used in the FOXSI rocket mission to observe hard X-ray from the sun. In this talk, we will focus on our research activities to apply space sensor technologies to such various imaging fields as medical imaging. Recent development of CdTe detectors, imaging module with pinhole and coded-mask collimators, and experimental study of response to hard X-rays and gamma-rays are presented. The talk also includes research of the Compton camera which has a configuration of accumulated Si and CdTe imaging detectors.

We are planning a future gamma-ray burst (GRB) mission HiZ-GUNDAM to probe the early universe beyond the redshift of z > 7. Now we are developing a small prototype model of wide-field low-energy X-ray imaging detectors to observe high-z GRBs, which cover the energy range of 1 - 20 keV. In this paper, we report overview of its prototype system and performance, especially focusing on the characteristics and radiation tolerance of high gain analog ASIC specifically designed to read out small charge signals., 11 pages, 8 figures, SPIE Astronomical Telescopes + Instrumentation (2016)

Schottky CdTe diode detectors suffer from a polarization phenomenon, which is characterized by degradation of the spectral properties over time following exposure to high bias voltage. This is considered attributable to charge accumulation at deep acceptor levels. A Schottky CdTe diode was illuminated with an infrared light for a certain period during a bias operation, and two opposite behaviors emerged. The detector showed a recovery when illuminated after the bias-induced polarization had completely progressed. Conversely, when the detector was illuminated before the emergence of bias-induced polarization, the degradation of the spectral properties was accelerated. Interpretation of these effects and discussion on the energy level of deep acceptors are presented.

Accepted: 2011-03-06, 資料番号: SA1003247000

Accepted: 2010-07-25, 資料番号: SA1002699000

The pair monitor measures the beam profile at the interaction point of the international linear collider. It extracts the information from the directional distribution of a large number of electron-positron pairs created by collision of bunches. The pairs are detected by pixel detectors placed close to the beam on both sides of the interaction point, and a readout ASIC that meets the stringent requirements has been developed. In order to measure the beam profile as a function of location within a train, and also to deal with the high hit rate, the pixel detector is read out in 16 time slices per bunch train. In this paper, we describe the design of the readout circuit and present the result of performance tests.

Accepted: 2008-12-27, 資料番号: SA1000776000

This paper describes the recent development of a low-noise, two-dimensional analog front-end ASIC for hybrid pixel imaging detectors. Based on the Open-IP LSI project, the ASIC is designed to meet a low-noise requirement of better than 100 e - (rms) with self-triggering capability. The ASIC is intended for the readout of pixel sensors utilizing silicon (Si) and cadmium telluride (CdTe) as detector materials for spectroscopic imaging observations in the X-ray and gamma-ray regions. The readout chip consists of a 4 × 4 matrix of identical 270 μ m × 270 μ m pixel cells and was implemented with TSMC 0.35 - μ m CMOS technology. Each pixel cell contains a charge-sensitive amplifier, pole-zero cancellation circuit, shaper, comparator, and peak hold circuit. Preliminary testing of the ASIC achieved an 88 e - (rms) equivalent noise charge and a 25 e - / pF noise slope with power consumption of 150 μ W per pixel.

For the upgrade of the Belle detector at the KEKB collider, we are developing a proximity focusing ring imaging Cherenkov detector using aerogel as a radiator. A 144 channel HAPD (Hybrid Avalanche Photo-Detector) is one of the candidate photo-detectors. We report on the performance of a recently delivered HAPD. We also discuss results of tests of a read-out ASIC which is being developed for the readout of the HAPD. Both the HAPD and the ASIC show good performance for detection of single photons.

We developed an eight-channel low-noise analog front-end application specific integrated circuit (ASIC), designated "KW01", for solid-state radiation detectors. Each channel consists of a charge-sensitive amplifier, band-pass filters, a comparator, and a sample-and-hold circuit. To evaluate its noise performance, we designed a front-end carrier board for mounting the ASIC. By injecting test pulses, we confirmed that the equivalent noise level reaches 110±1.0 e- (rms) at -20 °C. The ASIC was also combined with a Schottky CdTe diode detector for spectral evaluation. As a result, a gamma-ray spectrum of the radioactive source 241Am was obtained with good energy resolutions of 2.43 keV (FWHM) for 59.5 keV gamma rays and 2.26 keV (FWHM) for 17.5 keV gamma rays at -20 °C.

Accepted: 2007-10-05, 資料番号: SA1000684000

Accepted: 2007-03-01, 資料番号: SA1000174000

The Fine Pixel CCD (FPCCD) is one of the candidate vertex detectors for the ILC. We performed neutron irradiation test of the FPCCD with CYRIC proton beam line at Tohoku University. After the irradiation of 19-year neutron fluence at the 500 GeV high luminosity ILC, the performance of the FPCCD was tested. The dark current increased but was still three order of magnitude smaller than signal charge. The fraction of hot pixels increased to 1.2 × 10−5 which is enough small for operation. Charge transfer inefficiencies for horizontal and vertical directions were measured to be 3.49 × 10−5 and 6.34 × 10−5, respectively. Even for the farthest pixel from a readout channel, 63% of signal remains after the transfer. We conclude that neutron fluence at the 500 GeV high luminosity ILC is not a problem for the FPCCD.

The muon anomalous magnetic moment (g-2) and the muon electric dipole moment (EDM) are the fundamental quantities in particle physics. The previous measurement in BNL (E821) achieved an accuracy of 0.54 ppm for g-2, and there is 3.3σ discrepancy between experimental value and the Standard Model prediction. And the present muon EDM limit is 1.8×10 e・cm. So we plan a new muon g-2/EDM measurement at J-PARC to measure the muon g-2 with the precision a 0.1 ppm and EDM with the sensitivity of 10 e・cm. In this experiment, we accelerate muon to 300 MeV/c, storage in the 3 T precision magnetic fields and reconstruct a track of muon decay positron by highly-segmented tracking detector. We use silicon strip sensors for the tracker because the tracker requires high rate capability, high stability against a large rate change, stable operation in a high magnetic field, and high position resolution. We optimized sensor specification and estimated the requirement of accuracy of the alignment by using the simulation. Based on the specifications, we produced two types of new test sensors. We evaluated the performance of test sensor, and estimated signal to noise ratio. We will present results of specification, estimation of the requirements for the sensor alignment, and test sensors evaluation. References [1] G.W. Bennett et al., Phys. Rev. D 73, 072003 (2006). [2] N. Saito et al., AIP Conf. Proc. 73 (2012) 45 z

The BELLE detector for experiments at KEKB, a high luminosity, energy asymmetric B-factory, is now being constructed at KEK. An overview of the detector systems and their status is presented.

The pair monitor extracts information on the beam profile at the interaction point of the International Linear Collider. It utilizes the electron and positron number density distribution in the plane perpendicular to the beam direction. The pairs of electrons and positrons are detected by pixel detectors placed close to the beam on both sides of the interaction point, and a readout ASIC that meets the stringent requirements has been developed. In order to measure the beam profile as a function of location within a train and to deal with the high hit rate, the pixel detector is read out in 16 time-slices per bunch train. We develop the prototype ASIC using a 0.2 μ m fully depleted SOI (FD-SOI) CMOS process (OKI Semiconductor Co., Ltd). In this paper, we describe the design of the readout circuit and present the results of the performance tests.

著者人数：20名, 資料番号: SA1000871000

著者人数：33名, 資料番号: SA1001500000

A very compact solar neutron detector is made by using scintillation fiber and multi-anode photomultipliers. Signals from the 512 channels of the photomultipliers are read-out by CMOS circuitry which has been developed for a KEK B-factory experiment. The circuitry consumes only 5 W of power. The energy resolution for protons is obtained by exposing the detector to the RIKEN accelerator beam and it turns out to be 4.1% for protons at 95 MeV. The sensor will be used for observations on solar neutrons to elucidate the ion acceleration mechanism at the solar surface and also to provide information on-line to the cosmonauts about the impending arrival of strong radiations from the Sun.

We explored wide-pitch ohmic-side structures for the BELLE SVD, where we proposed a field-plate structure combined with narrow p-barriers in between the readout electrodes of 90, 113, 180, and 226 μm-pitch detectors. The effect of the p-barriers was studied with a numerical model to trace the carrier trajectories. The charge collection and sharing properties were examined in practice for prototype small-size detectors with an IR pulse shining from either the junction side or the ohmic side. The channel separation capabilities were also shown to be appropriate under nominal operation conditions.

A strip-like two-dimensional readout single-sided detector using pMOS pixels is being developed at KEK, as part of the R&D for the BELLE experiment. It may be used in upgrades of the vertex detector. The pMOS pixel is composed of a double drain pMOS transistor, providing direct amplification on site, implanted in the n-well collecting electrode of the detecting silicon pin diode. We first briefly review the concept and principle of the pMOS pixel detector, before presenting simulation and test performed on the prototypes with a beam of minimum ionizing particles.

A semi-empirical model for an ONO-stacked insulator film is presented together with its implications. The model covers ONO, ON, and NO films as well as single-layered SiO 2 and Si 3 N 4 . We eventually present an assessment for estimating the lifetime of an ONO-stacked insulator film for a given configuration.

A new measurement of the anomalous magnetic moment (g-2) and electric dipole moment (EDM) of the positive muon at J-PARC is proposed, which measures the g-2 with the precision of 0.1 ppm and the EDM with sensitivity down to the order of 10−21 e·cm. We proposed to use a highly-segmented positron tracker in this experiment. From the simulation study, we chose a radial vane silicon strip detector as the tracker and have promoted the R&D. Then, the development of readout frontend ASIC is indispensible to achieve the detector goal performance. The ASIC requires good tracking efficiency due to the high hit rate of 1.6 MHz per strip, deep memory due to 5 muon life time (∼40 µs) measurement, and high integration due to the large number of channels to the small space. We have developed the prototype ASIC with UMC 0.25µm CMOS technologies and evaluated that. In this paper, we report the design of the fast readout ASIC for the silicon-strip detector in the J-PARC muon g-2/EDM experiment and the performance of the prototype ASIC.

The radiation tolerance for prototype front-end chips designed for a silicon micro-strip detector was examined with a 60 Co irradiation source to establish an allowable range of the radiation dose. The irradiated front-end chips were SMA 2 SH-64A, a 64-channel preamplifier array; SMA 2 SH-1, a single-channel preamplifier circuit with a comparator; and Control-C, a digital-control chip for the preamplifiers.

The wider pitch readout operation of a 50 μm-pitch double-sided silicon micro-strip detector has been studied specifically concerning its ohmic side. Every second readout and ganged configuration was examined by employing a newly developed 64-channel preamplifier array. The observed charge responses for collimated IR light were compared with a numerical model.

A pMOS pixel to be used in a striplike two-dimensional readout single-sided detector has been developed and tested. It is originally proposed for upgrades of the vertex detector of the BELLE experiment at the KEK B-factory: in order to overcome low signal-to-noise ratio of the double-sided silicon strip detector to be used presently. This device gathers the pMOS transistor amplification with the typical silicon pin diode used in particle detection. In a 100/spl times/100 /spl mu/m/sup 2/ n-type collecting electrode a double drain pMOS transistor is implanted, providing (1) a two-dimensional readout and (2) direct signal amplification. With the subdivision in pixels, which lowers the detector capacitance, a high signal-to-noise ratio is expected. The two-dimensional readout and the low noise advantages of this structure can be used for detection of any electromagnetic radiation as well as high energy charged particles. Nuclear physics, space and astrophysics instrumentation, are also potential field of application for the pMOS pixel. We briefly review here the principle of the structure and describe the test of the prototypes in detail.

A study of the ohmic-side structure of a strip-type semiconductor detector is presented in terms of the capacitance matrix configuration and the signal-partitioning characteristics, which give a comprehensive picture of both narrow- and wide-pitch detectors with either a large or a small width-to-pitch ratio of the strip configuration.

We are designing a silicon vertex detector to be installed in a detector for the KEK Asymmetric B-factory project. In order to fulfill the accuracy required for the vertex resolution from the physics motivation we made several studies about the various aspects of the construction technology as well as the studies, is presented. The validity and performance of the design are also discussed through which was derived from the above studies, is presented. The validity and performance of the design are also discussed through results of a study of the detector simulation which incorporated a capacitive network model for the distribution of collected charge.

We are developing the data-acquisition system of a silicon micro-vertex detector (SMVD) for the KEK B-factory. This data-acquisition system for the SMVD comprises detector modules, data scanners, and an event builder. We have developed several specially designed analog and digital VLSIs for the SMVD data-acquisition system. In this paper, we describe the system configuration together with the functions of the VLSIs.

Design studies on a front-end CMOS amplifier for a silicon strip detector of the KEK B-factory experiment were described in terms of circuit characterization, prototype fabrication and its evaluation. Based on the evaluation of the prototype work, we discussed on expected performance and architectural concepts of the read-out system for the B-factory silicon strip detector system.

We describe a prototype data acquisition system for a silicon strip detector, which has been developed in terms of a digital readout scheme. The system consists of a master timing generator, readout controller, and a detector emulator card on which we use custom VLSI shift registers with operating clock frequency of 30 MHz.

We have developed a prototype Cadmium Telluride pixel detector (SP8–01) to study its performance for high energy X-ray application requirement. The pixel format is 16 × 16 with the pitch of 200 μm × 200 μm. The sensor thickness is 500μm and the readout ASIC contains a charge sensitive amplifier, a shaper, upper and lower discriminators and a 20 bit counter in one cell. The SP8–01 detector achieved a required wide energy dynamic range from 15 to 120 keV with an Al Schottky sensor.

For the Belle-II detector, we are conducting R&D on proximity focusing ring imaging Cherenkov (RICH) detector using a silica aerogel as a radiator. A 144-channel HAPD (Hybrid Avalanche Photo Detector) is adopted as a photo-detector for the Aerogel-RICH. Because the typical gain of HAPDs is lower than conventional photomultipliers, we need high-gain and low-noise electronics for readout of the HAPD. In addition, the electronics system should be sufficiently compact. For these reasons, we have designed and fabricated readout chips for the HAPD signal processing, based on ASIC (Application Specific Integrated Circuit) technique. We performed a test beam experiment of a prototype Aerogel RICH counter. In this test, it is found that Cherenkov rings are well reconstructed with the developed electronics system, and the ASIC shows excellent performance to be used for the aerogel RICH system. A present concern is a neutron tolerance of HAPDs. We have been studying how much possible radiation damage caused by neutrons can be reduced by optimizing the ASIC parameters without decreasing sensitivity for Cherenkov photons. It has been found that the radiation damage by neutrons considered in the Belle-II can be cured by shortening the shaping time of the amplifier in the ASIC. In this paper, we will report the performance of the ASIC chips that were used in the beam test and new version that is under development will be also explained.

We have developed a prototype cadmium telluride (CdTe) pixel detector for future use in focusing hard X-ray telescopes. We adopted a hybrid configuration where each CdTe sensor pixel is vertically connected to a corresponding pixel cell fabricated in a readout ASIC. This configuration is suitable for detectors with high pixel density to reduce a stray capacitance between readout signal lines. The readout chip consists of a 12 × 12 matrix of identical 270 μm χ 270 μm pixel cells, and was implemented with TSMC 0.35-μm CMOS technology. Each pixel cell contains a charge-sensitive amplifier, pole-zero cancellation circuit, low-pass filter, comparator, and peak/bottom-hold circuit. We succeeded to obtain detector signals from all the 144 channels, showing a equivalent noise charge distribution of 66±4 e (rms). The linearity is maintained within ±1 % up to 3.5 fC, which corresponds to ~ 100 keV for CdTe. The detector exhibits good spectral performance with 870 eV (FWHM) at 59.5 keV. The power consumption is 150 μW per pixel, and 48 mW in total.

We report on the recent development of a low-noise analog front-end ASIC for hard X-ray and gamma-ray detectors. The ASIC aims for the readout of strip detectors utilizing silicon and cadmium telluride (CdTe) as detector materials. Each readout channel includes a charge-sensitive amplifier, band-pass filters and sample-and-hold circuit. It also includes a leakage current compensation circuit to accommodate to the variety of solid-state detectors. The equivalent noise level of a typical channel reached 88 e− + 8.1 e−/pF (rms) for a power consumption of 3 mW per channel. We also evaluated the ASIC performances by combining with a CdTe line sensor.

Monolithic amplifier circuits have been designed for a head amplifier of the silicon strip detector for the SSC. Experimental chips, including preamplifiers and/or shaping amplifiers were fabricated for practical evaluation. The basic properties of these amplifier chips were examined in terms of pulse response and noise characteristics.

We have been developing cryogenic readout integrated circuits (ROICs) for sensitive detectors at far-infrared and submillimeter wavelengths: The ROICs are constructed from SONY GaAs-JFETs, which have excellent performance even at less than 1 K. In addition, it is suitable device for ultra low background applications because of the extremely low gate leakage current. In the spring of 2008, we have designed and fabricated 4-ch AC-coupled capacitive transimpedance amplifiers and several basic digital circuits giving multiplex function for 32-element SIS photon detector array. The expected performance of the amplifier is as follows; open loop gain of >2000, power consumption

Developments on large format array of superconducting tunnel junction detectors are discussed and recent activities in readout electronics developments and focal plane optics designs are presented. We have been working on submillimeter-wave SIS photon detectors at 650 GHz using niobium tunnel junctions, which have high sensitivity, large dynamic range and fast response. Here we discuss on an implementation plan of large format array with cryogenic readout electronics and compact focal plane optics design. GaAs-JFETs operate at less than 1 K with low noise, low power dissipation and fast response. We have demonstrated operation of cryogenic integrating amplifiers and digital electronics for SIS photon detectors with multiplexed readout. Combined with compact focal plane optics, we now have a conceptual design of large format array of SIS photon detectors in submillimeter-wave. Further development to realize higher sensitivity superconducting tunnel junction detectors with extremely low leakage current are foreseen.