1. A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer.
- Author
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Kang, Dongsuk, Park, Jae-Woo, Park, Injae, Park, Min-Su, Jin, Xuefan, Hwang, Kyu-Dong, Kwon, Dae-Han, and Chun, Jung-Hoon
- Subjects
ERROR rates ,CLOCKS & watches ,TIME-frequency analysis ,TRANSMITTERS (Communication) - Abstract
In this article, we propose a duobinary transceiver for graphics double-data-rate (GDDR) memory interfaces. The proposed voltage-mode driver complies with the GDDR impedance specifications without sacrificing the ratio of level mismatch (RLM). The quarter-rate time-interleaved successive approximation duobinary receiver (Rx) reduces the forwarded clock frequency and minimizes the capacitive loading of the front-end analog equalizer (EQ). To compensate for the channel loss, the transmitter is composed of a three-tap feed-forward EQ, and the Rx employs a continuous-time linear EQ. Also, an EQ adaptation scheme applicable to duobinary signaling is proposed. The transceiver achieves a 10−12 bit error rate at 21 Gb/s with 1.42 mW/Gb. [ABSTRACT FROM AUTHOR]
- Published
- 2022
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