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This paper proposes a new probabilistic amplitude shaping (PAS) approach for concatenated two-level multi-level coding (MLC). The proposed system is based on a concatenated forward error correction (FEC) scheme where outer codes are serially concatenated with inner two-level MLC. This concatenated two-level MLC scheme has recently been shown to have a potential for achieving better performance-complexity trade-offs than the conventional bit-interleaved coded modulation (BICM). Meanwhile, PAS has recently been demonstrated to offer remarkable performance gains as well as rate adaptivity. However, the majority of existing works on PAS assume the use of the binary reflected Gray code as a bit-labeling, and its application to coded modulation schemes with other bit-labelings, such as two-level MLC, may not be straightforward. In this paper, we devise a bit-labeling scheme and propose a new PAS structure for an efficient integration of PAS with two-level MLC systems. More specifically, we propose to generate signed amplitude symbols with the distribution matcher (DM) for maximizing both coding and shaping gains achieved by two-level MLC and PAS, respectively, while the conventional PAS generates unsigned amplitude symbols. It is demonstrated by simulation results that, with 256QAM and inner polar codes, the proposed two-level MLC with PAS simultaneously offers 75% reduction in the number of required inner encoding and soft-decision (SD) decoding operations for given outer and inner FEC code lengths, and up to 0.3 dB performance gain over the conventional PAS scheme.

The perturbation-based nonlinearity compensation (NLC) method is considered in conjunction with a forward error correction (FEC) code that is capable of detecting block errors. The FEC decoding is performed prior to the NLC, and NLC is then performed only for blocks, that could not be decoded correctly. The total NLC complexity is thus dramatically reduced to down to 1% in some cases w.r.t. the standard, hard decision-directed NLC performed prior to the FEC decoding. Negligible FEC decoding complexity increase is required for the subsequent decoding of the nonlinearity-compensated blocks. The proposed method achieves and sometimes outperforms the standard perturbation based NLC at a fraction of the overall complexity. Polar codes are used to exemplify the method.

We experimentally demonstrate a rate-adaptive concatenated forward error correction (FEC) scheme to minimize the information rate loss due to varying channel conditions. The concatenated coding scheme is based on inner soft-decision polar code and outer hard-decision staircase code. An experiment in a wavelength-division multiplexed (WDM) system with different SNR per WDM channel is performed by employing concatenated codes with various coded modulation schemes over a target distance of 140km which is relevant for extending the reach of data center interconnects. Experimental results show that the achieved data rate of the WDM system can be improved up to 37.6% with the proposed coding scheme w.r.t. the fixed code rate ZR FEC.

In this paper, we consider fast decoding of soft-decision (SD) Hamming codes as inner codes in concatenated forward error-correction (FEC) schemes for high-speed optical communication. The goal is single FPGA implementations at speeds of 400 Gb/s and beyond. A low complexity maximum a posteriori (MAP) probability decoding is applied to a (128,120) Hamming code. Chase decoding of a (128,119) Hamming code is also implemented. The VHDL designs for both decoding schemes are presented. The FEC performance and FPGA resource utilization are investigated and compared. Synthesis results indicate that, both the Chase and the MAP decoder leave sufficient resources available to also accommodate a powerful outer hard decision code, on a single FPGA. Furthermore, MAP decoding of (128,120) Hamming code features lower hardware complexity and provides a higher data throughput.

In this work, a multilevel coding (MLC) based coded modulation scheme with two degrees of freedom in rate flexibility is proposed and compared with a bit-interleaved coded modulation (BICM) scheme from a performance versus complexity perspective. The proposed MLC scheme is based on a rate flexible inner soft-decision polar code and utilizes an outer hard-decision staircase code structure as in the 400ZR concatenated forward error-correcting code. The performance of the MLC scheme is investigated for a range of inner code lengths, inner decoder list sizes, and signaling with 16 and 64 quadrature amplitude modulation, respectively. The MLC is designed such that a portion of the staircase encoded bits can bypass the inner code. The number of required inner soft-decision decoders can thus be reduced, thereby saving computational complexity. The proposed MLC scheme simultaneously offers up to a 53.7% reduction in the number of inner decoders and up to 0.55 dB of performance improvement when compared with the similar BICM approach.