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This study, to the best of authors’ knowledge, is the first to investigate the feasibility of using picosecond UV laser ablation to fabricate ultrasmall microvias scaled down to 3 $\mu \text{m}$ and less with a pitch of 8 $\mu \text{m}$ in a 5- $\mu \text{m}$ Ajinomoto buildup film (ABF). The state-of-the-art microvias are 20 $\mu \text{m}$ in diameter by a nanosecond UV laser and 5 $\mu \text{m}$ in diameter by a picosecond UV laser reported in our previous study, but microvias of less than 2 $\mu \text{m}$ in diameter are needed to meet IO density requirements for today and future’s high-bandwidth packaging and heterogeneous system integration. In this study, we have investigated the impact of laser power, beam sizes, and materials on the via size and explored the feasibility of picosecond UV laser ablation for ultrasmall microvias with an additional layer of 80-nm-thick copper on top of the dielectric as a barrier layer. The power used to fabricate the 5- $\mu \text{m}$ microvias in a 5- $\mu \text{m}$ -thick ABF could open 2- $\mu \text{m}$ holes in the copper barrier layer due to the higher ablation threshold of copper. The drilled copper layer then serves as a mask to produce smaller microvias in the dielectric layer beneath the copper. In this article, fully opened microvias of 3 $\mu \text{m}$ diameter in ABF will be demonstrated. Submicrometer openings in copper are also achieved, which suggests the feasibility to scale down via diameter to submicrometer level. [ABSTRACT FROM AUTHOR]

This article presents for the first time microvias scaled down to sub- $5~\mu \text{m}$ in diameter fabricated using picosecond UV laser ablation in a nonphotoimageable dielectric film. The motivation of this article is to address post-Moore and More-than-Moore packaging interconnect needs. Microvias play a critical role in package interconnections in IO density and the IC bump pitch for 2.5-D interposers and fan-out packages. UV laser ablation has been the key technology for fabricating small microvias in high density interconnect (HDI) packaging for more than two decades. The state-of-the-art microvia fabricated by UV laser ablation is still at $20~\mu \text{m}$ in diameter and 50 $\mu \text{m}$ in pitch. This article explores the feasibility of fabricating microvias of $5~\mu \text{m}$ or less in diameter with a commercially available picosecond UV laser system. The experimental results show that microvias of $5~\mu \text{m}$ or less in diameter in a 5- $\mu \text{m}$ -thick Ajinomoto buildup dielectric film (ABF) are achieved. This article also addresses the fundamentals of picosecond pulsed laser ablation on polymer dielectric materials and processes optimization to generate sub-5- $\mu \text{m}$ microvias. The via pitch of 8– $12~\mu \text{m}$ is demonstrated. UV laser ablation also addresses the issue of limited availability of photosensitive dielectric materials for photolithography-based microvia fabrication. [ABSTRACT FROM AUTHOR]

This paper presents a novel organic embedded trace damascene redistribution layer (RDL) process for panel-scale 2.5-D interposers and high-density fan-out package (HDFO) substrates. A minimum feature size of 1.5- \mu \textm line and space using ultrathin polymer dielectrics on glass, silicon, and as well as on organic laminate was demonstrated. This is the first demonstration of a complete set of materials and processes that can be applied to large glass or organic panels, to bridge the interconnect gap between current semiadditive process (SAP) RDL and wafer back-end-of-line (BEOL) RDL. The ultra-fine pitch multilayer RDL structures demonstrated in this paper achieve an optimum balance of high IO density, high electrical performance, and low process costs. IO density in terms of IOs per mm per layer, as defined by Intel, refers to the number of traces routed per millimeter of die edge on one RDL layer of an interposer or package substrate. The current SAP technology can achieve an IO density of about 40 IOs/mm/layer on 510 mm $\times \,\, 510$ mm organic laminate panels. The challenges of fabricating copper metal traces below 5 20~\mu \text{m} or less; 3) high AR of routing traces in the range of 2–4; 4) precise RDL linewidth control; 5) double-sided process with glass core; and 6) reduced number of process steps and panel-scalability leading to lower fabrication costs. [ABSTRACT FROM PUBLISHER]

Package-integrated and ultra-thin low-pass filter (LPF) and bandpass filter (BPF) with footprint smaller than $0.5\lambda _{0}\times 0.5\lambda _{0}\times 0.025\lambda _{0}$ at the operating frequencies of 28- and 39-GHz bands are presented for 5G and mm-wave small-cell application. Such package integration of 5G filters with ultrashort 3-D interconnects allows for low interconnect losses that are similar to that of on-chip filters, but low component insertion loss of off-chip discrete filters. These thin-film filters exhibit a cross-sectional height of $188.5~\mu \text{m}$ and can be utilized either as embedded components or integrated passive devices in module packages. Three topologies of LPF and BPF in total are modeled, designed, and fabricated on precision thin-film buildup layers on glass substrate as a core. Large-area panel-compatible semiadditive patterning (SAP) process is utilized to form high-precision topologies to aid the low-cost fabrication of ultraminiaturized filters. SAP also enables the realization of ultra-thin traces to precisely model high-impedance inductive lines compared to conventional subtractive etching and printing techniques. This results in filters with low insertion loss, low VSWR, and high selectivity. The simulated and measured results of filters show an excellent correlation. [ABSTRACT FROM AUTHOR]

This paper presents the latest advances in extending semiadditive process (SAP) methods to 2–5 \mu \textm lines and spaces, achieved using dry film photoresists on thin glass substrates, toward meeting the routing requirements for 20- \mu \textm bump pitch interposers. High-density chip-to-chip interconnections on 2.5-D interposers are a key enabler to meet the high logic to memory bandwidth needs of next-generation electronic systems. Such 2.5-D interposers require ultrafine redistribution layer (RDL) traces with line widths and spacing below 5~\mu \textm . This paper reports on the extension of panel scale and lower cost SAPs to achieve less than 5~\mu \textm lines and spaces, based on the ultrasmooth surface and improved dimensional stability of thin glass panels. A modified low-cost SAP method with newly developed differential seed layer etching was employed to fabricate the fine line and space patterns and coplanar waveguide (CPW) transmission on thin glass panels. Fine lines down to 2- \mu \textm lines and spaces and CPW lines with signal lengths up to 5 mm and ground-to-signal gaps down to 5.5~\mu \textm at 15- \mu \textm signal widths were successfully fabricated on ultra-thin glass panels. For comparison, the same processes were also applied to a silicon wafer. The signal insertion losses of CPW lines on the glass were 0.024 dB/mm better at 15 GHz than those on the silicon, as confirmed by simulations as well as VNA measurements. The measured insertion loss of 5-mm long CPW lines on glass interposer was 0.7 dB at 10 GHz and matched well to the simulated values. [ABSTRACT FROM PUBLISHER]