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Conventionally, single phase shift control technique is used, for dual active bridge (DAB) which works efficiently at unity voltage conversion ratio and full load. However, when there is mismatch between primary voltage and reflected secondary voltage on primary side at light load, its efficiency reduces because of increased current stress and circulating power. Moreover, due to single control variable, its power flow controllability is confined. In this paper, isolated bi-directional T-type multilevel dual active bridge dc-dc converter topology is presented. It has five level voltages on both the primary and secondary side of high frequency transformer, which reduces the current stress and circulating power over wide operating range. It also has five control variables which gives extra edge for enhancing power flow controllability. Comparative analysis reveals that the proposed converter has high efficiency over wide operating range, due to reduced circulating power and current stress. Performance of the proposed T- type multilevel dual active bridge DC-DC converter topology has been verified via simulation in MATLAB.

This article proposes an enhanced single-phase self-tuning pre-filter for estimating the fundamental grid voltage frequency. The known extended self-tuning filter (STF) adheres to an increased structural complexity, which may consume memory in the digital hardware to estimate the fundamental grid voltage signal. The proposed STF, which relies on a simple non-adaptive comb filter, may address this issue. Consequently, the introduction of imaginary zeros ensures better rejection of the DC-offset and the harmonic components while keeping the proposed filter structure simpler to implement. Furthermore, a simple open-loop frequency estimator is proposed, which does not involve any inverse trigonometric function to estimate the fundamental frequency. This entire proposal is cost-effective and has good frequency tracking abilities with a reduced computational load. The experimental results imply the suitability of the proposed scheme for weak inertia power grid networks where synthetic inertia controllers require a rapid frequency information to control the injected power under adverse grid voltage conditions.

A review of the bidirectional DC-DC converter (BDC) based on control methodology and switching techniques is presented. Each converters control scheme benefit is highlighted, and a summary of it is presented. Some of the control techniques are applied to BDC like as proportional-integral-derivative (PID), model predictive (MPC), fuzzy logic control (FLC), digital control system (DCS), sliding mode control (SMC), etc. Performance of the converter was improved by using switching techniques like single-phase-shift (SPS), dual-phase-shift (DPS), triple-phase-shift (TPS) etc.

Multilevel inverters (MLI) gained much importance in recent times for their better harmonic profile and low switching stress. But, the major concern with MLI is the requirement of more number of power semiconductor devices. The reduced switch topologies diminished the redundancies and so the chances of occurring fault increased, drastically the system reliability gets affected. Therefore, in this work, a fault tolerant optimum switch count MLI is proposed. It operates in normal mode to realize a five-level output and when an open circuit fault in bidirectional switch of the inverter, the output voltage levels reduce to three levels but maintains the peak output voltage and power. In any single quadrant switch if an open circuit fault occurs, then the output voltage level and magnitude get reduced. The proposed five-level inverter is simulated in the MATLAB/SIMULINK platform and the results are shown for distinct fault conditions to confirm the efficacy of the proposed inverter. The cascading of modules makes a generalized structure of the proposed topology.

Solid State Transformer (SST) is the main focus of research in recent years. Bidirectional Isolated Dual Active Bridge is an important component in SST. When conventional control scheme such as Single Phase Shift (SPS) is used it reduces the system efficiency due to circulating power and has high dv/dt across switches. It has only one degree of freedom which confine its ability to regulate power flow. In this paper, 5-level Dual Active Bridge is proposed with three degree of freedom which improves its ability to regulate power flow. Moreover due to increase in voltage levels, dv/dt across switches reduces significantly and it also reduces the circulating power which improved the efficiency of system. Performance of the proposed topology has been varified in MATLAB.

Common mode voltage (CMV) generation is a major problem in switching power converter fed induction motor drive systems. CMV is the zero sequence voltage generated due to the switching action of power converters. Even a small magnitude of CMV with a high rate of change may circulate large bearing currents which may damage a machine’s bearings and shorten its life. There are several methods of controlling CMV. This paper presents 3-level sinusoidal pulse width modulation based techniques to control the magnitude and rate of change of CMV in multilevel AC-DC-AC drive systems. Simulation and experimental investigations have been presented to validate the performance of proposed technique to control CMV in 3-level neutral point clamped inverter based AC-DC-AC system.

This paper presents the design and implementation of a simple neutral point potential (NPP) regulator for a three-level diode-clamped inverter employing a sine-triangle regulator in conjunction with a closed-loop controller with reduced switching losses. The regulator principle is based on adding a continuous variable offset voltage which regulates the midpoint potential of the dc bus. The novelty of the proposed NPP regulator is in the determination of the magnitude of variable offset voltage based upon the average value, peak-to-peak amplitude, total harmonic distortions, and third harmonic content in NPP. Aside from maintaining dc-bus voltage balance, the proposed regulator leads to a significant reduction in the voltage distortion at the NP, resulting in the reduction of the required dc-bus capacitance. It also reduces the switching losses of the inverter by inserting the “no-switching” zone within each half cycle of the fundamental voltage wave. Analytical, computer simulation, and experimental results verifying the approach are presented in this paper for various load power factor angles.

This paper proposes a simple control technique of Unified Power Quality Conditioner with Distributed Generation (UPQC DG ) for grid integration of solar photovoltaic (PV) system. In proposed technique shunt Active Power Filter (APF) of UPQC DG is controlled using Synchronous Reference Frame (SRF) theory and series APF is controlled using Unit Vector Template Generation (UVTG) method. Proposed control technique utilizes only one PI controller and incorporates directly measured PV array current without estimating power generated by PV array. Performance of proposed system is validated in the presence of non-linear load. System performance is also studied during grid disturbances such as voltage sag, change in load and solar irradiation variation. Simulation carried out in MATLAB/Simulink validates system performance.

The use of power electronics converters influencing the generation of harmonics and reactive power flow in a power system. Therefore, three-phase improved power quality AC-DC converters are gaining lot of popularity in power conversion applications. This paper deals with the control of three-phase neutral point clamped (NPC) 3-level AC-DC converter under balanced and unbalanced load condition. A unity power factor controller (UPC) is designed and developed for unity power factor operation of the converter under steady state and transient conditions. Further, the UPC is validated through experimentation performed on prototype developed in the laboratory.

Shunt active power filter (SAPF) is used to mitigate the current harmonics and to improve the power factor. In this paper, Adaptive linear-neuron (ADALINE) based phase lock loop (PLL) controlling scheme is presented for SAPF. ADALINE networks estimate the fundamental supply frequency. This scheme detects the phase information of the supply voltage and also used for parallel computing as it provides faster convergence. This algorithm is trained by least-mean squares (LMS) rule which offers low computational burden on the system. In this work, ADALINE is tuned using particle swarm optimization (PSO) technique to improve the dynamic performance of the system. The results obtained are compared with conventional PLL control technique and are found to be significantly better. The performance of the proposed ADALINE based control algorithm is validated using MATLAB/Simulink.

This paper presents simulation studies on different control techniques of 3- and 5- level diode clamped multilevel inverters i.e. sinusoidal PWM, selective harmonic elimination, and optimized harmonic PWM techniques. Paper contributes towards the detailed simulation and analysis of these techniques which has not been given in previous work. The performance of each technique has been investigated based upon reduction in total harmonic distortion. For simulation, Matlab/Power System Blockset/PowerGUI has been used.

Three-level diode clamped inverter is a proven technology nowadays in medium and high power applications. Despite of its several advantages such as harmonic reduction and achieving high voltage and high power capabilities without series and parallel connections of switching devices, neutral point potential (NPP) variation is the inherent problem with this topology. This paper presents a simple NPP regulator based on addition of offset voltage to the reference sinusoidal voltages. This not only regulates the NPP, but also reduces the output voltage and current harmonics of the inverter. Simultaneously, second harmonic get reduced which may otherwise produce torque pulsations, harmonic currents and power losses. Simulation and experimental results have been presented to validate the concept.

Multilevel inverters are used to reduce the harmonics and to achieve high-voltage, high-power capability but switching losses are increased because of increased device count. Switching losses can be reduced by either soft switching techniques or by modifying modulation technique employing space vector-based PWM techniques or sinusoidal PWM-based techniques. In this study, a carrier-based closed-loop control technique has been developed to reduce the switching losses based on insertion of `no switching` zone within each half cycle of fundamental wave. It effectively reduces the switching losses of three-level inverter without need of any complex mathematical expressions as involved in space vector-based techniques. An improvement of about 5` in efficiency for a switching frequency of 5`kHz is observed with proposed technique over conventional SPWM technique based on efficiency improvement factor (EIF). Simulation and experimental results are presented to validate the proposed technique.