1. Architectural Optimization of Parallel Authenticated Encryption Algorithm for Satellite Application
- Author
-
Abid Murtaza, Liu Jianwei, Tongge Xu, and Syed Jahanzeb Hussain Pirzada
- Subjects
Authenticated encryption ,General Computer Science ,Initialization vector ,Computer science ,Parallel algorithm ,02 engineering and technology ,nonce misuse attack ,010402 general chemistry ,Encryption ,01 natural sciences ,satellite communication ,side-channel attack ,0202 electrical engineering, electronic engineering, information engineering ,General Materials Science ,Side channel attack ,Hardware_ARITHMETICANDLOGICSTRUCTURES ,Field-programmable gate array ,FPGA ,Galois/Counter Mode ,business.industry ,General Engineering ,020202 computer hardware & architecture ,0104 chemical sciences ,parallel architecture ,lcsh:Electrical engineering. Electronics. Nuclear engineering ,business ,Algorithm ,lcsh:TK1-9971 ,Cryptographic nonce - Abstract
High-speed data communication is becoming essential for many applications, including satellite communication. The security algorithms associated with the communication of information are also required to have high-speed for coping up with the communication speed. Moreover, the Authenticated Encryption (AE) algorithms provide high-speed communication and security services include data encryption, authentication, and integrity. The AE algorithms are available with serial and parallel architectures; among them, the Galois Counter Mode (GCM) algorithm has a parallel architecture. The Synthetic Initialization Vector (SIV) mode in the AES-GCM-SIV algorithm provides the nonce misuse protection using the GCM algorithm. Besides, reduced data throughput is provided using the AES-GCM-SIV algorithm as compared to the AES-GCM algorithm. This work introduced a parallel algorithm with re-keying and randomization of the initialization vector for high data throughput, nonce misuse protection, and side-channel attack protection. The implementation of the proposed algorithm is performed on Field Programmable Gate Array (FPGA) and it’s compared with the FPGA implementations of AES-GCM, AES-GCM-SIV, and recently introduced algorithms. The optimization of the proposed algorithm and security analysis is presented for space application using different optimizations and a combination of optimizations.
- Published
- 2020