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Sensor location problem on transportation network has been an interesting subject over the past few years. It is described as to optimally locate a certain number of given sensors in a network to minimize a defined cost function. Different sensor location methods have been developed; however, the probability of sensor failure has not been considered in most; if a sensor fails, the optimal deployment will not be plausible. Therefore, in this paper, the sensor failure probability is considered to place sensors optimally in order to find travel time estimation error. Moreover, it is attempted to provide optimal deployment by considering sensors failure, in which the travel time can be estimated using its upstream and downstream active sensors. To solve the proposed model, due to its complexity and diverse reported failure cases, the floating search method is used as an efficient approach in optimization problems. It has a much lower numerical complexity compared to other methods. The Sioux Falls network is adopted to test the proposed methodology. The results show that if one or more sensors fail, the remaining sensors will be in the best possible deployment, and travel time estimation error will be reduced as much as possible. Further, this study proposes a more accurate method for sensor optimal location by reducing travel time estimation error in the case of sensor failure.

The exponential growth of computer networks and the adoption of new network-based technologies have made computer security an important challenge. With the emergence of new internet-connected devices, the attack surface is increasing for cyber intruders. Many intrusion detection systems attempt to detect known attacks using signatures in network traffic. In recent years, researchers used several machine learning techniques to detect network attacks without relying on these signatures. These techniques generally suffer from a high false-positive rate which is not acceptable for an industry-ready intrusion detection product. In this paper, we propose a multi-architectural modular deep neural network model to decrease the false-positive rate of anomaly-based intrusion detection systems. Our model consists of a feed-forward module, a stack of restricted Boltzmann machine module, and two recurrent modules, the output weights of these modules are fed to an aggregator module to produce the answer of the model. The experiments are performed using CSE-CIC-IDS2018 dataset, and final models can be used in an IDS for generating alerts or preventing new attacks. The experimental results show improvement in the detection of some types of network attacks with accuracy as high as 100% for network-level attacks compared to related works.

Named Data Networking (NDN) is a new and attractive paradigm that got a broad interest in recent researches as a potential alternative for the existing IP-based (host-based) Internet architecture. Security is considered explicitly as one of the most critical issues about NDN. Despite that NDN architecture presents higher resilience against most existing attacks, its architecture, nevertheless, can be exploited to start a DDoS attack. In the DDoS attack, the attacker tries to create and transmit a large number of fake Interest packets to increase network congestion and thus dropping legitimate interests by NDN routers. This paper proposes a new technique to detect and mitigate DDoS attacks in NDN that depends on cooperation among NDN routers with the help of a centralized controller. The functionality of these routers depends on their positions inside the autonomous system (AS). The simulation results show that the suggested technique is effective and precise to detect the fake name prefixes and, it offers better performance comparing with the previously proposed ones.

The network function virtualization (NFV) is a developing architecture that uses virtualization technology to separate software from hardware. One of the most important challenges of NFV is the resource management of virtualized network functions (VNFs). According to the dynamic nature of the NFV, resource requirements of VNFs do not always remain static. In fact, the resource allocation to VNFs must be changed to correspond to variations of incoming traffic to the network. These changes cause a significant delay in the reallocation of resources. For this reason, applying resource estimation models before their allocation can prevent the upcoming problems and leads to performance improvement of resource allocation methods dynamically. In this paper, according to the resource prediction importance in NFV, three support vector regression (SVR), decision tree (DT) and k-nearest neighbor (KNN) algorithms of machine learning techniques are analyzed and compared. In addition, the effect of the genetic algorithm as a feature selection method on the mentioned methods is evaluated. The results show that an error less than one in SVR, DT, and KNN algorithms in predicting resources is achieved. However, the SVR algorithm has more execution time than the other two algorithms.

Software-defined networking (SDN) is a new paradigm which emerged in the networking area. Packet classification is an interesting topic that has considered in both traditional and SDN networks. Packet classification involves inspection of multiple fields against a set of thousands of rules called rule-set. With the increasing throughput demands in modern networks and the growing size of rule-sets, performing wire-speed packet classification has become challenging and an important topic in recent years. Packet classification is called as many-field packet classification in the SDN because of increasing the number of header fields. In this paper, a scalable many-field packet classification by employing the extended tree (X-tree) integrated with an efficient probabilistic data structure called Cuckoo filter is proposed. X-tree has high performance from the lookup, insertion, and update aspects. However, X-tree has a high memory requirement, Cuckoo filter as a probabilistic data structure is integrated within each X-tree node to outperform memory requirements and providing more classification throughput. Our experiment results show that the proposed approach achieves high throughput while requiring low memory. In addition, the proposed approach improves latency 2.4 $$\times $$ , 6.15 $$\times $$ and 4.75 $$\times $$ in comparison with DBAMCP, BSOL-RC and BF-AQT for 64 k rule-set, respectively.

Named data networking (NDN) is a recently proposed networking model that intends to overcome the restrictions of the current Internet Protocol (IP). Many research works have been attracted to this modern Internet architecture but the pending interest table (PIT), which is one of the most important constituent of NDN node, did not take considerable concern. The PIT plays an essential role in the communication process for NDN nodes and in both directions (i.e. receiving interest packets during upstream way and receiving data packets during downstream way). PIT should be sufficiently large to accommodate a large amount of information. Also, It must be fast adequate to not be a bottleneck in the forwarding process. In this paper, we propose a novel PIT implementation called FTDF-PIT for NDN. This new design depends on employing an approximate data structure that called fast two dimensional filter (FTDF) which has better performance than the other proposed filters (Bloom and Quotient filters). This filter has high performance in terms of: insertion/deletion/query throughput, low memory requirements, and low false positive rate which makes it very suitable for implementing PIT. Our evaluations show that utilizing FTDF-PIT can result in many advantages over the existing solutions in terms of: reducing the memory consumption, minimizing false positive rate, and increasing the building and updating processes which make it very suitable to meet the current network demands.

Software‐defined networking (SDN) is a modern approach for current computer and data networks. The increase in the number of business websites has resulted in an exponential growth in web traffic. To cope with the increased demands, multiple web servers with a front‐end load balancer are widely used by organizations and businesses as a viable solution to improve the performance. In this paper, we propose a load‐balancing mechanism for SDN. Our approach allocates web requests to each server according to its response time and the traffic volume of the corresponding switch port. The centralized SDN controller periodically collects this information to maintain an up‐to‐date view of the load distribution among the servers, and incoming user requests are redirected to the most appropriate server. The simulation results confirm the superiority of our approach compared to several other techniques. Compared to LBBSRT, round robin, and random selection methods, our mechanism improves the average response time by 19.58%, 33.94%, and 57.41%, respectively. Furthermore, the average improvement of throughput in comparison with these algorithms is 16.52%, 29.72%, and 58.27%, respectively.

Wireless sensor networks play the most important role in the internet of things (IoT). Due to the extensive development of sensor networks, the innate limitations and characteristics of the resources in sensors, and heterogeneity of equipment, wireless sensor network has been confronted with security challenges and various vulnerabilities. One way to improve the reliability of the sensor networks is to use abnormal behaviors detection methods in the network. The current paper presents a detection method for abnormal behaviors in a distributed way using a division technique based on entropy and closeness of cumulative observation points. The proposed algorithm for detecting intrusions processed in an intranetwork manner and separates abnormal data from normal data and then classifies it and reports to the higher levels. To investigate the efficiency and accuracy of the detection, multilayer hierarchical topology and simulations based on MATLAB software were employed. The results show high accuracy of the proposed method in detecting abnormal behavior in different levels of wireless sensor networks.

We address the problem of resource allocation for bag-of-tasks (BoT) workflows in a federation of clouds and formulate it as an integer linear programming problem. The proposed model minimizes financial cost including fees for running VMs and fees for data transfer, and fulfills deadline and resource constraints in the clouds. We also formulate the problem of BoT scheduling in the hybrid clouds, and compare the financial cost in the federation of clouds with that in the hybrid clouds. Moreover, this paper discusses sensitivity analysis to investigate stability in the related allocation problem. Numerical results show that the resource allocation in the federation is considerably preferred to that in the hybrid clouds in terms of stability and cost-saving. In this paper, we also propose an approach named GRASP-FC for obtaining an approximate optimal solution of BoT scheduling in the federation. GRASP-FC is an extension of greedy randomized adaptive search procedure (GRASP), and it can be of great interest from the computational points of view.

The number of security threats has risen sharply in recent years. This increasing trend has encouraged researchers to develop new security models in order to analyse the vulnerability of their systems, evaluating the attack and defence mechanisms, and finding the optimal security solutions. Attack Tree (AT) is the most famous security model which graphically describes the potential attack scenarios. However, it does not consider defence solutions. Hence, Defence Tree (DT) has been designed to graphically demonstrate the security solutions in order to protect the system. In this paper, we first propose a new game theory based graphical security model, Attacker-Manager Game Tree (AMGT), to consolidate all attack and defence scenarios in one model. Using this model it is easier to analyse the interactions between an attacker and security manager. Moreover, the proposed AMGT is a comprehensive educational model for system security which helps the security manager to explain the system flaws and potential risks to the higher level managers. Although finding the optimal security solutions is considered in previous studies, different definitions of optimality make finding the best solution difficult. In the rest of this paper, we consider different definitions of the optimal security solution. Afterward, the MiniMax rule is redefined to help the security manager to extract the best security solutions using AMGT based on the definition of optimality proposed by the system requirements.

The energy consumption of network devices is a significant part of the network's energy costs. Recently, Software-Defined Networking (SDN) has been suggested as a suitable and stable solution to decrease energy consumption. The main concern is how to manage resources for optimum energy consumption in SDN. Hence, this paper proposes a binary linear programming model. This model manages (on or off devices) switches, controllers, and SDN links based on the number of flows at the network edge, the processing capability of the controllers, the distance between switches and controllers, and the traffic. Therefore, with this model, the lowest energy consumption, and the lowest delay of control packets is achieved. The results show that this model, on average, has saved 40% of energy consumption, and it has also had up to 80% decrement when there is less network traffic. In addition, this model has decreased 68% of the delay of controlling packets with 70% decrement in less traffic.

Deep packet inspection (DPI) represents the major process in network intrusion detection and prevention systems. In DPI each security threat is represented as a signature, and the payload of every incoming data packet is matched against the set of current signatures. Moreover, DPI is also used for other networking applications such as packet classification, quality of service techniques, protocol identification and so on. DPI exhausts extra central processing unit and memory resources, and as a result, several attempts have been proposed to improve this process. In this study, the authors proposed a fast two‐dimensional (2D) filter with low false positive (FP) rate for DPI purposes. It consists of 2D array that employs single hash function and has very low FP rate. Using this filter as an identification tool in a DPI technique will result in more accurate and higher throughput than other systems that employ Bloom (BFs) and quotient filters (QFs). Our experiments show that the proposed solution has time improvement up to 94% over others that employ BFs or QFs and the achieved average throughput is 1.8 Gbps.

Named data networking (NDN) is a recently proposed networking paradigm that aims to overcome the limitations of the Internet Protocol, while preserving its strengths by using named data rather than...

A mathematical programming model is proposed for a resource allocation problem in federated clouds, where bag-of-tasks (BoT) applications are assigned to instance types with different costs and performance levels. The proposed model is a binary linear programming problem containing deadline and resource constraints in the cloud federations and by the objective of minimizing the total cost of applications. These constraints and objective are explicitly expressed using mathematical functions, and the model is solved with the CPLEX solver. This paper also discusses a post-optimality analysis that deals with stability in assignment problems. Numerical results show that the optimal cost and optimal solutions in the cloud federations are lower and more stable, respectively, than those presented by single-provider clouds. In contrast to optimality in single-provider clouds, that in the cloud federations is less sensitive to input data. The cost of bag-of-tasks applications in a federated cloud is minimized.Cost minimization is modeled as a binary linear programming problem.The proposed model is solved with the CPLEX solver.The sensitivity of optimal solutions to input data is investigated.

In the growing trend of globalization, the logistics and transportation play the key role in many industries. Products are shipped from one country to another. The heart of this transportation is the port, where large quantities of goods are imported and exported on daily bases. Applying Internet of Things (IoT) technologies to port warehouses is the main area of this work. Centralized warehouse management systems are prone to a single point of failure problem and are not fault tolerant. They have also limited scalability. Another issue is that the port warehouses may run by different companies and the privacy of the detailed product information must be preserved. In this paper, we design an IoT based architecture for warehouse management, according to the facts gathered from the Khorramshahr port. The main issues that this paper tries to address are: scalability, fault tolerance, and privacy. The devised architecture is named Khorramshahr (named after the name of the port). The tailored version of Chord architecture is exploited for a Distributed Hash Table (DHT), which inherits the required scalability and fault tolerance. According to the devised architecture, each company can solely manage its dedicated nodes and preserve the privacy. To boost the lookup process the design is enhanced by Bloom filter and Quotient filter. Moreover, to gain performance the architecture uses a hybrid approach, which combines both the client server and the peer to peer paradigms. To evaluate the performance, the DHT of the architecture is simulated by OMNet++ and OverSim. The simulation results show that by the scaling the number of terminals from 25 to 250 the access time for an item increases only 38%. Besides, the increase in the number of requests from 10,000 to 50,000 depicts 5% and 10% improvement respectively for the lookup message latency compared to the ODSA. The simulation results also exhibit lower false positive rate for the Quotient filter approach, which makes it the first implementation candidate. Only in cases with strict constraints on memory consumption the Bloom filter approach is favored.

Deep packet inspection (DPI) plays a central role in modern networks. Specifically, content providers need a way to monitor the traffic that enters and leave their datacenters. Most DPI techniques depend on using a predefined set of signatures in the packet payload. This matching process consumes a lot of memory and CPU resources, and thus, many researchers try to enhance this process. In this letter, we show how DPI can be accelerated by using a technique that makes use of quotient filter. Our experiments show that our solution achieves a higher throughput (from 30% to 75%) than others that use Bloom filter, when implemented in software.

The bandwidth growth of networks increased almost exponentially in the recent years and is expected to continue so for years to come. This has been fuelled by emerging new technologies that are capable of achieving higher bandwidths. Consequently, new applications are being developed that take advantage of the new capabilities. These complex applications and heavier traffic have emerged demands on more powerful devices. Furthermore, due to dynamic nature of network traffic, totally scalable methods for packet processing and implementation platforms that are able to cope with this dynamicity are needed. Field-Programmable Gate Arrays (FPGAs) are efficient candidates as they contain hardware programmable logic units that can be reconfigured based on the application requirements. ρ-VEX is a reconfigurable soft-core Very Long Instruction Word (VLIW) processor on an FPGA and it is able to use the inherit Instruction Level Parallelism (ILP) of applications. ρ-VEX has all the requirements of processing network applications. For the purpose of scalability and economical reasonability, in this paper, an implementation of CRC called one-clock CRC (OC-CRC) as a customized instruction in ρ-VEX is presented. Using this customization, one of packet classification algorithms that have taken advantage of Bloom filter e.g. tuple pruning using Bloom filter is implemented. CRC is selected as a custom instruction because of its importance in Bloom filter as hashing function and error detection in the most of the layer of common protocol stacks. The results show the huge performance gap between General Purpose (GPP) processors and our customized ρ-VEX such that our customized ρ-VEX provided on average approximately 8× speedup.

Many-field packet classification is a challenging function of the devices in software-defined networking. In this paper, we propose a new algorithm, which partitions a ruleset in a simple way based on non-wildcard portions of the rules. A portion can be a field or a sub-field. The algorithm uses hash tables as the base data structure. In a partition, all the members have a common non-wildcard portion, which is used as the hash key. It means that only a portion of the rules and headers is used for hashing. It simplifies using the hash table for packet classification, which deals with the ternary vectors. The proposed algorithm supports fast updating as a required feature for most of today’s networks. Extensive simulations are conducted to evaluate the algorithm and compare it with well-known algorithms. Results show that the proposed algorithm has a 196% higher throughput and 81% faster update than Tuple Space Search as the base classification algorithm of OpenVSwitch.

Packet classification is one of the main core functions of networking. With the advent of Software-Defined Networking, packet classification has become more challenging by introducing many-field rulesets. In this paper, we propose an algorithm, Clustering-Based Packet Classification (CBPC), which divides ruleset into some clusters using a new hybrid clustering method, based on an innovative bit-level view. Those rules that have more common wildcard and non-wildcard bit positions are put into the same cluster. Each cluster uses common non-wildcard positions of its rules to produce keys for a hash table insertion and query stages. This makes possible to use hash tables without involving difficulties with inserting and querying ternary vectors, because our algorithm converts it to simple binary operations. In fact, we ignore a portion of information of the rules in key production for the hash tables. It overcomes the problem of extending wildcards to all of the possible values. It is true that some information is lost but it is covered by full matching at the hash table entries. We propose two versions for CBPC, online and offline. The online version supports update, which is an important requirement for today's packet classification algorithms. The proposed algorithm is evaluated and compared with some well-known and state-of-the-art algorithms by extensive simulations. The results show that Online-CBPC achieves 197% higher throughput and 64% faster update than Tuple Space Search, OpenVSwitch standard algorithm, while using almost the same amount of memory.

The memory wall or Von Neumann memory bottleneck decreases the speed of computation in conventional digital platforms. It is due to disharmony of communication speed as well as physical distance between the CPU and memory. In Spiking Neural Network (SNN), both memory and computational elements are integrated into the body of each neuron which provides the possibility of cognitive computing with learning ability in a platform without memory bottleneck. The way of updating the synaptic weights is one of the significant challenges in implementing machine learning methods using spiking model of neurons. Deep Belief learning method recently is used in several state-of-the-art studies due to its potential in robustness computation, pattern recognition, and data classification. In this paper, we use a rate based version of Contrastive Divergence (CD) updating weight rule. Respecting the rate aspect of neural coding, we develop a Spike-Based Deep Belief Network (S-DBN) using Leaky Integrate-and-Fire (LIF) neurons. In experimental evaluations, a two stacked RBMs model is validated using MNIST hand-written digit dataset. The learning accuracy of this architecture is 94.9% yet less than state-of-the-art of Artificial Neural Network (ANN) accuracy, however, quite promising with SNN architecture suitable for hardware implementation. To enhance the accuracy of the network recognition rate, we studied the impacts of notable network parameters for both learning as well as neuron models. Based on the experimental results in this work, choosing optimized parameters for learning rate between 0.008 and 0.01, a frequency of input spikes 18 Hz, the sizes of mini-batches between 25 and 50, and two different membrane voltage thresholds for hidden and visible layers leads to the optimum results in the accuracy rate of the network recognition.

Nowadays, the rate of information exchange on the Internet is increasingly high, so routers are needed to send this large amount of data more quickly with less energy, and there are many methods and algorithms for improving this. Open source routers, help programmers to expand knowledge-based systems by providing a code change context. In this paper, one of the software routers called BIRD in the Linux operating system (Ubuntu) has been used, and the implementation of the multiple routing tables has been deployed, in which instead of putting the entire routing information on a routing table, It is distributed on several routing tables, which is the master routing table, and then this method is compared with the ordinary mode in terms of power consumption and round trip time (RTT). After this comparison, it has been observed that the power consumption and RTT, both declined significantly. Therefore, it is concluded that the overall performance of systems and routers has increased.

Hybrid Aloha is a new medium access control protocol which has been designed to improve the performance of wireless networks. This is by allowing collision free channel estimation that transmits data of multiple users simultaneously. In this paper, a general form of throughput model for hybrid Aloha system in term of the specified number of users with particular number of pilot sub-slots is proposed. Using the existing equation of hybrid Aloha throughput, fundamental principles of counting from discrete mathematics and probability theory, a recursive equation for hybrid Aloha throughput is extracted, then a simple equation in term of number of users and pilot sub-slots is described. In addition, an analysis of hybrid Aloha throughput under an infinite number of users is explained. Based on this analysis the maximum value of normalized throughput of hybrid Aloha is 1 e ? , where the ? is pilot sub-slot size. Furthermore, a comparison between analytical and simulation results of hybrid Aloha for different number of users and arrival rate is presented.

Performance and lifetime of wireless sensor networks are tightly linked to the used routing protocol. Energy and memory efficiency are some of the main challenges of routing protocols. These challenges are more strict in large scale and dense networks. Numerous amount of routing approaches are published so far, emphasized on energy consumption. However, a few of them addresses the limitations of node memory. This paper introduces a new routing protocol called Bloom filter based routing protocol (BFRP). It reduces memory consumption by replacing a routing table with a Bloom filter. Since the approach is devised for clustered networks, a new clustering algorithm is introduced that takes remaining energy into the account for cluster head election. It also supports networks with churn. Several scenarios are simulated with NS2 and the results are compared to Coverage Preservation Clustering Protocol and Hybrid Energy-efficient Distributed Clustering algorithms. The results approve that BFRP improves energy consumption and show a significant decrease in memory usage.

Network packet classification is important network kernel function to enables various network services such as Quality of Service (QoS), security and resource reservation. The OpenFlow protocol is the responsible of the packet classification, it uses a set of rules called ruleset, each rule in that rule set contain a set of matching fields. With the rapid growing of rulesets size and rule fields numbers in the modern networks, it became so difficult to classify incoming packets at reasonable speed using the classical packet classification techniques. Many modern software-based classification solutions have been proposed to accelerate packet classification in additional to hardware-based solutions. In general, to design packet classification algorithm, it is important to strike a balance between high throughput and low memory requirements. This paper proposes an R-tree based parallel many-field packet classification technique using multi-threading to classify packet into the flow it belongs to; Multi-threading has been employed to accelerate packet classification by introduce a parallelism packet classification scheme. Two main algorithms that represent the main two parts of the proposed technique have been described, first algorithm describes how to constructing R-tree from the corresponding ruleset, and the other algorithm describes the R-tree querying in parallel manner. The performance of the proposed technique has been evaluated with consideration of throughput, latency, and memory access by testing the proposed many-fields packet classification algorithms on Class-Bench rulesets. Experiment results showed that the proposed parallel query algorithm can classify packets with very good throughput, latency, and memory access compared with other many-fields packet classification solutions.

Using Bloom filters to enhance the efficiency of the plagiarism detection system.Enhancing the speed of plagiarism detection and reducing the memory required to store the documents.Considering the privacy of content while running similarity estimation process.Adjustable according to the requirements of the relevant application. With the easy access to the huge volume of articles available on the Internet, plagiarism is getting worse and worse. Most recent approaches proposed to address this problem usually focus on achieving better accuracy of similarity detection process. However, there are some real applications where plagiarized contents should be detected without revealing any information. Moreover, in such web-based applications, running time, memory consumption, communication and computational complexity should be also taken into account. In this paper, we propose a similar document detection system based on matrix Bloom filter, a new extension of standard Bloom filter. The experimental results on a real dataset show that the system can achieve 98% of accuracy. We also compare our approach with a method recently proposed for the same purpose. The results of the comparison show that the Bloom filter-based approach achieves much better performance than other in terms of the aforementioned factors.

Undoubtedly, dealing with security issues is one of the most important and complex tasks various networks face today. A large number of security algorithms have been proposed to enhance security in various types of networks. Many of these solutions are either directly or indirectly based on Bloom filter (BF), a space- and time-efficient probabilistic data structure introduced by Burton Bloom in 1970. Obviously, Bloom filters and their variants are getting more and more consideration in network security area. This paper provides an up-to-date survey of the application of BFs and their variants to improve performance of the approaches proposed to address security problems with different types of networks.

Wireless Sensor Network (WSN), consists of a large number of sensor nodes. Each sensor node senses environmental phenomenon and sends the sensed data to a sink node. Since the sensor nodes are powered by limited power batteries. Energy efficiency is a major challenge in WSN applications. In this paper, we propose an analytical model for energy consumption estimation in clustered WSNs using M/M/1 queuing model. The model can be used to investigate the network performance in terms of average energy consumption. We also propose a power minimization scheme to reduce energy consumption of sensor nodes by reducing the number of transitions between the idle and active states of sensor nodes according to the number of data packets in the queue. Our analytical model, based on the main parameters such as the average energy consumption and the number of packets (jobs), significantly reduces energy consumption. Simulation, support the validity of the proposed approach.

International audience; Understanding brain mechanisms and its problem solving techniques is the motivation of many emerging brain inspired computation methods. In this paper, respecting deep architecture of the brain and spiking model of biological neural networks, we propose a spiking deep belief network to evaluate ability of the deep spiking neural networks in face recognition application on ORL dataset. To overcome the change of using spiking neural networks in a deep learning algorithm, Siegert model is utilized as an abstract neuron model. Although there are state of the art classic machine learning algorithms for face detection, this work is mainly focused on demonstrating capabilities of brain inspired models in this era, which can be serious candidate for future hardware oriented deep learning implementations. Accordingly, the proposed model, because of using leaky integrate-and-fire neuron model, is compatible to be used in efficient neuromorphic platforms for accelerators and hardware implementation.

Traditional grid networks employ General Purpose Processors (GPPs) as their main processing elements. Incorporating reconfigurable processing elements in such networks can be a promising technology to increase their performance. In this paper, we propose and simulate collaboration of reconfigurable processors in grid computing. Collaborative Reconfigurable Grid Computing (CRGC) employs the availability of any reconfigurable processor to accelerate compute-intensive applications such as multimedia kernels. We explore the mapping of some compute-intensive multimedia kernels such as the 2D DWT and the co-occurrence matrix in the CRGC. These multimedia kernels are simulated as an independent set of gridlets submitted to a software simulator called CRGridSim. In addition, we analyze the lower and upper bounds of performance for CRGC. Our experimental results show that the CRGC approach improves performance up to 7.2x and 2.5x compared to a single GPP and the collaboration of GPPs, respectively, when assuming a speedup of 10 of the reconfigurable processors in a grid with 4 nodes.

Emerging Software Defined Network (SDN) can improve many parameters such as programmability, manageability, scalability, reliability and agility in nowadays networks, Internet and also part of infrastructure Cloud systems and datacenters. In this paper, SDN technology on OpenStack platform and XenServer hypervisor has been implemented using OpenStack architecture without network node. Consequently, without using network node in OpenStack implementation is released its consumed resources. Therefore, due to network scalability a lot of resources are released using this approach. Moreover, in this work a module is proposed to manage network traffic and quality of service (QoS) optimization. This module checks servers' traffic status and determines high traffic servers which can specify high traffic virtual machines (VMs) located on busy servers. High traffic VMs are limited or migrated to another server that is not busy. Limiting VM's bandwidth is proposed in this work and VM's migration will be presented in future work.

Routing only based on destination IP address is one of the major potential threats of current Internet routers that enables attackers to attack victims from forged sources. IP packet Traceback is one of the important defense mechanisms against Denial of Service (DoS) attacks because it traces packets from source to destination. In this paper, an IP Traceback method based on efficient Bloom filter data-structure and Netfilter open-source framework is proposed in which outperforms previous methods in terms of speed, memory usage, memory and processing overhead.

Nowadays, the efficient and probabilistic data-structure named Bloom filter is widely used in network processing applications. Moreover, the parallel nature of Bloom filter has made it suitable for multi/many-core architectures. In this paper, two schemes called multi-core architecture with shared queue and multi-core architecture with private queue (both employing Bloom filter cores) are proposed and implemented on FPGA. The inherent parallelism in querying of packets and different number of cores (such as 1, 2, 4, 8 and 16 cores) are considered. Experimental results show that the multi-core architecture with private queue achieves higher throughput than the latter one. Furthermore, Bloom filter is also implemented on GPU (as many-core architecture) and the results are compared to the CPU only version. When the number of packets in GPU memory is 16384, the speedup achieved by GPU implementations using CUDA is about 274 times compared to CPU implementation. However FPGA results outperform GPU, so that the throughput of first architecture (shared queue) and second architecture (private queue) with 16 cores are respectively almost 5.5 and 7.1 times higher than GPU throughput.

With the rapid growth of Internet traffic as well as the employment of new complex applications, e.g. multimedia, online gaming and social networks, the high-performance devices and routers have become essential requirements in todays computer networks. One of the major bottlenecks in nowadays routers is the lookup of routing tables and finding the appropriate output port for packet forwarding. Because of arbitrary length of Classless Inter-Domain Routing (CIDR) addresses, the packets must be forwarded to the corresponding output port using longest prefix matching (LPM) methods. In recent years, various software and hardware solutions for finding longest prefix matching are proposed. This paper presents a method to implement the IP lookup of the routing table using Rectangle Tree (R-Tree). In this method, prefixes are converted to two-dimensional data in order to be inserted into the R-Tree. Subsequently, searching is performed on R-Tree to find the matched prefixes especially the LPM. The results show that this method reduces the number of memory accesses, significantly.

In this paper, design and configuration of a high-performance Click-based packet classifier on GPU is presented. In this regard, Bloom filter-based classification algorithm is used in order to design and implement the Click-based packet classifier elements (processors) on Graphics Processing Unit (GPU). On one hand, utilization of Bloom filter data structure leads to memory usage reduction of the router. On the other hand, the parallel nature of Bloom filter and GPU architecture bring higher throughput of the software router. The analysis results indicate approximately five times speedup of the proposed Click-based classifier on GPU compared with the standard Click-based classifier.

Regarding the fact that, there are large number of resources in cloud computing system. Developing effective solutions for their queries are very important. The success of cloud computing systems fundamentally relies on the efficient use of resources. Discovering and managing resources is one important step in the system effecting. In this paper, a method of Agent-based resource discovery using Bloom filter is proposed. In this strategy, resources information are stored in a Bloom filter, and then, the Bloom filter is sent to the related broker agent and broker agent sends it to the related database. In addition, users make their requests using their hash values and send them to related broker agent. The information needed for search and discovery is stored inside the Bloom filters and then the achieved Bloom filter is transferred, therefore, the amount data transmitted is reduced significantly. The results show that, in the proposed approach, the number of transferred bits in the network for user's requests, the number of transferred bits in the network for resources information, and the average of consumed time to search and discovery requested resources, approximately are 5 times, 15 times, and 3 times less than the case without using Bloom filter, respectively. The consumed memory, used bandwidth in the network, the time of search and discovery of resources, have improved significantly.

Flexibility and configurability behind the open-source routers has extended their usage via the networks. On the other hand, the need for high-performance and high-speed routers has become a fundamental issue due to significant growth of information exchange through the Internet and intranets. Therefore, in this paper we employ Bloom filter to accelerate the Bird open-source routing software. Bloom-Bird (our improved version of Bird) is proposed which uses an extra stage before its IP lookups using Bloom filter to accelerate IP lookup mechanism. Based on the best of our knowledge this is the first application of Bloom filter on Bird software router. Moreover, Bloom-Bird can scale its Bloom filter capacity therefore false positive errors are handled in an acceptable rate. It shows up to 93% speedup for IP lookups over standard Bird when number of inserted nodes into its internal FIB (Forwarding Information Base) becomes huge.

Grid is a large scale distributed system, concerned with coordinated resource sharing and problem solving. To make effective use of the huge capabilities of the grids, efficient task scheduling heuristic for improving time are required. Total completion time is an important factor for assessment of algorithm in Grid. Many algorithms for decreasing of total completion time have been implemented so far. In this paper, we propose new scheduling heuristic based on well known task scheduling algorithms, Min-Min. The proposed heuristic tries to use the advantages of this basic algorithm and avoids its fails. To achieve this, the proposed heuristic presented a new strategy for choosing appropriate resource in any round. The simulation results by Gridsim show that the new heuristic can improve performance for a variety of assumptions.

Packet classification is one of the most important functions in the router design. This is to support a variety of network functionalities. Pipeline-based decision tree is one of the best choices for increasing throughput on packet classification. SRAM-based and hardware-based solutions are often used to develop a high speed packet classification engine. However, SRAM-based solutions suffer from throughput degradation, delay variation and memory overflow. Moreover, hardware-based solutions suffer from fast update and non-linear structure. To address these problems, we propose a FPGA-based multipipeline architecture for 5-tuple rules into multiple subsets to build a decision tree with high throughput and fast update. To fit the current largest rule set in the FPGA device, we propose several optimization techniques, so that maximize the resource utilization while sustaining high throughput. In this architecture Look Up Tables (LUTs) are used instead of memory blocks. Partial reconfiguration in Field Programmable Gate Array (FPGA) used to reduce the time that is needed to change the behavior of architecture. The implementation results show that our architecture can store over 10K real-life rules in LUTs of a single Xilinx Virtex-6 FPGA, and sustain over 120 Gbps (i.e. 3× OC-768 rate) throughput for minimum size (40 Bytes) packets.

High performance packet classification is one of the most important requirements for next generation network services. Even though many multi-dimensional classification algorithms have been proposed, most of them are precluded from commercial tools due to their complexity or high memory requirements. This paper, presents a new efficient packet classification method based on a 5-field search algorithm. Our new algorithm uses only 75 KB of inexpensive external SRAM. The main advantage of proposed method is simplicity and high speed which it made it attractive for high speed application such as IPV6. The implementation results show that our architecture can store 10K real-life 5-tuple rules in on-chip memory of a single FPGA and sustain 40 Gbps throughput for packets with minimum size of 40 bytes.

Decreasing technology sizing makes the CMOS devices more error prone to alpha particles and cosmic radiation. Therefore, the probability of occurring multi faults in such devices is increasing. This paper presents a simulation-based multi-bit fault injection tool, named VHDLSFI, aiming at conducting multi-bit fault injection campaign to analyze the dependability of digital systems modeled by VHDL description language. This fault injection tool utilizes the Force and Release statements which are features in the VHDL 2008 standard to inject transient and permanent single and multi-bit faults. Different fault models are developed using force and release statements. A VHDL model of DP32 processor is evaluated by this fault injection tool to demonstrate its functionality. A total of 2000 single faults and 7000 double faults have been injected into the ALU, Register File, General Registers, and different Buses in the processor using VHDLSFI fault injection tool. Only one single or one double fault is injected in each run. The results show that the percentages of errors propagation vary between 7% and 89% depending on single or double faults, the different workload programs, and location of the injected faults in the processor. The error propagation latency is much lower when the double faults in injected in DP32 processor.

Bloom filter is a compact and randomized data structure for representation of a set, in order to answer membership queries; Queries such as "Is element x in set Y?" There is no need to have set Y, for answering these kinds of questions; these questions can be answered by constructed Bloom filter from the set. Therefore, space saving is the main advantage of using Bloom filter. In this paper, first general structure of Bloom filter is explained and then by using the Bloom filter, a new method for error management and detection in computer networks is presented. In this approach, the sender makes a Bloom filter for the flow data that is to be sent and attaches this Bloom filter to data flow and sends them to receiver. The receiver by receiving the data flow and Bloom filter, makes the Bloom filter corresponding to data flow, then by comparing this Bloom filter with the received Bloom filter detects the possible errors. The results show that Bloom filter with the length of x input string is able to detects all errors except for errors with the length of exactly 2x, 4x and... etc.

This paper presents a fast algorithm for sequence alignment in Biocomputing using Bloom filters. The idea behind this proposed method is comparing subsequence of incoming sequences with Bloom filter and discovering the matched subsequence. The sequence alignment problem has a large number of comparisons. According to the last successful experiences of useing Bloom filter in similar issues such as web search, it seems that using Bloom filter to solving this problem can be an appropriate solution. To evaluate the proposed algorithm, it has been implemented and compared to the Needleman-Wunsch method. Results show that in average, outpout quality is improved by 41%, memory usage by 84%, and response time by 52% compared to Needleman-Wunsch method are improved. In addition, for real samples, output quality is almost equivalent, memory usage is improved by 95% and response time by 40% compared to the Needleman-Wunsch method.

With the increasing volume of on-line literatures on the Internet and the simplicity of finding and downloading data, dishonest use of the findings of others, known as plagiarism, is getting worse and worse. Therefore, there is a need to be a copy detection system to address this problem in an efficient way. Most current systems only focus on one goal, estimating similarity with highest accuracy, i.e. 100%. While, in some real applications, it can be useful to take into account other factors such as query speed, memory usage and security of content at the cost of reducing accuracy by a few percentages. In this paper, we propose an innovative adjustable copy-paste detection system which provides an adjustable property on mentioned factors according to the application requirements. The main core of our design is a new extension of Bloom filters, called Matrix Bloom Filter (MBF), which provides the adjustability of the system. A matrix Bloom filter is defined as a bit matrix in which each entry can only be set or reset. It is utilized to efficiently maintain all documents of libraries. Based on our knowledge, this is the first work using the idea behind Bloom filters to solve copy-paste detection problem while ensuring the privacy of document content and also the first work aiming to provide this adjustable property. The experimental results show that our proposed approach provides three main improvements, including enhancing the speed of querying operation up to 2.7 times, diminishing the memory required and providing the security of content besides allowing an adjustable trade-off among all aforesaid factors.

Within packet processing systems, lengthy memory accesses greatly reduce performance. To overcome this limitation, network processors utilize many different techniques, for example, utilizing multilevel memory hierarchies, special hardware architectures, and hardware threading. In this paper, we introduce a multilevel memory architecture for counting Bloom filters. Based on the probabilities of incrementing of the counters in the counting Bloom filter, a multi-level cache architecture called the cached counting Bloom filter (CCBF) is presented, where each cache level stores the items with the same counters. To test the CCBF architecture, we implement a software packet classifier that utilizes basic tuple space search using a 3-level CCBF. The results of mathematical analysis and implementation of the CCBF for packet classification show that the proposed cache architecture decreases the number of memory accesses when compared to a standard Bloom filter. Based on the mathematical analysis of CCBF, the number of accesses is decreased by at least 53%. The implementation results of the software packet classifier are at most 7.8% (3.5% in average) less than corresponding mathematical analysis results. This difference is due to some parameters in the packet classification application such as number of tuples, distribution of rules through the tuples, and utilized hashing functions.

Traditional grid networks employ general purpose processors (GPPs) as their main processing elements. Incorporating reconfigurable processing elements in such networks can be a promising technology to increase their performance and flexibility. Many grid networks, such as Tera Grid, are already utilizing reconfigurable hardware resource as a processing element. In this paper, we propose queuing models for grid networks that incorporate the following processing elements: a GPP, a reconfigurable element (RE), and a hybrid element (combining a GPP with an RE). The proposed models are validated by taking average response time of these models as validation metric. The comparison of experimental (simulation) and analytical results suggest that the total average error is less than 3.5%.

Multimedia applications are multi-standard, multi-format, and compute-intensive These features in addition to a large set of input and output data lead to that some architectures such as application-specific integrated circuits and general-purpose processors are less suitable to process multimedia applications Therefore, reconfigurable processors are considered as an alternative approach to develop systems to process multimedia applications efficiently In this paper, we propose and simulate collaboration of reconfigurable processors in grid computing Collaborative Reconfigurable Grid Computing (CRGC) employs the availability of any reconfigurable processor to accelerate compute-intensive applications such as multimedia kernels We explore the mapping of some compute-intensive multimedia kernels such as the 2D DWT and the co-occurrence matrix in CRGC These multimedia kernels are simulated as a set of gridlets submitted to a software simulator called CRGridSim In addition, the behavior of multimedia kernels in the CRGC environment is presented The experimental results show that the CRGC approach improves performance of up to 7.2x and 2.5x compared to a GPP and the collaboration of GPPs, respectively, when assuming the speedup of reconfigurable processors 10.

Reconfigurable computing has been driven largely by the development of commodity field-programmable gate arrays (FPGAs). Standard FPGAsare somewhat of a mixed blessing for this field.In this survey we give a brief overview of programming logics and we present configurable logic block (CLB) and Look Up Table (LUT) as logic elements. Also we presented the definition of fine and coarse-grain architectures and present some commercial examples.This survey is also introduced the reconfigurable computing models like static and dynamic, single and multi-context and partial reconfiguration architectures. Finally run-time reconfigurable computing and the coupling of reconfigurable processing unit (RUP) delineated.