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The numerous worked examples and the case studies contained in this book clearly demonstrate that digital signal processing operations are governed by discrete-time representations of algorithmic processes. For example, we have seen that the characteristic performance of a digital filter is determined by its linear difference equation. The practical implementation of real-time digital signal processing operations is generally achieved using one of two practical options, namely (a) using dedicated hardware, such as an application specific integrated-circuit (ASIC) or a bit-slice processor, or (b) using a programmable integrated-circuit (microprocessor or digital signal processor chip). If the processing operations are not required as real-time implementations, then it is often appropriate to perform the DSP computations using a general-purpose personal computer (PC). For example, a number of proprietary software packages have been produced to enable model definitions and simulation of DSP systems.

Digital Signal Processing (DSP) is concerned with the use of programmable digital hardware and software (digital systems) to perform mathematical operations on a sequence of discrete numbers (a digital signal). Such processing is needed to facilitate the extraction of information embedded in the signal.

The concepts of microprocessor-based signal filters are presented via a case study of a simple low-pass filter designed using the bilinear z-transform method. The paper provides a general introduction to signal filtering using microprocessor-based forms of implementation, and discusses several alternative system configurations based on commercially available microprocessors or special purpose integrated circuits.

The concepts of single-chip digital signal processing are presented via a student-oriented tutorial/laboratory case study. This involves the design of a highpass digital filter using the first-difference design method and its implementation using the NEC μPD7720 Signal Processor.

The concepts of digital filtering using the NEC μPD7720 single-chip digital signal processor are presented. The architecture and instruction formats of the device are summarised. The design philosophy and practical hardware and software considerations of using the 7720 as a peripheral to a host 8085 microprocessor system are discussed.

The architecture, implementation and image processing facilities of the LS10 low-cost microprocessor-based image processing system are described. The paper presents a summary of the system's attributes, and emphasis is given to their use in practical image processing applications. Results for processed Landsat satellite images are presented and described to illustrate the performance achievable from the system. To perform complex computations rapidly, fast Fourier transforms for example, a transputer-based processor has been developed. The paper shows how this sytem can be interfaced to the image processor.

A microprocessor-based system (microcomputer) normally consists of a number of interconnected integrated circuits. This chapter presents a block diagram of a simple system comprising a microprocessor unit (MPU), memory for storing instructions and data, and some input/output (I/O) capability, and it discusses the basic concept of a microprocessor-based system and the method whereby an instruction is fetched and executed. It also discusses hardware system elements and their relevant signals for system operation. The chapter shows the way by which the elements may be put together into a specified, practical dedicated system and describes the associated memory-mapping philosophy. The MPU operation is categorized into two cycles of operation. Serial asynchronous data communication between peripheral equipment and the 6800/6802 MPU can be achieved using the 6850 asynchronous communications interface adapter (ACIA). The interface includes select, enable, read/write, and interrupt logic to allow bidirectional data transfer. The parallel data of the MPU system is serially received and transmitted by the ACIA with necessary formatting and error checking. The functional configuration of the device is programmed using the data bus during the initialization of the system.

This chapter describes the MEK6802D5E evaluation system, and it presents reference information to undertake the hands-on experience of 6800/6802 program execution and microprocessor system operation and development. The D5BUG monitor program requires 128 bytes of static RAM for the operating system, that is, memory locations E400 to E47F. This provides memory for storage of flag and data information and stack area for the monitor. However, 24 bytes are provided as a user-stack area. The chapter presents a summary of some useful D5BUG operating system RAM locations. The content of a memory location can be displayed or changed using the memory display /change editor. This is achieved by a keypad entry of the specified memory location address (leading zeros unnecessary), followed by pressing the M key. It results in the address and current data content being displayed. The memory address display can be incremented by one by a single pressing of the GO key, or it may be decremented by one by a single pressing of the M key. In all cases, the current memory content will be displayed for the accessed memory location. Therefore, a program may be entered and modified as required.

When a microprocessor is used to control a system, it must be capable of accepting input information, responding, and outputting appropriate signals to implement the required control action. The input/output (I/O) signals may have to be subjected to signal conditioning so that their forms and levels are compatible with the input/output interface elements. The chapter highlights this point by considering two contrasting practical examples. A common technique employed in microprocessor interfacing is to establish the I/O interface as a memory-mapped device. The peripheral interface adapter (PIA) has two 8 bit bidirectional data buses (PA0 to PA7, and PB0 to PB7) for interfacing with peripheral equipment and four control lines CA1, CA2, CB1, and CB2. Each bidirectional data line must be initialized to act as either an input or an output. This is achieved by setting a 0 in the corresponding bit in the data direction register (DDR) if the line is to be an input or a 1 if the line is to be an output.