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Spiking Neural Networks (SNNs) can closely mimic the biological neural network systems. Recently, the SNNs have been developed in hardware circuits to emulate the time encoding and information-processing aspects of the human brain in real-time. However, the hardware SNN systems are suffering from large hardware resource consumption due to the high complexity of computational units. In this paper, a novel hardware SNN system based on stochastic computing is proposed to address this problem. Pair-based spiking-timing-dependent plasticity, coupled with integrate-and-fire neurons are employed to design the SNN. Stochastic computing can simplify the computational components of multipliers, adders, and subtractors in conventional hardware SNNs, hence reduce the hardware resource cost. Experimental results show that compared with the state-of-the-art approaches the proposed SNN system reduces the resource consumption by 58.0% (especially registers by ≥ 65.6%). In the meantime, the maximum normalized root mean square error between the proposed hardware and others is only 0.0097, which can maintain the behaviours of SNN. This work provides a beneficial alternative to the large-scale hardware SNN implementations. [ABSTRACT FROM AUTHOR]

The robustness and imperceptibility of the watermarking algorithm are a pair of contradictory properties. When the robustness increases, the imperceptibility decreases. Most strategies proposed in the literature usually concentrate on improving robustness, but few consider the relationship between robustness and imperceptibility. To deal with this problem, a robust blind image watermarking method is proposed in this work, which is composed of a logistic-sine-COupling map, discrete waVElet transform, and appRoximate maximum eigenvalue of Schur decomposition, namely COVER. In the proposed COVER, an objective function and a two-stage search method are designed to determine the optimal embedding coefficient, thus balancing the imperceptibility and robustness of this work. Specifically, the host image is transformed into four sub-bands by discrete wavelet transform, and the low-low sub-band is further separated into non-overlapping blocks which can be calculated to get the approximate maximum eigenvalues (AMEs) of Schur decomposition. Especially, each AME is not contained in the real Schur decomposition, which effectively reduces the computational complexity. Then, the original AMEs of the host image are updated to complete the embedding process according to the binary feature of encrypted watermark and the proposed embedding method. Finally, the watermarked image is obtained. The experimental results show that all peak signal noise ratio values are above 42 dB, structural similarity index measure values are above 0.98, normalized correlation values are above 0.9, and all bit errors rates are less than 0.14. Compared with six state-of-the-art schemes, the proposed COVER has strong robustness, good imperceptibility, large capacity, and low computational complexity. [ABSTRACT FROM AUTHOR]

The security of chaotic cryptographic system can be theoretically evaluated by using conventional statistical tests and numerical simulations, such as the character frequency test, entropy test, avalanche test and SP 800-22 tests. However, when the cryptographic algorithm operates on a cryptosystem, the leakage information such as power dissipation, electromagnetic emission and time-consuming can be used by attackers to analyze the secret keys, namely the Side Channel Analysis (SCA) attack. In this paper, a cryptanalysis method is proposed for evaluating the security of a chaotic block cryptographic system from a hardware perspective by utilizing the Template Attacks (TAs). Firstly, a chaotic block cryptographic system is described briefly and implemented based on an Atmel XMEGA microcontroller. Then the TA using a multivariate Gaussian model is introduced. In order to reduce computational complexity and improve the efficiency of TA, the Hamming weight is used in this work to model power consumption traces. The proposed TA method has the following advantages including (a) using the sum of difference to select points of interest of traces, (b) using a data processing method to minimize the influences on power information modeling from the redundant sampling points, and (c) all the traces are aligned precisely before establishing the templates. Experimental results show that the TA can be used to attack the chaotic cryptographic systems and is more efficient, i.e. ∼ 32% less attack traces than correlation power analysis, when the templates are properly built. [ABSTRACT FROM AUTHOR]

• A novel image encryption scheme is proposed based on hyper-chaotic system and quantum coding. • A novel enhanced quantum representation (NEQR) model is applied to image processing. • The bit-level adjacent-exchange operation is designed based on NEQR model. • A novel image scrambling method based on quantum location coding is proposed. • Experimental results demonstrate a good security performance. The application of quantum mechanisms in image processing has attracted wide attention. In this paper, an image encryption scheme that is based on hyper-chaos and quantum coding is proposed. First, based on a novel enhanced quantum representation (NEQR), the bit-level adjacent-exchange operation is implemented to pre-process the plain-image, which has lower computational complexity compared to conventional bit-level switching operations. Then, the processed image is diffused by the quantified sequences where the self-adapting parameters are applied to quantify the sequences that are generated by Chen's hyper-chaotic system. In addition, inspired by the quantum coding structure, a novel scrambling method that is based on quantum location coding is proposed. This method is used to further scramble the diffused image to obtain the final cipher-image. The experimental results and performance analysis demonstrate that the proposed image encryption scheme has high security performance. [ABSTRACT FROM AUTHOR]

Spiking Neural Network (SNN) is the most recent computational model that can emulate the behaviour of biological neuron system. However, its main drawback is that it is computationally intensive, which limits the system scalability. This paper highlights and discusses the importance and significance of emulating SNNs in hardware devices. A layer-level tile architecture (LTA) is proposed for hardware-based SNNs. The LTA employs a two-level sharing mechanism of computing components at the synapse and neuron levels, and achieves a trade-off between computational complexity and hardware resource costs. The LTA is implemented on a Xilinx FPGA device. Experimental results demonstrate that this approach is capable of scaling to large hardware-based SNNs. [ABSTRACT FROM AUTHOR]

The accurate estimation of parameters of an ultrasonic signal is essential in ultrasonic non-destructive testing (NDT). In this paper, a novel method for parameter estimation based on the Gabor transform (GT) is proposed. Firstly, the GT is used in ultrasonic signal processing in order to estimate time of flight (TOF) and center frequency (CF) by calculating where maximum modulus of Gabor transform function of the signal is attained. The quasi-Newton method is employed to improve the estimation accuracy and reduce computational complexity. The Gabor transform function of the signal has an analytic expression which contributes to derive other estimators relating to TOF and CF such as bandwidth factor, phase and amplitude. The parameters of multi-component echo signal are estimated by estimating the parameters of each component successively. Numerical simulation has been carried out to show the performances of the proposed method in estimating parameters of ultrasonic signal. [ABSTRACT FROM AUTHOR]