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SUMMARY A number of recent studies on neural networks (NNs) have been conducted with the purpose of applying engineering to the brain function. One approach which focuses on the dynamics of the living organism, various Artificial Neural Networks (ANNs) has been proposed. However, the NN of a living body is very large in scale. Therefore, when we analyze the dynamics using the hardware NN model, the number of devices and the circuit size should be smaller. In this paper, we aim to reduce the area of a cell body model, and look into the cell body model made up of only NMOS. As a result, it is clearly shown that the packaging density of the proposed model can reduce the size of a traditional model by more than half. [ABSTRACT FROM AUTHOR]

It is well known that quadruped locomotion patterns are generated by central pattern generators (CPGs) residing within central nervous system interstitial cells. Based on this fact, many investigators have used CPG models to develop control adaptations in robots. Previously, the authors proposed a CPG model that generates and controls quadruped locomotion through single-pulse external inputs. However, in this model, a large capacitance was necessary for generating 1-10 Hz robot control patterns. In this paper, we suggest a CPG model in which swing and stance patterns produced by interstitial cells generate low-frequency patterns through a low-capacitance 0.18 μm CMOS process. It is demonstrated that this model method can generate five basic quadruped locomotion patterns (walk, pace, trot, bound, and gallop) at a frequency suitable for controlling a quadruped locomotion robot. [ABSTRACT FROM AUTHOR]

Recently, research has been actively pursued to implement a neuron, which is the basic unit for building neural networks, in hardware with engineering applications as the objective. Specifically, pulse-type hardware neuron models, which approximately replicate pulse signals, have been examined as the information transmission stage in the brain. However, a pulse-type hardware neuron model is a complex circuit and includes inductors. Consequently, there are few practical models. In this paper, we present the Λ-type neuron model, which is a pulse-type hardware neuron model built from only enhancement-mode MOSFETs (E-MOSFETs), which can be handled in a standard CMOS process, and capacitors, and is useful as a hardware neuron model intended for large-scale neural networks. First, we show that a Λ-type negative resistance circuit having a negative resistance that varies over time can be fabricated from E-MOSFETs, and explain its principle. Next, we show that this negative resistance circuit can be used to fabricate a Λ-type neuron model from E-MOSFETs, which can be handled in a standard CMOS process. © 2002 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 86(1): 18–25, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.10020 [ABSTRACT FROM AUTHOR]

Recently, research has examined the implementation of brain-like information processing systems by focusing on the information processing ability of the brains of living organisms, modeling the neural network in the brain, and employing integrated circuit technologies for engineering applications. Since information is transmitted by pulses in the brain, a pulse-type model that models the actual unmodified pulse waveforms is effective because the basic nature of neurons is considered. Recently, attention has centered on research of models that obtain burst firing that repeats firing and not firing. This research involves both physiological experiments and theoretical models. However, there were few practical models that could be integrated. Previously, the authors proposed a pulse-type bursting neuron model constructed from depletion-mode MOSFETs, resistors, and capacitors that could exhibit burst firing. In this paper, we propose a new pulse-type bursting neuron model corresponding to a modified Bonhoeffer-van der Pol (BVP) model. This model is constructed only from enhancement-mode MOSFETs and capacitors that can be applied to the standard method using the CMOS process. First, we explain the theory of our previously proposed pulse-type bursting neuron model. Then we build a voltage-controlled negative resistance circuit using the enhancement-mode MOSFET examined here, and clearly show the changes in the characteristics of the negative resistance by using the voltage of the control terminal as the parameter. We demonstrate that the pulse-type bursting neuron model corresponding to the modified BVP model can be integrated and implemented. This model can be applied to the standard method using the CMOS process by using this negative resistance circuit, and only enhancement-mode MOSFETs and capacitors. © 2002 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 85(11): 1–7, 2002; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.10054 [ABSTRACT FROM AUTHOR]

With a view to engineering applications of the information processing mechanisms used by neural networks in biological bodies, various studies have been conducted on pulse-type neurons and neural networks. When research on a large-scale pulse-type neural network is carried out, there are limitations on computer simulation, so that hardware realization is desirable. When a neural network is realized by hardware, it is advantageous to model a single neuron by a CMOS IC suitable for large-scale LSI. In this paper, in reference to the Yagi neuron model, a pulse-type hardware neuron model, it is shown that a new pulse-type hardware neuron model can be constructed with a simple circuit configuration that can be realized with CMOS ICs. First, the equivalent inductor constructed with a low capacitance and an enhancement-mode MOSFET is discussed. Its configuration and characteristics are elucidated. Next, the negative resistance circuit is discussed. A circuit is proposed that can be applied to the CMOS process. From their characteristics, it is shown that two new neuron models based on the Yagi neuron model can be constructed. They are the conventional pulse-type neuron model fired by an external input and the pacemaker neuron model that can fire itself. © 2002 Scripta Technica, Electron Comm Jpn Pt 2, 85(3): 23–29, 2002 [ABSTRACT FROM AUTHOR]

SUMMARY: This paper presents the locomotion control of a microelectromechanical system (MEMS) microrobot. The MEMS microrobot demonstrates locomotion control by pulse‐type hardware neural networks (P‐HNN). P‐HNN generate oscillatory patterns of electrical activity like those of living organisms. The basic component of P‐HNN is a pulse‐type hardware neuron model (P‐HNM). The P‐HNM has the same basic features as biological neurons, such as the threshold, the refractory period, and spatiotemporal summation characteristics, and allows the generation of continuous action potentials. P‐HNN has been constructed with MOSFETs and can be integrated by CMOS technology. Like living organisms, P‐HNN has realized robot control without using software programs or A/D converters. The size of the microrobot fabricated by MEMS technology was 4 × 4 × 3.5 mm. The frame of the robot was made of a silicon wafer, equipped with rotary actuators, link mechanisms, and six legs. The MEMS microrobot emulated the locomotion method and the neural networks of an insect by rotary actuators, link mechanisms, and the P‐HNN. We show that the P‐HNN can control the forward and backward locomotion of the fabricated MEMS microrobot, and that it is possible to switch its direction by inputting an external trigger pulse. The locomotion speed was 19.5 mm/min and the step size was 1.3 mm. © 2013 Wiley Periodicals, Inc. Electr Eng Jpn, 186(3): 43–50, 2014; Published online in Wiley Online Library ( wileyonlinelibrary.com). DOI 10.1002/eej.22473 [ABSTRACT FROM AUTHOR]